Contents of /alx-src/tags/kernel26-2.6.12-alx-r9/Documentation/m68k/README.buddha
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Wed Mar 4 11:03:09 2009 UTC (15 years, 3 months ago) by niro
File size: 7704 byte(s)
Tag kernel26-2.6.12-alx-r9
1 | |
2 | The Amiga Buddha and Catweasel IDE Driver (part of ide.c) was written by |
3 | Geert Uytterhoeven based on the following specifications: |
4 | |
5 | ------------------------------------------------------------------------ |
6 | |
7 | Register map of the Buddha IDE controller and the |
8 | Buddha-part of the Catweasel Zorro-II version |
9 | |
10 | The Autoconfiguration has been implemented just as Commodore |
11 | described in their manuals, no tricks have been used (for |
12 | example leaving some address lines out of the equations...). |
13 | If you want to configure the board yourself (for example let |
14 | a Linux kernel configure the card), look at the Commodore |
15 | Docs. Reading the nibbles should give this information: |
16 | |
17 | Vendor number: 4626 ($1212) |
18 | product number: 0 (42 for Catweasel Z-II) |
19 | Serial number: 0 |
20 | Rom-vector: $1000 |
21 | |
22 | The card should be a Z-II board, size 64K, not for freemem |
23 | list, Rom-Vektor is valid, no second Autoconfig-board on the |
24 | same card, no space preference, supports "Shutup_forever". |
25 | |
26 | Setting the base address should be done in two steps, just |
27 | as the Amiga Kickstart does: The lower nibble of the 8-Bit |
28 | address is written to $4a, then the whole Byte is written to |
29 | $48, while it doesn't matter how often you're writing to $4a |
30 | as long as $48 is not touched. After $48 has been written, |
31 | the whole card disappears from $e8 and is mapped to the new |
32 | address just written. Make shure $4a is written before $48, |
33 | otherwise your chance is only 1:16 to find the board :-). |
34 | |
35 | The local memory-map is even active when mapped to $e8: |
36 | |
37 | $0-$7e Autokonfig-space, see Z-II docs. |
38 | |
39 | $80-$7fd reserved |
40 | |
41 | $7fe Speed-select Register: Read & Write |
42 | (description see further down) |
43 | |
44 | $800-$8ff IDE-Select 0 (Port 0, Register set 0) |
45 | |
46 | $900-$9ff IDE-Select 1 (Port 0, Register set 1) |
47 | |
48 | $a00-$aff IDE-Select 2 (Port 1, Register set 0) |
49 | |
50 | $b00-$bff IDE-Select 3 (Port 1, Register set 1) |
51 | |
52 | $c00-$cff IDE-Select 4 (Port 2, Register set 0, |
53 | Catweasel only!) |
54 | |
55 | $d00-$dff IDE-Select 5 (Port 3, Register set 1, |
56 | Catweasel only!) |
57 | |
58 | $e00-$eff local expansion port, on Catweasel Z-II the |
59 | Catweasel registers are also mapped here. |
60 | Never touch, use multidisk.device! |
61 | |
62 | $f00 read only, Byte-access: Bit 7 shows the |
63 | level of the IRQ-line of IDE port 0. |
64 | |
65 | $f01-$f3f mirror of $f00 |
66 | |
67 | $f40 read only, Byte-access: Bit 7 shows the |
68 | level of the IRQ-line of IDE port 1. |
69 | |
70 | $f41-$f7f mirror of $f40 |
71 | |
72 | $f80 read only, Byte-access: Bit 7 shows the |
73 | level of the IRQ-line of IDE port 2. |
74 | (Catweasel only!) |
75 | |
76 | $f81-$fbf mirror of $f80 |
77 | |
78 | $fc0 write-only: Writing any value to this |
79 | register enables IRQs to be passed from the |
80 | IDE ports to the Zorro bus. This mechanism |
81 | has been implemented to be compatible with |
82 | harddisks that are either defective or have |
83 | a buggy firmware and pull the IRQ line up |
84 | while starting up. If interrupts would |
85 | always be passed to the bus, the computer |
86 | might not start up. Once enabled, this flag |
87 | can not be disabled again. The level of the |
88 | flag can not be determined by software |
89 | (what for? Write to me if it's necessary!). |
90 | |
91 | $fc1-$fff mirror of $fc0 |
92 | |
93 | $1000-$ffff Buddha-Rom with offset $1000 in the rom |
94 | chip. The addresses $0 to $fff of the rom |
95 | chip cannot be read. Rom is Byte-wide and |
96 | mapped to even addresses. |
97 | |
98 | The IDE ports issue an INT2. You can read the level of the |
99 | IRQ-lines of the IDE-ports by reading from the three (two |
100 | for Buddha-only) registers $f00, $f40 and $f80. This way |
101 | more than one I/O request can be handled and you can easily |
102 | determine what driver has to serve the INT2. Buddha and |
103 | Catweasel expansion boards can issue an INT6. A separate |
104 | memory map is available for the I/O module and the sysop's |
105 | I/O module. |
106 | |
107 | The IDE ports are fed by the address lines A2 to A4, just as |
108 | the Amiga 1200 and Amiga 4000 IDE ports are. This way |
109 | existing drivers can be easily ported to Buddha. A move.l |
110 | polls two words out of the same address of IDE port since |
111 | every word is mirrored once. movem is not possible, but |
112 | it's not necessary either, because you can only speedup |
113 | 68000 systems with this technique. A 68020 system with |
114 | fastmem is faster with move.l. |
115 | |
116 | If you're using the mirrored registers of the IDE-ports with |
117 | A6=1, the Buddha doesn't care about the speed that you have |
118 | selected in the speed register (see further down). With |
119 | A6=1 (for example $840 for port 0, register set 0), a 780ns |
120 | access is being made. These registers should be used for a |
121 | command access to the harddisk/CD-Rom, since command |
122 | accesses are Byte-wide and have to be made slower according |
123 | to the ATA-X3T9 manual. |
124 | |
125 | Now for the speed-register: The register is byte-wide, and |
126 | only the upper three bits are used (Bits 7 to 5). Bit 4 |
127 | must always be set to 1 to be compatible with later Buddha |
128 | versions (if I'll ever update this one). I presume that |
129 | I'll never use the lower four bits, but they have to be set |
130 | to 1 by definition. |
131 | The values in this table have to be shifted 5 bits to the |
132 | left and or'd with $1f (this sets the lower 5 bits). |
133 | |
134 | All the timings have in common: Select and IOR/IOW rise at |
135 | the same time. IOR and IOW have a propagation delay of |
136 | about 30ns to the clocks on the Zorro bus, that's why the |
137 | values are no multiple of 71. One clock-cycle is 71ns long |
138 | (exactly 70,5 at 14,18 Mhz on PAL systems). |
139 | |
140 | value 0 (Default after reset) |
141 | |
142 | 497ns Select (7 clock cycles) , IOR/IOW after 172ns (2 clock cycles) |
143 | (same timing as the Amiga 1200 does on it's IDE port without |
144 | accelerator card) |
145 | |
146 | value 1 |
147 | |
148 | 639ns Select (9 clock cycles), IOR/IOW after 243ns (3 clock cycles) |
149 | |
150 | value 2 |
151 | |
152 | 781ns Select (11 clock cycles), IOR/IOW after 314ns (4 clock cycles) |
153 | |
154 | value 3 |
155 | |
156 | 355ns Select (5 clock cycles), IOR/IOW after 101ns (1 clock cycle) |
157 | |
158 | value 4 |
159 | |
160 | 355ns Select (5 clock cycles), IOR/IOW after 172ns (2 clock cycles) |
161 | |
162 | value 5 |
163 | |
164 | 355ns Select (5 clock cycles), IOR/IOW after 243ns (3 clock cycles) |
165 | |
166 | value 6 |
167 | |
168 | 1065ns Select (15 clock cycles), IOR/IOW after 314ns (4 clock cycles) |
169 | |
170 | value 7 |
171 | |
172 | 355ns Select, (5 clock cycles), IOR/IOW after 101ns (1 clock cycle) |
173 | |
174 | When accessing IDE registers with A6=1 (for example $84x), |
175 | the timing will always be mode 0 8-bit compatible, no matter |
176 | what you have selected in the speed register: |
177 | |
178 | 781ns select, IOR/IOW after 4 clock cycles (=314ns) aktive. |
179 | |
180 | All the timings with a very short select-signal (the 355ns |
181 | fast accesses) depend on the accelerator card used in the |
182 | system: Sometimes two more clock cycles are inserted by the |
183 | bus interface, making the whole access 497ns long. This |
184 | doesn't affect the reliability of the controller nor the |
185 | performance of the card, since this doesn't happen very |
186 | often. |
187 | |
188 | All the timings are calculated and only confirmed by |
189 | measurements that allowed me to count the clock cycles. If |
190 | the system is clocked by an oscillator other than 28,37516 |
191 | Mhz (for example the NTSC-frequency 28,63636 Mhz), each |
192 | clock cycle is shortened to a bit less than 70ns (not worth |
193 | mentioning). You could think of a small performance boost |
194 | by overclocking the system, but you would either need a |
195 | multisync monitor, or a graphics card, and your internal |
196 | diskdrive would go crazy, that's why you shouldn't tune your |
197 | Amiga this way. |
198 | |
199 | Giving you the possibility to write software that is |
200 | compatible with both the Buddha and the Catweasel Z-II, The |
201 | Buddha acts just like a Catweasel Z-II with no device |
202 | connected to the third IDE-port. The IRQ-register $f80 |
203 | always shows a "no IRQ here" on the Buddha, and accesses to |
204 | the third IDE port are going into data's Nirwana on the |
205 | Buddha. |
206 | |
207 | Jens Schönfeld february 19th, 1997 |
208 | updated may 27th, 1997 |
209 | eMail: sysop@nostlgic.tng.oche.de |
210 |