Contents of /alx-src/tags/kernel26-2.6.12-alx-r9/drivers/serial/sunzilog.c
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Wed Mar 4 11:03:09 2009 UTC (15 years, 6 months ago) by niro
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Wed Mar 4 11:03:09 2009 UTC (15 years, 6 months ago) by niro
File MIME type: text/plain
File size: 45029 byte(s)
Tag kernel26-2.6.12-alx-r9
1 | /* |
2 | * sunzilog.c |
3 | * |
4 | * Driver for Zilog serial chips found on Sun workstations and |
5 | * servers. This driver could actually be made more generic. |
6 | * |
7 | * This is based on the old drivers/sbus/char/zs.c code. A lot |
8 | * of code has been simply moved over directly from there but |
9 | * much has been rewritten. Credits therefore go out to Eddie |
10 | * C. Dost, Pete Zaitcev, Ted Ts'o and Alex Buell for their |
11 | * work there. |
12 | * |
13 | * Copyright (C) 2002 David S. Miller (davem@redhat.com) |
14 | */ |
15 | |
16 | #include <linux/config.h> |
17 | #include <linux/module.h> |
18 | #include <linux/kernel.h> |
19 | #include <linux/sched.h> |
20 | #include <linux/errno.h> |
21 | #include <linux/delay.h> |
22 | #include <linux/tty.h> |
23 | #include <linux/tty_flip.h> |
24 | #include <linux/major.h> |
25 | #include <linux/string.h> |
26 | #include <linux/ptrace.h> |
27 | #include <linux/ioport.h> |
28 | #include <linux/slab.h> |
29 | #include <linux/circ_buf.h> |
30 | #include <linux/serial.h> |
31 | #include <linux/sysrq.h> |
32 | #include <linux/console.h> |
33 | #include <linux/spinlock.h> |
34 | #ifdef CONFIG_SERIO |
35 | #include <linux/serio.h> |
36 | #endif |
37 | #include <linux/init.h> |
38 | |
39 | #include <asm/io.h> |
40 | #include <asm/irq.h> |
41 | #ifdef CONFIG_SPARC64 |
42 | #include <asm/fhc.h> |
43 | #endif |
44 | #include <asm/sbus.h> |
45 | |
46 | #if defined(CONFIG_SERIAL_SUNZILOG_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) |
47 | #define SUPPORT_SYSRQ |
48 | #endif |
49 | |
50 | #include <linux/serial_core.h> |
51 | |
52 | #include "suncore.h" |
53 | #include "sunzilog.h" |
54 | |
55 | /* On 32-bit sparcs we need to delay after register accesses |
56 | * to accommodate sun4 systems, but we do not need to flush writes. |
57 | * On 64-bit sparc we only need to flush single writes to ensure |
58 | * completion. |
59 | */ |
60 | #ifndef CONFIG_SPARC64 |
61 | #define ZSDELAY() udelay(5) |
62 | #define ZSDELAY_LONG() udelay(20) |
63 | #define ZS_WSYNC(channel) do { } while (0) |
64 | #else |
65 | #define ZSDELAY() |
66 | #define ZSDELAY_LONG() |
67 | #define ZS_WSYNC(__channel) \ |
68 | sbus_readb(&((__channel)->control)) |
69 | #endif |
70 | |
71 | static int num_sunzilog; |
72 | #define NUM_SUNZILOG num_sunzilog |
73 | #define NUM_CHANNELS (NUM_SUNZILOG * 2) |
74 | |
75 | #define KEYBOARD_LINE 0x2 |
76 | #define MOUSE_LINE 0x3 |
77 | |
78 | #define ZS_CLOCK 4915200 /* Zilog input clock rate. */ |
79 | #define ZS_CLOCK_DIVISOR 16 /* Divisor this driver uses. */ |
80 | |
81 | /* |
82 | * We wrap our port structure around the generic uart_port. |
83 | */ |
84 | struct uart_sunzilog_port { |
85 | struct uart_port port; |
86 | |
87 | /* IRQ servicing chain. */ |
88 | struct uart_sunzilog_port *next; |
89 | |
90 | /* Current values of Zilog write registers. */ |
91 | unsigned char curregs[NUM_ZSREGS]; |
92 | |
93 | unsigned int flags; |
94 | #define SUNZILOG_FLAG_CONS_KEYB 0x00000001 |
95 | #define SUNZILOG_FLAG_CONS_MOUSE 0x00000002 |
96 | #define SUNZILOG_FLAG_IS_CONS 0x00000004 |
97 | #define SUNZILOG_FLAG_IS_KGDB 0x00000008 |
98 | #define SUNZILOG_FLAG_MODEM_STATUS 0x00000010 |
99 | #define SUNZILOG_FLAG_IS_CHANNEL_A 0x00000020 |
100 | #define SUNZILOG_FLAG_REGS_HELD 0x00000040 |
101 | #define SUNZILOG_FLAG_TX_STOPPED 0x00000080 |
102 | #define SUNZILOG_FLAG_TX_ACTIVE 0x00000100 |
103 | |
104 | unsigned int cflag; |
105 | |
106 | unsigned char parity_mask; |
107 | unsigned char prev_status; |
108 | |
109 | #ifdef CONFIG_SERIO |
110 | struct serio *serio; |
111 | int serio_open; |
112 | #endif |
113 | }; |
114 | |
115 | #define ZILOG_CHANNEL_FROM_PORT(PORT) ((struct zilog_channel __iomem *)((PORT)->membase)) |
116 | #define UART_ZILOG(PORT) ((struct uart_sunzilog_port *)(PORT)) |
117 | |
118 | #define ZS_IS_KEYB(UP) ((UP)->flags & SUNZILOG_FLAG_CONS_KEYB) |
119 | #define ZS_IS_MOUSE(UP) ((UP)->flags & SUNZILOG_FLAG_CONS_MOUSE) |
120 | #define ZS_IS_CONS(UP) ((UP)->flags & SUNZILOG_FLAG_IS_CONS) |
121 | #define ZS_IS_KGDB(UP) ((UP)->flags & SUNZILOG_FLAG_IS_KGDB) |
122 | #define ZS_WANTS_MODEM_STATUS(UP) ((UP)->flags & SUNZILOG_FLAG_MODEM_STATUS) |
123 | #define ZS_IS_CHANNEL_A(UP) ((UP)->flags & SUNZILOG_FLAG_IS_CHANNEL_A) |
124 | #define ZS_REGS_HELD(UP) ((UP)->flags & SUNZILOG_FLAG_REGS_HELD) |
125 | #define ZS_TX_STOPPED(UP) ((UP)->flags & SUNZILOG_FLAG_TX_STOPPED) |
126 | #define ZS_TX_ACTIVE(UP) ((UP)->flags & SUNZILOG_FLAG_TX_ACTIVE) |
127 | |
128 | /* Reading and writing Zilog8530 registers. The delays are to make this |
129 | * driver work on the Sun4 which needs a settling delay after each chip |
130 | * register access, other machines handle this in hardware via auxiliary |
131 | * flip-flops which implement the settle time we do in software. |
132 | * |
133 | * The port lock must be held and local IRQs must be disabled |
134 | * when {read,write}_zsreg is invoked. |
135 | */ |
136 | static unsigned char read_zsreg(struct zilog_channel __iomem *channel, |
137 | unsigned char reg) |
138 | { |
139 | unsigned char retval; |
140 | |
141 | sbus_writeb(reg, &channel->control); |
142 | ZSDELAY(); |
143 | retval = sbus_readb(&channel->control); |
144 | ZSDELAY(); |
145 | |
146 | return retval; |
147 | } |
148 | |
149 | static void write_zsreg(struct zilog_channel __iomem *channel, |
150 | unsigned char reg, unsigned char value) |
151 | { |
152 | sbus_writeb(reg, &channel->control); |
153 | ZSDELAY(); |
154 | sbus_writeb(value, &channel->control); |
155 | ZSDELAY(); |
156 | } |
157 | |
158 | static void sunzilog_clear_fifo(struct zilog_channel __iomem *channel) |
159 | { |
160 | int i; |
161 | |
162 | for (i = 0; i < 32; i++) { |
163 | unsigned char regval; |
164 | |
165 | regval = sbus_readb(&channel->control); |
166 | ZSDELAY(); |
167 | if (regval & Rx_CH_AV) |
168 | break; |
169 | |
170 | regval = read_zsreg(channel, R1); |
171 | sbus_readb(&channel->data); |
172 | ZSDELAY(); |
173 | |
174 | if (regval & (PAR_ERR | Rx_OVR | CRC_ERR)) { |
175 | sbus_writeb(ERR_RES, &channel->control); |
176 | ZSDELAY(); |
177 | ZS_WSYNC(channel); |
178 | } |
179 | } |
180 | } |
181 | |
182 | /* This function must only be called when the TX is not busy. The UART |
183 | * port lock must be held and local interrupts disabled. |
184 | */ |
185 | static void __load_zsregs(struct zilog_channel __iomem *channel, unsigned char *regs) |
186 | { |
187 | int i; |
188 | |
189 | /* Let pending transmits finish. */ |
190 | for (i = 0; i < 1000; i++) { |
191 | unsigned char stat = read_zsreg(channel, R1); |
192 | if (stat & ALL_SNT) |
193 | break; |
194 | udelay(100); |
195 | } |
196 | |
197 | sbus_writeb(ERR_RES, &channel->control); |
198 | ZSDELAY(); |
199 | ZS_WSYNC(channel); |
200 | |
201 | sunzilog_clear_fifo(channel); |
202 | |
203 | /* Disable all interrupts. */ |
204 | write_zsreg(channel, R1, |
205 | regs[R1] & ~(RxINT_MASK | TxINT_ENAB | EXT_INT_ENAB)); |
206 | |
207 | /* Set parity, sync config, stop bits, and clock divisor. */ |
208 | write_zsreg(channel, R4, regs[R4]); |
209 | |
210 | /* Set misc. TX/RX control bits. */ |
211 | write_zsreg(channel, R10, regs[R10]); |
212 | |
213 | /* Set TX/RX controls sans the enable bits. */ |
214 | write_zsreg(channel, R3, regs[R3] & ~RxENAB); |
215 | write_zsreg(channel, R5, regs[R5] & ~TxENAB); |
216 | |
217 | /* Synchronous mode config. */ |
218 | write_zsreg(channel, R6, regs[R6]); |
219 | write_zsreg(channel, R7, regs[R7]); |
220 | |
221 | /* Don't mess with the interrupt vector (R2, unused by us) and |
222 | * master interrupt control (R9). We make sure this is setup |
223 | * properly at probe time then never touch it again. |
224 | */ |
225 | |
226 | /* Disable baud generator. */ |
227 | write_zsreg(channel, R14, regs[R14] & ~BRENAB); |
228 | |
229 | /* Clock mode control. */ |
230 | write_zsreg(channel, R11, regs[R11]); |
231 | |
232 | /* Lower and upper byte of baud rate generator divisor. */ |
233 | write_zsreg(channel, R12, regs[R12]); |
234 | write_zsreg(channel, R13, regs[R13]); |
235 | |
236 | /* Now rewrite R14, with BRENAB (if set). */ |
237 | write_zsreg(channel, R14, regs[R14]); |
238 | |
239 | /* External status interrupt control. */ |
240 | write_zsreg(channel, R15, regs[R15]); |
241 | |
242 | /* Reset external status interrupts. */ |
243 | write_zsreg(channel, R0, RES_EXT_INT); |
244 | write_zsreg(channel, R0, RES_EXT_INT); |
245 | |
246 | /* Rewrite R3/R5, this time without enables masked. */ |
247 | write_zsreg(channel, R3, regs[R3]); |
248 | write_zsreg(channel, R5, regs[R5]); |
249 | |
250 | /* Rewrite R1, this time without IRQ enabled masked. */ |
251 | write_zsreg(channel, R1, regs[R1]); |
252 | } |
253 | |
254 | /* Reprogram the Zilog channel HW registers with the copies found in the |
255 | * software state struct. If the transmitter is busy, we defer this update |
256 | * until the next TX complete interrupt. Else, we do it right now. |
257 | * |
258 | * The UART port lock must be held and local interrupts disabled. |
259 | */ |
260 | static void sunzilog_maybe_update_regs(struct uart_sunzilog_port *up, |
261 | struct zilog_channel __iomem *channel) |
262 | { |
263 | if (!ZS_REGS_HELD(up)) { |
264 | if (ZS_TX_ACTIVE(up)) { |
265 | up->flags |= SUNZILOG_FLAG_REGS_HELD; |
266 | } else { |
267 | __load_zsregs(channel, up->curregs); |
268 | } |
269 | } |
270 | } |
271 | |
272 | static void sunzilog_change_mouse_baud(struct uart_sunzilog_port *up) |
273 | { |
274 | unsigned int cur_cflag = up->cflag; |
275 | int brg, new_baud; |
276 | |
277 | up->cflag &= ~CBAUD; |
278 | up->cflag |= suncore_mouse_baud_cflag_next(cur_cflag, &new_baud); |
279 | |
280 | brg = BPS_TO_BRG(new_baud, ZS_CLOCK / ZS_CLOCK_DIVISOR); |
281 | up->curregs[R12] = (brg & 0xff); |
282 | up->curregs[R13] = (brg >> 8) & 0xff; |
283 | sunzilog_maybe_update_regs(up, ZILOG_CHANNEL_FROM_PORT(&up->port)); |
284 | } |
285 | |
286 | static void sunzilog_kbdms_receive_chars(struct uart_sunzilog_port *up, |
287 | unsigned char ch, int is_break, |
288 | struct pt_regs *regs) |
289 | { |
290 | if (ZS_IS_KEYB(up)) { |
291 | /* Stop-A is handled by drivers/char/keyboard.c now. */ |
292 | #ifdef CONFIG_SERIO |
293 | if (up->serio_open) |
294 | serio_interrupt(up->serio, ch, 0, regs); |
295 | #endif |
296 | } else if (ZS_IS_MOUSE(up)) { |
297 | int ret = suncore_mouse_baud_detection(ch, is_break); |
298 | |
299 | switch (ret) { |
300 | case 2: |
301 | sunzilog_change_mouse_baud(up); |
302 | /* fallthru */ |
303 | case 1: |
304 | break; |
305 | |
306 | case 0: |
307 | #ifdef CONFIG_SERIO |
308 | if (up->serio_open) |
309 | serio_interrupt(up->serio, ch, 0, regs); |
310 | #endif |
311 | break; |
312 | }; |
313 | } |
314 | } |
315 | |
316 | static struct tty_struct * |
317 | sunzilog_receive_chars(struct uart_sunzilog_port *up, |
318 | struct zilog_channel __iomem *channel, |
319 | struct pt_regs *regs) |
320 | { |
321 | struct tty_struct *tty; |
322 | unsigned char ch, r1; |
323 | |
324 | tty = NULL; |
325 | if (up->port.info != NULL && /* Unopened serial console */ |
326 | up->port.info->tty != NULL) /* Keyboard || mouse */ |
327 | tty = up->port.info->tty; |
328 | |
329 | for (;;) { |
330 | |
331 | r1 = read_zsreg(channel, R1); |
332 | if (r1 & (PAR_ERR | Rx_OVR | CRC_ERR)) { |
333 | sbus_writeb(ERR_RES, &channel->control); |
334 | ZSDELAY(); |
335 | ZS_WSYNC(channel); |
336 | } |
337 | |
338 | ch = sbus_readb(&channel->control); |
339 | ZSDELAY(); |
340 | |
341 | /* This funny hack depends upon BRK_ABRT not interfering |
342 | * with the other bits we care about in R1. |
343 | */ |
344 | if (ch & BRK_ABRT) |
345 | r1 |= BRK_ABRT; |
346 | |
347 | if (!(ch & Rx_CH_AV)) |
348 | break; |
349 | |
350 | ch = sbus_readb(&channel->data); |
351 | ZSDELAY(); |
352 | |
353 | ch &= up->parity_mask; |
354 | |
355 | if (unlikely(ZS_IS_KEYB(up)) || unlikely(ZS_IS_MOUSE(up))) { |
356 | sunzilog_kbdms_receive_chars(up, ch, 0, regs); |
357 | continue; |
358 | } |
359 | |
360 | if (tty == NULL) { |
361 | uart_handle_sysrq_char(&up->port, ch, regs); |
362 | continue; |
363 | } |
364 | |
365 | if (unlikely(tty->flip.count >= TTY_FLIPBUF_SIZE)) { |
366 | tty->flip.work.func((void *)tty); |
367 | /* |
368 | * The 8250 bails out of the loop here, |
369 | * but we need to read everything, or die. |
370 | */ |
371 | if (tty->flip.count >= TTY_FLIPBUF_SIZE) |
372 | continue; |
373 | } |
374 | |
375 | /* A real serial line, record the character and status. */ |
376 | *tty->flip.char_buf_ptr = ch; |
377 | *tty->flip.flag_buf_ptr = TTY_NORMAL; |
378 | up->port.icount.rx++; |
379 | if (r1 & (BRK_ABRT | PAR_ERR | Rx_OVR | CRC_ERR)) { |
380 | if (r1 & BRK_ABRT) { |
381 | r1 &= ~(PAR_ERR | CRC_ERR); |
382 | up->port.icount.brk++; |
383 | if (uart_handle_break(&up->port)) |
384 | continue; |
385 | } |
386 | else if (r1 & PAR_ERR) |
387 | up->port.icount.parity++; |
388 | else if (r1 & CRC_ERR) |
389 | up->port.icount.frame++; |
390 | if (r1 & Rx_OVR) |
391 | up->port.icount.overrun++; |
392 | r1 &= up->port.read_status_mask; |
393 | if (r1 & BRK_ABRT) |
394 | *tty->flip.flag_buf_ptr = TTY_BREAK; |
395 | else if (r1 & PAR_ERR) |
396 | *tty->flip.flag_buf_ptr = TTY_PARITY; |
397 | else if (r1 & CRC_ERR) |
398 | *tty->flip.flag_buf_ptr = TTY_FRAME; |
399 | } |
400 | if (uart_handle_sysrq_char(&up->port, ch, regs)) |
401 | continue; |
402 | |
403 | if (up->port.ignore_status_mask == 0xff || |
404 | (r1 & up->port.ignore_status_mask) == 0) { |
405 | tty->flip.flag_buf_ptr++; |
406 | tty->flip.char_buf_ptr++; |
407 | tty->flip.count++; |
408 | } |
409 | if ((r1 & Rx_OVR) && |
410 | tty->flip.count < TTY_FLIPBUF_SIZE) { |
411 | *tty->flip.flag_buf_ptr = TTY_OVERRUN; |
412 | tty->flip.flag_buf_ptr++; |
413 | tty->flip.char_buf_ptr++; |
414 | tty->flip.count++; |
415 | } |
416 | } |
417 | |
418 | return tty; |
419 | } |
420 | |
421 | static void sunzilog_status_handle(struct uart_sunzilog_port *up, |
422 | struct zilog_channel __iomem *channel, |
423 | struct pt_regs *regs) |
424 | { |
425 | unsigned char status; |
426 | |
427 | status = sbus_readb(&channel->control); |
428 | ZSDELAY(); |
429 | |
430 | sbus_writeb(RES_EXT_INT, &channel->control); |
431 | ZSDELAY(); |
432 | ZS_WSYNC(channel); |
433 | |
434 | if (status & BRK_ABRT) { |
435 | if (ZS_IS_MOUSE(up)) |
436 | sunzilog_kbdms_receive_chars(up, 0, 1, regs); |
437 | if (ZS_IS_CONS(up)) { |
438 | /* Wait for BREAK to deassert to avoid potentially |
439 | * confusing the PROM. |
440 | */ |
441 | while (1) { |
442 | status = sbus_readb(&channel->control); |
443 | ZSDELAY(); |
444 | if (!(status & BRK_ABRT)) |
445 | break; |
446 | } |
447 | sun_do_break(); |
448 | return; |
449 | } |
450 | } |
451 | |
452 | if (ZS_WANTS_MODEM_STATUS(up)) { |
453 | if (status & SYNC) |
454 | up->port.icount.dsr++; |
455 | |
456 | /* The Zilog just gives us an interrupt when DCD/CTS/etc. change. |
457 | * But it does not tell us which bit has changed, we have to keep |
458 | * track of this ourselves. |
459 | */ |
460 | if ((status ^ up->prev_status) ^ DCD) |
461 | uart_handle_dcd_change(&up->port, |
462 | (status & DCD)); |
463 | if ((status ^ up->prev_status) ^ CTS) |
464 | uart_handle_cts_change(&up->port, |
465 | (status & CTS)); |
466 | |
467 | wake_up_interruptible(&up->port.info->delta_msr_wait); |
468 | } |
469 | |
470 | up->prev_status = status; |
471 | } |
472 | |
473 | static void sunzilog_transmit_chars(struct uart_sunzilog_port *up, |
474 | struct zilog_channel __iomem *channel) |
475 | { |
476 | struct circ_buf *xmit; |
477 | |
478 | if (ZS_IS_CONS(up)) { |
479 | unsigned char status = sbus_readb(&channel->control); |
480 | ZSDELAY(); |
481 | |
482 | /* TX still busy? Just wait for the next TX done interrupt. |
483 | * |
484 | * It can occur because of how we do serial console writes. It would |
485 | * be nice to transmit console writes just like we normally would for |
486 | * a TTY line. (ie. buffered and TX interrupt driven). That is not |
487 | * easy because console writes cannot sleep. One solution might be |
488 | * to poll on enough port->xmit space becomming free. -DaveM |
489 | */ |
490 | if (!(status & Tx_BUF_EMP)) |
491 | return; |
492 | } |
493 | |
494 | up->flags &= ~SUNZILOG_FLAG_TX_ACTIVE; |
495 | |
496 | if (ZS_REGS_HELD(up)) { |
497 | __load_zsregs(channel, up->curregs); |
498 | up->flags &= ~SUNZILOG_FLAG_REGS_HELD; |
499 | } |
500 | |
501 | if (ZS_TX_STOPPED(up)) { |
502 | up->flags &= ~SUNZILOG_FLAG_TX_STOPPED; |
503 | goto ack_tx_int; |
504 | } |
505 | |
506 | if (up->port.x_char) { |
507 | up->flags |= SUNZILOG_FLAG_TX_ACTIVE; |
508 | sbus_writeb(up->port.x_char, &channel->data); |
509 | ZSDELAY(); |
510 | ZS_WSYNC(channel); |
511 | |
512 | up->port.icount.tx++; |
513 | up->port.x_char = 0; |
514 | return; |
515 | } |
516 | |
517 | if (up->port.info == NULL) |
518 | goto ack_tx_int; |
519 | xmit = &up->port.info->xmit; |
520 | if (uart_circ_empty(xmit)) { |
521 | uart_write_wakeup(&up->port); |
522 | goto ack_tx_int; |
523 | } |
524 | if (uart_tx_stopped(&up->port)) |
525 | goto ack_tx_int; |
526 | |
527 | up->flags |= SUNZILOG_FLAG_TX_ACTIVE; |
528 | sbus_writeb(xmit->buf[xmit->tail], &channel->data); |
529 | ZSDELAY(); |
530 | ZS_WSYNC(channel); |
531 | |
532 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); |
533 | up->port.icount.tx++; |
534 | |
535 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) |
536 | uart_write_wakeup(&up->port); |
537 | |
538 | return; |
539 | |
540 | ack_tx_int: |
541 | sbus_writeb(RES_Tx_P, &channel->control); |
542 | ZSDELAY(); |
543 | ZS_WSYNC(channel); |
544 | } |
545 | |
546 | static irqreturn_t sunzilog_interrupt(int irq, void *dev_id, struct pt_regs *regs) |
547 | { |
548 | struct uart_sunzilog_port *up = dev_id; |
549 | |
550 | while (up) { |
551 | struct zilog_channel __iomem *channel |
552 | = ZILOG_CHANNEL_FROM_PORT(&up->port); |
553 | struct tty_struct *tty; |
554 | unsigned char r3; |
555 | |
556 | spin_lock(&up->port.lock); |
557 | r3 = read_zsreg(channel, R3); |
558 | |
559 | /* Channel A */ |
560 | tty = NULL; |
561 | if (r3 & (CHAEXT | CHATxIP | CHARxIP)) { |
562 | sbus_writeb(RES_H_IUS, &channel->control); |
563 | ZSDELAY(); |
564 | ZS_WSYNC(channel); |
565 | |
566 | if (r3 & CHARxIP) |
567 | tty = sunzilog_receive_chars(up, channel, regs); |
568 | if (r3 & CHAEXT) |
569 | sunzilog_status_handle(up, channel, regs); |
570 | if (r3 & CHATxIP) |
571 | sunzilog_transmit_chars(up, channel); |
572 | } |
573 | spin_unlock(&up->port.lock); |
574 | |
575 | if (tty) |
576 | tty_flip_buffer_push(tty); |
577 | |
578 | /* Channel B */ |
579 | up = up->next; |
580 | channel = ZILOG_CHANNEL_FROM_PORT(&up->port); |
581 | |
582 | spin_lock(&up->port.lock); |
583 | tty = NULL; |
584 | if (r3 & (CHBEXT | CHBTxIP | CHBRxIP)) { |
585 | sbus_writeb(RES_H_IUS, &channel->control); |
586 | ZSDELAY(); |
587 | ZS_WSYNC(channel); |
588 | |
589 | if (r3 & CHBRxIP) |
590 | tty = sunzilog_receive_chars(up, channel, regs); |
591 | if (r3 & CHBEXT) |
592 | sunzilog_status_handle(up, channel, regs); |
593 | if (r3 & CHBTxIP) |
594 | sunzilog_transmit_chars(up, channel); |
595 | } |
596 | spin_unlock(&up->port.lock); |
597 | |
598 | if (tty) |
599 | tty_flip_buffer_push(tty); |
600 | |
601 | up = up->next; |
602 | } |
603 | |
604 | return IRQ_HANDLED; |
605 | } |
606 | |
607 | /* A convenient way to quickly get R0 status. The caller must _not_ hold the |
608 | * port lock, it is acquired here. |
609 | */ |
610 | static __inline__ unsigned char sunzilog_read_channel_status(struct uart_port *port) |
611 | { |
612 | struct zilog_channel __iomem *channel; |
613 | unsigned long flags; |
614 | unsigned char status; |
615 | |
616 | spin_lock_irqsave(&port->lock, flags); |
617 | |
618 | channel = ZILOG_CHANNEL_FROM_PORT(port); |
619 | status = sbus_readb(&channel->control); |
620 | ZSDELAY(); |
621 | |
622 | spin_unlock_irqrestore(&port->lock, flags); |
623 | |
624 | return status; |
625 | } |
626 | |
627 | /* The port lock is not held. */ |
628 | static unsigned int sunzilog_tx_empty(struct uart_port *port) |
629 | { |
630 | unsigned char status; |
631 | unsigned int ret; |
632 | |
633 | status = sunzilog_read_channel_status(port); |
634 | if (status & Tx_BUF_EMP) |
635 | ret = TIOCSER_TEMT; |
636 | else |
637 | ret = 0; |
638 | |
639 | return ret; |
640 | } |
641 | |
642 | /* The port lock is not held. */ |
643 | static unsigned int sunzilog_get_mctrl(struct uart_port *port) |
644 | { |
645 | unsigned char status; |
646 | unsigned int ret; |
647 | |
648 | status = sunzilog_read_channel_status(port); |
649 | |
650 | ret = 0; |
651 | if (status & DCD) |
652 | ret |= TIOCM_CAR; |
653 | if (status & SYNC) |
654 | ret |= TIOCM_DSR; |
655 | if (status & CTS) |
656 | ret |= TIOCM_CTS; |
657 | |
658 | return ret; |
659 | } |
660 | |
661 | /* The port lock is held and interrupts are disabled. */ |
662 | static void sunzilog_set_mctrl(struct uart_port *port, unsigned int mctrl) |
663 | { |
664 | struct uart_sunzilog_port *up = (struct uart_sunzilog_port *) port; |
665 | struct zilog_channel __iomem *channel = ZILOG_CHANNEL_FROM_PORT(port); |
666 | unsigned char set_bits, clear_bits; |
667 | |
668 | set_bits = clear_bits = 0; |
669 | |
670 | if (mctrl & TIOCM_RTS) |
671 | set_bits |= RTS; |
672 | else |
673 | clear_bits |= RTS; |
674 | if (mctrl & TIOCM_DTR) |
675 | set_bits |= DTR; |
676 | else |
677 | clear_bits |= DTR; |
678 | |
679 | /* NOTE: Not subject to 'transmitter active' rule. */ |
680 | up->curregs[R5] |= set_bits; |
681 | up->curregs[R5] &= ~clear_bits; |
682 | write_zsreg(channel, R5, up->curregs[R5]); |
683 | } |
684 | |
685 | /* The port lock is held and interrupts are disabled. */ |
686 | static void sunzilog_stop_tx(struct uart_port *port, unsigned int tty_stop) |
687 | { |
688 | struct uart_sunzilog_port *up = (struct uart_sunzilog_port *) port; |
689 | |
690 | up->flags |= SUNZILOG_FLAG_TX_STOPPED; |
691 | } |
692 | |
693 | /* The port lock is held and interrupts are disabled. */ |
694 | static void sunzilog_start_tx(struct uart_port *port, unsigned int tty_start) |
695 | { |
696 | struct uart_sunzilog_port *up = (struct uart_sunzilog_port *) port; |
697 | struct zilog_channel __iomem *channel = ZILOG_CHANNEL_FROM_PORT(port); |
698 | unsigned char status; |
699 | |
700 | up->flags |= SUNZILOG_FLAG_TX_ACTIVE; |
701 | up->flags &= ~SUNZILOG_FLAG_TX_STOPPED; |
702 | |
703 | status = sbus_readb(&channel->control); |
704 | ZSDELAY(); |
705 | |
706 | /* TX busy? Just wait for the TX done interrupt. */ |
707 | if (!(status & Tx_BUF_EMP)) |
708 | return; |
709 | |
710 | /* Send the first character to jump-start the TX done |
711 | * IRQ sending engine. |
712 | */ |
713 | if (port->x_char) { |
714 | sbus_writeb(port->x_char, &channel->data); |
715 | ZSDELAY(); |
716 | ZS_WSYNC(channel); |
717 | |
718 | port->icount.tx++; |
719 | port->x_char = 0; |
720 | } else { |
721 | struct circ_buf *xmit = &port->info->xmit; |
722 | |
723 | sbus_writeb(xmit->buf[xmit->tail], &channel->data); |
724 | ZSDELAY(); |
725 | ZS_WSYNC(channel); |
726 | |
727 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); |
728 | port->icount.tx++; |
729 | |
730 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) |
731 | uart_write_wakeup(&up->port); |
732 | } |
733 | } |
734 | |
735 | /* The port lock is held. */ |
736 | static void sunzilog_stop_rx(struct uart_port *port) |
737 | { |
738 | struct uart_sunzilog_port *up = UART_ZILOG(port); |
739 | struct zilog_channel __iomem *channel; |
740 | |
741 | if (ZS_IS_CONS(up)) |
742 | return; |
743 | |
744 | channel = ZILOG_CHANNEL_FROM_PORT(port); |
745 | |
746 | /* Disable all RX interrupts. */ |
747 | up->curregs[R1] &= ~RxINT_MASK; |
748 | sunzilog_maybe_update_regs(up, channel); |
749 | } |
750 | |
751 | /* The port lock is held. */ |
752 | static void sunzilog_enable_ms(struct uart_port *port) |
753 | { |
754 | struct uart_sunzilog_port *up = (struct uart_sunzilog_port *) port; |
755 | struct zilog_channel __iomem *channel = ZILOG_CHANNEL_FROM_PORT(port); |
756 | unsigned char new_reg; |
757 | |
758 | new_reg = up->curregs[R15] | (DCDIE | SYNCIE | CTSIE); |
759 | if (new_reg != up->curregs[R15]) { |
760 | up->curregs[R15] = new_reg; |
761 | |
762 | /* NOTE: Not subject to 'transmitter active' rule. */ |
763 | write_zsreg(channel, R15, up->curregs[R15]); |
764 | } |
765 | } |
766 | |
767 | /* The port lock is not held. */ |
768 | static void sunzilog_break_ctl(struct uart_port *port, int break_state) |
769 | { |
770 | struct uart_sunzilog_port *up = (struct uart_sunzilog_port *) port; |
771 | struct zilog_channel __iomem *channel = ZILOG_CHANNEL_FROM_PORT(port); |
772 | unsigned char set_bits, clear_bits, new_reg; |
773 | unsigned long flags; |
774 | |
775 | set_bits = clear_bits = 0; |
776 | |
777 | if (break_state) |
778 | set_bits |= SND_BRK; |
779 | else |
780 | clear_bits |= SND_BRK; |
781 | |
782 | spin_lock_irqsave(&port->lock, flags); |
783 | |
784 | new_reg = (up->curregs[R5] | set_bits) & ~clear_bits; |
785 | if (new_reg != up->curregs[R5]) { |
786 | up->curregs[R5] = new_reg; |
787 | |
788 | /* NOTE: Not subject to 'transmitter active' rule. */ |
789 | write_zsreg(channel, R5, up->curregs[R5]); |
790 | } |
791 | |
792 | spin_unlock_irqrestore(&port->lock, flags); |
793 | } |
794 | |
795 | static void __sunzilog_startup(struct uart_sunzilog_port *up) |
796 | { |
797 | struct zilog_channel __iomem *channel; |
798 | |
799 | channel = ZILOG_CHANNEL_FROM_PORT(&up->port); |
800 | up->prev_status = sbus_readb(&channel->control); |
801 | |
802 | /* Enable receiver and transmitter. */ |
803 | up->curregs[R3] |= RxENAB; |
804 | up->curregs[R5] |= TxENAB; |
805 | |
806 | up->curregs[R1] |= EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB; |
807 | sunzilog_maybe_update_regs(up, channel); |
808 | } |
809 | |
810 | static int sunzilog_startup(struct uart_port *port) |
811 | { |
812 | struct uart_sunzilog_port *up = UART_ZILOG(port); |
813 | unsigned long flags; |
814 | |
815 | if (ZS_IS_CONS(up)) |
816 | return 0; |
817 | |
818 | spin_lock_irqsave(&port->lock, flags); |
819 | __sunzilog_startup(up); |
820 | spin_unlock_irqrestore(&port->lock, flags); |
821 | return 0; |
822 | } |
823 | |
824 | /* |
825 | * The test for ZS_IS_CONS is explained by the following e-mail: |
826 | ***** |
827 | * From: Russell King <rmk@arm.linux.org.uk> |
828 | * Date: Sun, 8 Dec 2002 10:18:38 +0000 |
829 | * |
830 | * On Sun, Dec 08, 2002 at 02:43:36AM -0500, Pete Zaitcev wrote: |
831 | * > I boot my 2.5 boxes using "console=ttyS0,9600" argument, |
832 | * > and I noticed that something is not right with reference |
833 | * > counting in this case. It seems that when the console |
834 | * > is open by kernel initially, this is not accounted |
835 | * > as an open, and uart_startup is not called. |
836 | * |
837 | * That is correct. We are unable to call uart_startup when the serial |
838 | * console is initialised because it may need to allocate memory (as |
839 | * request_irq does) and the memory allocators may not have been |
840 | * initialised. |
841 | * |
842 | * 1. initialise the port into a state where it can send characters in the |
843 | * console write method. |
844 | * |
845 | * 2. don't do the actual hardware shutdown in your shutdown() method (but |
846 | * do the normal software shutdown - ie, free irqs etc) |
847 | ***** |
848 | */ |
849 | static void sunzilog_shutdown(struct uart_port *port) |
850 | { |
851 | struct uart_sunzilog_port *up = UART_ZILOG(port); |
852 | struct zilog_channel __iomem *channel; |
853 | unsigned long flags; |
854 | |
855 | if (ZS_IS_CONS(up)) |
856 | return; |
857 | |
858 | spin_lock_irqsave(&port->lock, flags); |
859 | |
860 | channel = ZILOG_CHANNEL_FROM_PORT(port); |
861 | |
862 | /* Disable receiver and transmitter. */ |
863 | up->curregs[R3] &= ~RxENAB; |
864 | up->curregs[R5] &= ~TxENAB; |
865 | |
866 | /* Disable all interrupts and BRK assertion. */ |
867 | up->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK); |
868 | up->curregs[R5] &= ~SND_BRK; |
869 | sunzilog_maybe_update_regs(up, channel); |
870 | |
871 | spin_unlock_irqrestore(&port->lock, flags); |
872 | } |
873 | |
874 | /* Shared by TTY driver and serial console setup. The port lock is held |
875 | * and local interrupts are disabled. |
876 | */ |
877 | static void |
878 | sunzilog_convert_to_zs(struct uart_sunzilog_port *up, unsigned int cflag, |
879 | unsigned int iflag, int brg) |
880 | { |
881 | |
882 | up->curregs[R10] = NRZ; |
883 | up->curregs[R11] = TCBR | RCBR; |
884 | |
885 | /* Program BAUD and clock source. */ |
886 | up->curregs[R4] &= ~XCLK_MASK; |
887 | up->curregs[R4] |= X16CLK; |
888 | up->curregs[R12] = brg & 0xff; |
889 | up->curregs[R13] = (brg >> 8) & 0xff; |
890 | up->curregs[R14] = BRSRC | BRENAB; |
891 | |
892 | /* Character size, stop bits, and parity. */ |
893 | up->curregs[3] &= ~RxN_MASK; |
894 | up->curregs[5] &= ~TxN_MASK; |
895 | switch (cflag & CSIZE) { |
896 | case CS5: |
897 | up->curregs[3] |= Rx5; |
898 | up->curregs[5] |= Tx5; |
899 | up->parity_mask = 0x1f; |
900 | break; |
901 | case CS6: |
902 | up->curregs[3] |= Rx6; |
903 | up->curregs[5] |= Tx6; |
904 | up->parity_mask = 0x3f; |
905 | break; |
906 | case CS7: |
907 | up->curregs[3] |= Rx7; |
908 | up->curregs[5] |= Tx7; |
909 | up->parity_mask = 0x7f; |
910 | break; |
911 | case CS8: |
912 | default: |
913 | up->curregs[3] |= Rx8; |
914 | up->curregs[5] |= Tx8; |
915 | up->parity_mask = 0xff; |
916 | break; |
917 | }; |
918 | up->curregs[4] &= ~0x0c; |
919 | if (cflag & CSTOPB) |
920 | up->curregs[4] |= SB2; |
921 | else |
922 | up->curregs[4] |= SB1; |
923 | if (cflag & PARENB) |
924 | up->curregs[4] |= PAR_ENAB; |
925 | else |
926 | up->curregs[4] &= ~PAR_ENAB; |
927 | if (!(cflag & PARODD)) |
928 | up->curregs[4] |= PAR_EVEN; |
929 | else |
930 | up->curregs[4] &= ~PAR_EVEN; |
931 | |
932 | up->port.read_status_mask = Rx_OVR; |
933 | if (iflag & INPCK) |
934 | up->port.read_status_mask |= CRC_ERR | PAR_ERR; |
935 | if (iflag & (BRKINT | PARMRK)) |
936 | up->port.read_status_mask |= BRK_ABRT; |
937 | |
938 | up->port.ignore_status_mask = 0; |
939 | if (iflag & IGNPAR) |
940 | up->port.ignore_status_mask |= CRC_ERR | PAR_ERR; |
941 | if (iflag & IGNBRK) { |
942 | up->port.ignore_status_mask |= BRK_ABRT; |
943 | if (iflag & IGNPAR) |
944 | up->port.ignore_status_mask |= Rx_OVR; |
945 | } |
946 | |
947 | if ((cflag & CREAD) == 0) |
948 | up->port.ignore_status_mask = 0xff; |
949 | } |
950 | |
951 | /* The port lock is not held. */ |
952 | static void |
953 | sunzilog_set_termios(struct uart_port *port, struct termios *termios, |
954 | struct termios *old) |
955 | { |
956 | struct uart_sunzilog_port *up = (struct uart_sunzilog_port *) port; |
957 | unsigned long flags; |
958 | int baud, brg; |
959 | |
960 | baud = uart_get_baud_rate(port, termios, old, 1200, 76800); |
961 | |
962 | spin_lock_irqsave(&up->port.lock, flags); |
963 | |
964 | brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR); |
965 | |
966 | sunzilog_convert_to_zs(up, termios->c_cflag, termios->c_iflag, brg); |
967 | |
968 | if (UART_ENABLE_MS(&up->port, termios->c_cflag)) |
969 | up->flags |= SUNZILOG_FLAG_MODEM_STATUS; |
970 | else |
971 | up->flags &= ~SUNZILOG_FLAG_MODEM_STATUS; |
972 | |
973 | up->cflag = termios->c_cflag; |
974 | |
975 | sunzilog_maybe_update_regs(up, ZILOG_CHANNEL_FROM_PORT(port)); |
976 | |
977 | uart_update_timeout(port, termios->c_cflag, baud); |
978 | |
979 | spin_unlock_irqrestore(&up->port.lock, flags); |
980 | } |
981 | |
982 | static const char *sunzilog_type(struct uart_port *port) |
983 | { |
984 | return "SunZilog"; |
985 | } |
986 | |
987 | /* We do not request/release mappings of the registers here, this |
988 | * happens at early serial probe time. |
989 | */ |
990 | static void sunzilog_release_port(struct uart_port *port) |
991 | { |
992 | } |
993 | |
994 | static int sunzilog_request_port(struct uart_port *port) |
995 | { |
996 | return 0; |
997 | } |
998 | |
999 | /* These do not need to do anything interesting either. */ |
1000 | static void sunzilog_config_port(struct uart_port *port, int flags) |
1001 | { |
1002 | } |
1003 | |
1004 | /* We do not support letting the user mess with the divisor, IRQ, etc. */ |
1005 | static int sunzilog_verify_port(struct uart_port *port, struct serial_struct *ser) |
1006 | { |
1007 | return -EINVAL; |
1008 | } |
1009 | |
1010 | static struct uart_ops sunzilog_pops = { |
1011 | .tx_empty = sunzilog_tx_empty, |
1012 | .set_mctrl = sunzilog_set_mctrl, |
1013 | .get_mctrl = sunzilog_get_mctrl, |
1014 | .stop_tx = sunzilog_stop_tx, |
1015 | .start_tx = sunzilog_start_tx, |
1016 | .stop_rx = sunzilog_stop_rx, |
1017 | .enable_ms = sunzilog_enable_ms, |
1018 | .break_ctl = sunzilog_break_ctl, |
1019 | .startup = sunzilog_startup, |
1020 | .shutdown = sunzilog_shutdown, |
1021 | .set_termios = sunzilog_set_termios, |
1022 | .type = sunzilog_type, |
1023 | .release_port = sunzilog_release_port, |
1024 | .request_port = sunzilog_request_port, |
1025 | .config_port = sunzilog_config_port, |
1026 | .verify_port = sunzilog_verify_port, |
1027 | }; |
1028 | |
1029 | static struct uart_sunzilog_port *sunzilog_port_table; |
1030 | static struct zilog_layout __iomem **sunzilog_chip_regs; |
1031 | |
1032 | static struct uart_sunzilog_port *sunzilog_irq_chain; |
1033 | static int zilog_irq = -1; |
1034 | |
1035 | static struct uart_driver sunzilog_reg = { |
1036 | .owner = THIS_MODULE, |
1037 | .driver_name = "ttyS", |
1038 | .devfs_name = "tts/", |
1039 | .dev_name = "ttyS", |
1040 | .major = TTY_MAJOR, |
1041 | }; |
1042 | |
1043 | static void * __init alloc_one_table(unsigned long size) |
1044 | { |
1045 | void *ret; |
1046 | |
1047 | ret = kmalloc(size, GFP_KERNEL); |
1048 | if (ret != NULL) |
1049 | memset(ret, 0, size); |
1050 | |
1051 | return ret; |
1052 | } |
1053 | |
1054 | static void __init sunzilog_alloc_tables(void) |
1055 | { |
1056 | sunzilog_port_table = |
1057 | alloc_one_table(NUM_CHANNELS * sizeof(struct uart_sunzilog_port)); |
1058 | sunzilog_chip_regs = |
1059 | alloc_one_table(NUM_SUNZILOG * sizeof(struct zilog_layout __iomem *)); |
1060 | |
1061 | if (sunzilog_port_table == NULL || sunzilog_chip_regs == NULL) { |
1062 | prom_printf("SunZilog: Cannot allocate tables.\n"); |
1063 | prom_halt(); |
1064 | } |
1065 | } |
1066 | |
1067 | #ifdef CONFIG_SPARC64 |
1068 | |
1069 | /* We used to attempt to use the address property of the Zilog device node |
1070 | * but that totally is not necessary on sparc64. |
1071 | */ |
1072 | static struct zilog_layout __iomem * __init get_zs_sun4u(int chip, int zsnode) |
1073 | { |
1074 | unsigned long mapped_addr; |
1075 | unsigned int sun4u_ino; |
1076 | struct sbus_bus *sbus = NULL; |
1077 | struct sbus_dev *sdev = NULL; |
1078 | int err; |
1079 | |
1080 | if (central_bus == NULL) { |
1081 | for_each_sbus(sbus) { |
1082 | for_each_sbusdev(sdev, sbus) { |
1083 | if (sdev->prom_node == zsnode) |
1084 | goto found; |
1085 | } |
1086 | } |
1087 | } |
1088 | found: |
1089 | if (sdev == NULL && central_bus == NULL) { |
1090 | prom_printf("SunZilog: sdev&¢ral == NULL for " |
1091 | "Zilog %d in get_zs_sun4u.\n", chip); |
1092 | prom_halt(); |
1093 | } |
1094 | if (central_bus == NULL) { |
1095 | mapped_addr = |
1096 | sbus_ioremap(&sdev->resource[0], 0, |
1097 | PAGE_SIZE, |
1098 | "Zilog Registers"); |
1099 | } else { |
1100 | struct linux_prom_registers zsregs[1]; |
1101 | |
1102 | err = prom_getproperty(zsnode, "reg", |
1103 | (char *) &zsregs[0], |
1104 | sizeof(zsregs)); |
1105 | if (err == -1) { |
1106 | prom_printf("SunZilog: Cannot map " |
1107 | "Zilog %d regs on " |
1108 | "central bus.\n", chip); |
1109 | prom_halt(); |
1110 | } |
1111 | apply_fhc_ranges(central_bus->child, |
1112 | &zsregs[0], 1); |
1113 | apply_central_ranges(central_bus, &zsregs[0], 1); |
1114 | mapped_addr = |
1115 | (((u64)zsregs[0].which_io)<<32UL) | |
1116 | ((u64)zsregs[0].phys_addr); |
1117 | } |
1118 | |
1119 | if (zilog_irq == -1) { |
1120 | if (central_bus) { |
1121 | unsigned long iclr, imap; |
1122 | |
1123 | iclr = central_bus->child->fhc_regs.uregs |
1124 | + FHC_UREGS_ICLR; |
1125 | imap = central_bus->child->fhc_regs.uregs |
1126 | + FHC_UREGS_IMAP; |
1127 | zilog_irq = build_irq(12, 0, iclr, imap); |
1128 | } else { |
1129 | err = prom_getproperty(zsnode, "interrupts", |
1130 | (char *) &sun4u_ino, |
1131 | sizeof(sun4u_ino)); |
1132 | zilog_irq = sbus_build_irq(sbus_root, sun4u_ino); |
1133 | } |
1134 | } |
1135 | |
1136 | return (struct zilog_layout __iomem *) mapped_addr; |
1137 | } |
1138 | #else /* CONFIG_SPARC64 */ |
1139 | |
1140 | /* |
1141 | * XXX The sun4d case is utterly screwed: it tries to re-walk the tree |
1142 | * (for the 3rd time) in order to find bootbus and cpu. Streamline it. |
1143 | */ |
1144 | static struct zilog_layout __iomem * __init get_zs_sun4cmd(int chip, int node) |
1145 | { |
1146 | struct linux_prom_irqs irq_info[2]; |
1147 | void __iomem *mapped_addr = NULL; |
1148 | int zsnode, cpunode, bbnode; |
1149 | struct linux_prom_registers zsreg[4]; |
1150 | struct resource res; |
1151 | |
1152 | if (sparc_cpu_model == sun4d) { |
1153 | int walk; |
1154 | |
1155 | zsnode = 0; |
1156 | bbnode = 0; |
1157 | cpunode = 0; |
1158 | for (walk = prom_getchild(prom_root_node); |
1159 | (walk = prom_searchsiblings(walk, "cpu-unit")) != 0; |
1160 | walk = prom_getsibling(walk)) { |
1161 | bbnode = prom_getchild(walk); |
1162 | if (bbnode && |
1163 | (bbnode = prom_searchsiblings(bbnode, "bootbus"))) { |
1164 | if ((zsnode = prom_getchild(bbnode)) == node) { |
1165 | cpunode = walk; |
1166 | break; |
1167 | } |
1168 | } |
1169 | } |
1170 | if (!walk) { |
1171 | prom_printf("SunZilog: Cannot find the %d'th bootbus on sun4d.\n", |
1172 | (chip / 2)); |
1173 | prom_halt(); |
1174 | } |
1175 | |
1176 | if (prom_getproperty(zsnode, "reg", |
1177 | (char *) zsreg, sizeof(zsreg)) == -1) { |
1178 | prom_printf("SunZilog: Cannot map Zilog %d\n", chip); |
1179 | prom_halt(); |
1180 | } |
1181 | /* XXX Looks like an off by one? */ |
1182 | prom_apply_generic_ranges(bbnode, cpunode, zsreg, 1); |
1183 | res.start = zsreg[0].phys_addr; |
1184 | res.end = res.start + (8 - 1); |
1185 | res.flags = zsreg[0].which_io | IORESOURCE_IO; |
1186 | mapped_addr = sbus_ioremap(&res, 0, 8, "Zilog Serial"); |
1187 | |
1188 | } else { |
1189 | zsnode = node; |
1190 | |
1191 | #if 0 /* XXX When was this used? */ |
1192 | if (prom_getintdefault(zsnode, "slave", -1) != chipid) { |
1193 | zsnode = prom_getsibling(zsnode); |
1194 | continue; |
1195 | } |
1196 | #endif |
1197 | |
1198 | /* |
1199 | * "address" is only present on ports that OBP opened |
1200 | * (from Mitch Bradley's "Hitchhiker's Guide to OBP"). |
1201 | * We do not use it. |
1202 | */ |
1203 | |
1204 | if (prom_getproperty(zsnode, "reg", |
1205 | (char *) zsreg, sizeof(zsreg)) == -1) { |
1206 | prom_printf("SunZilog: Cannot map Zilog %d\n", chip); |
1207 | prom_halt(); |
1208 | } |
1209 | if (sparc_cpu_model == sun4m) /* Crude. Pass parent. XXX */ |
1210 | prom_apply_obio_ranges(zsreg, 1); |
1211 | res.start = zsreg[0].phys_addr; |
1212 | res.end = res.start + (8 - 1); |
1213 | res.flags = zsreg[0].which_io | IORESOURCE_IO; |
1214 | mapped_addr = sbus_ioremap(&res, 0, 8, "Zilog Serial"); |
1215 | } |
1216 | |
1217 | if (prom_getproperty(zsnode, "intr", |
1218 | (char *) irq_info, sizeof(irq_info)) |
1219 | % sizeof(struct linux_prom_irqs)) { |
1220 | prom_printf("SunZilog: Cannot get IRQ property for Zilog %d.\n", |
1221 | chip); |
1222 | prom_halt(); |
1223 | } |
1224 | if (zilog_irq == -1) { |
1225 | zilog_irq = irq_info[0].pri; |
1226 | } else if (zilog_irq != irq_info[0].pri) { |
1227 | /* XXX. Dumb. Should handle per-chip IRQ, for add-ons. */ |
1228 | prom_printf("SunZilog: Inconsistent IRQ layout for Zilog %d.\n", |
1229 | chip); |
1230 | prom_halt(); |
1231 | } |
1232 | |
1233 | return (struct zilog_layout __iomem *) mapped_addr; |
1234 | } |
1235 | #endif /* !(CONFIG_SPARC64) */ |
1236 | |
1237 | /* Get the address of the registers for SunZilog instance CHIP. */ |
1238 | static struct zilog_layout __iomem * __init get_zs(int chip, int node) |
1239 | { |
1240 | if (chip < 0 || chip >= NUM_SUNZILOG) { |
1241 | prom_printf("SunZilog: Illegal chip number %d in get_zs.\n", chip); |
1242 | prom_halt(); |
1243 | } |
1244 | |
1245 | #ifdef CONFIG_SPARC64 |
1246 | return get_zs_sun4u(chip, node); |
1247 | #else |
1248 | |
1249 | if (sparc_cpu_model == sun4) { |
1250 | struct resource res; |
1251 | |
1252 | /* Not probe-able, hard code it. */ |
1253 | switch (chip) { |
1254 | case 0: |
1255 | res.start = 0xf1000000; |
1256 | break; |
1257 | case 1: |
1258 | res.start = 0xf0000000; |
1259 | break; |
1260 | }; |
1261 | zilog_irq = 12; |
1262 | res.end = (res.start + (8 - 1)); |
1263 | res.flags = IORESOURCE_IO; |
1264 | return sbus_ioremap(&res, 0, 8, "SunZilog"); |
1265 | } |
1266 | |
1267 | return get_zs_sun4cmd(chip, node); |
1268 | #endif |
1269 | } |
1270 | |
1271 | #define ZS_PUT_CHAR_MAX_DELAY 2000 /* 10 ms */ |
1272 | |
1273 | static void sunzilog_put_char(struct zilog_channel __iomem *channel, unsigned char ch) |
1274 | { |
1275 | int loops = ZS_PUT_CHAR_MAX_DELAY; |
1276 | |
1277 | /* This is a timed polling loop so do not switch the explicit |
1278 | * udelay with ZSDELAY as that is a NOP on some platforms. -DaveM |
1279 | */ |
1280 | do { |
1281 | unsigned char val = sbus_readb(&channel->control); |
1282 | if (val & Tx_BUF_EMP) { |
1283 | ZSDELAY(); |
1284 | break; |
1285 | } |
1286 | udelay(5); |
1287 | } while (--loops); |
1288 | |
1289 | sbus_writeb(ch, &channel->data); |
1290 | ZSDELAY(); |
1291 | ZS_WSYNC(channel); |
1292 | } |
1293 | |
1294 | #ifdef CONFIG_SERIO |
1295 | |
1296 | static DEFINE_SPINLOCK(sunzilog_serio_lock); |
1297 | |
1298 | static int sunzilog_serio_write(struct serio *serio, unsigned char ch) |
1299 | { |
1300 | struct uart_sunzilog_port *up = serio->port_data; |
1301 | unsigned long flags; |
1302 | |
1303 | spin_lock_irqsave(&sunzilog_serio_lock, flags); |
1304 | |
1305 | sunzilog_put_char(ZILOG_CHANNEL_FROM_PORT(&up->port), ch); |
1306 | |
1307 | spin_unlock_irqrestore(&sunzilog_serio_lock, flags); |
1308 | |
1309 | return 0; |
1310 | } |
1311 | |
1312 | static int sunzilog_serio_open(struct serio *serio) |
1313 | { |
1314 | struct uart_sunzilog_port *up = serio->port_data; |
1315 | unsigned long flags; |
1316 | int ret; |
1317 | |
1318 | spin_lock_irqsave(&sunzilog_serio_lock, flags); |
1319 | if (!up->serio_open) { |
1320 | up->serio_open = 1; |
1321 | ret = 0; |
1322 | } else |
1323 | ret = -EBUSY; |
1324 | spin_unlock_irqrestore(&sunzilog_serio_lock, flags); |
1325 | |
1326 | return ret; |
1327 | } |
1328 | |
1329 | static void sunzilog_serio_close(struct serio *serio) |
1330 | { |
1331 | struct uart_sunzilog_port *up = serio->port_data; |
1332 | unsigned long flags; |
1333 | |
1334 | spin_lock_irqsave(&sunzilog_serio_lock, flags); |
1335 | up->serio_open = 0; |
1336 | spin_unlock_irqrestore(&sunzilog_serio_lock, flags); |
1337 | } |
1338 | |
1339 | #endif /* CONFIG_SERIO */ |
1340 | |
1341 | #ifdef CONFIG_SERIAL_SUNZILOG_CONSOLE |
1342 | static void |
1343 | sunzilog_console_write(struct console *con, const char *s, unsigned int count) |
1344 | { |
1345 | struct uart_sunzilog_port *up = &sunzilog_port_table[con->index]; |
1346 | struct zilog_channel *channel = ZILOG_CHANNEL_FROM_PORT(&up->port); |
1347 | unsigned long flags; |
1348 | int i; |
1349 | |
1350 | spin_lock_irqsave(&up->port.lock, flags); |
1351 | for (i = 0; i < count; i++, s++) { |
1352 | sunzilog_put_char(channel, *s); |
1353 | if (*s == 10) |
1354 | sunzilog_put_char(channel, 13); |
1355 | } |
1356 | udelay(2); |
1357 | spin_unlock_irqrestore(&up->port.lock, flags); |
1358 | } |
1359 | |
1360 | static int __init sunzilog_console_setup(struct console *con, char *options) |
1361 | { |
1362 | struct uart_sunzilog_port *up = &sunzilog_port_table[con->index]; |
1363 | unsigned long flags; |
1364 | int baud, brg; |
1365 | |
1366 | printk(KERN_INFO "Console: ttyS%d (SunZilog zs%d)\n", |
1367 | (sunzilog_reg.minor - 64) + con->index, con->index); |
1368 | |
1369 | /* Get firmware console settings. */ |
1370 | sunserial_console_termios(con); |
1371 | |
1372 | /* Firmware console speed is limited to 150-->38400 baud so |
1373 | * this hackish cflag thing is OK. |
1374 | */ |
1375 | switch (con->cflag & CBAUD) { |
1376 | case B150: baud = 150; break; |
1377 | case B300: baud = 300; break; |
1378 | case B600: baud = 600; break; |
1379 | case B1200: baud = 1200; break; |
1380 | case B2400: baud = 2400; break; |
1381 | case B4800: baud = 4800; break; |
1382 | default: case B9600: baud = 9600; break; |
1383 | case B19200: baud = 19200; break; |
1384 | case B38400: baud = 38400; break; |
1385 | }; |
1386 | |
1387 | brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR); |
1388 | |
1389 | spin_lock_irqsave(&up->port.lock, flags); |
1390 | |
1391 | up->curregs[R15] = BRKIE; |
1392 | sunzilog_convert_to_zs(up, con->cflag, 0, brg); |
1393 | |
1394 | sunzilog_set_mctrl(&up->port, TIOCM_DTR | TIOCM_RTS); |
1395 | __sunzilog_startup(up); |
1396 | |
1397 | spin_unlock_irqrestore(&up->port.lock, flags); |
1398 | |
1399 | return 0; |
1400 | } |
1401 | |
1402 | static struct console sunzilog_console = { |
1403 | .name = "ttyS", |
1404 | .write = sunzilog_console_write, |
1405 | .device = uart_console_device, |
1406 | .setup = sunzilog_console_setup, |
1407 | .flags = CON_PRINTBUFFER, |
1408 | .index = -1, |
1409 | .data = &sunzilog_reg, |
1410 | }; |
1411 | #define SUNZILOG_CONSOLE (&sunzilog_console) |
1412 | |
1413 | static int __init sunzilog_console_init(void) |
1414 | { |
1415 | int i; |
1416 | |
1417 | if (con_is_present()) |
1418 | return 0; |
1419 | |
1420 | for (i = 0; i < NUM_CHANNELS; i++) { |
1421 | int this_minor = sunzilog_reg.minor + i; |
1422 | |
1423 | if ((this_minor - 64) == (serial_console - 1)) |
1424 | break; |
1425 | } |
1426 | if (i == NUM_CHANNELS) |
1427 | return 0; |
1428 | |
1429 | sunzilog_console.index = i; |
1430 | sunzilog_port_table[i].flags |= SUNZILOG_FLAG_IS_CONS; |
1431 | register_console(&sunzilog_console); |
1432 | return 0; |
1433 | } |
1434 | #else |
1435 | #define SUNZILOG_CONSOLE (NULL) |
1436 | #define sunzilog_console_init() do { } while (0) |
1437 | #endif |
1438 | |
1439 | /* |
1440 | * We scan the PROM tree recursively. This is the most reliable way |
1441 | * to find Zilog nodes on various platforms. However, we face an extreme |
1442 | * shortage of kernel stack, so we must be very careful. To that end, |
1443 | * we scan only to a certain depth, and we use a common property buffer |
1444 | * in the scan structure. |
1445 | */ |
1446 | #define ZS_PROPSIZE 128 |
1447 | #define ZS_SCAN_DEPTH 5 |
1448 | |
1449 | struct zs_probe_scan { |
1450 | int depth; |
1451 | void (*scanner)(struct zs_probe_scan *t, int node); |
1452 | |
1453 | int devices; |
1454 | char prop[ZS_PROPSIZE]; |
1455 | }; |
1456 | |
1457 | static int __inline__ sunzilog_node_ok(int node, const char *name, int len) |
1458 | { |
1459 | if (strncmp(name, "zs", len) == 0) |
1460 | return 1; |
1461 | /* Don't fold this procedure just yet. Compare to su_node_ok(). */ |
1462 | return 0; |
1463 | } |
1464 | |
1465 | static void __init sunzilog_scan(struct zs_probe_scan *t, int node) |
1466 | { |
1467 | int len; |
1468 | |
1469 | for (; node != 0; node = prom_getsibling(node)) { |
1470 | len = prom_getproperty(node, "name", t->prop, ZS_PROPSIZE); |
1471 | if (len <= 1) |
1472 | continue; /* Broken PROM node */ |
1473 | if (sunzilog_node_ok(node, t->prop, len)) { |
1474 | (*t->scanner)(t, node); |
1475 | } else { |
1476 | if (t->depth < ZS_SCAN_DEPTH) { |
1477 | t->depth++; |
1478 | sunzilog_scan(t, prom_getchild(node)); |
1479 | --t->depth; |
1480 | } |
1481 | } |
1482 | } |
1483 | } |
1484 | |
1485 | static void __init sunzilog_prepare(void) |
1486 | { |
1487 | struct uart_sunzilog_port *up; |
1488 | struct zilog_layout __iomem *rp; |
1489 | int channel, chip; |
1490 | |
1491 | /* |
1492 | * Temporary fix. |
1493 | */ |
1494 | for (channel = 0; channel < NUM_CHANNELS; channel++) |
1495 | spin_lock_init(&sunzilog_port_table[channel].port.lock); |
1496 | |
1497 | sunzilog_irq_chain = up = &sunzilog_port_table[0]; |
1498 | for (channel = 0; channel < NUM_CHANNELS - 1; channel++) |
1499 | up[channel].next = &up[channel + 1]; |
1500 | up[channel].next = NULL; |
1501 | |
1502 | for (chip = 0; chip < NUM_SUNZILOG; chip++) { |
1503 | rp = sunzilog_chip_regs[chip]; |
1504 | up[(chip * 2) + 0].port.membase = (void __iomem *)&rp->channelA; |
1505 | up[(chip * 2) + 1].port.membase = (void __iomem *)&rp->channelB; |
1506 | |
1507 | /* Channel A */ |
1508 | up[(chip * 2) + 0].port.iotype = SERIAL_IO_MEM; |
1509 | up[(chip * 2) + 0].port.irq = zilog_irq; |
1510 | up[(chip * 2) + 0].port.uartclk = ZS_CLOCK; |
1511 | up[(chip * 2) + 0].port.fifosize = 1; |
1512 | up[(chip * 2) + 0].port.ops = &sunzilog_pops; |
1513 | up[(chip * 2) + 0].port.type = PORT_SUNZILOG; |
1514 | up[(chip * 2) + 0].port.flags = 0; |
1515 | up[(chip * 2) + 0].port.line = (chip * 2) + 0; |
1516 | up[(chip * 2) + 0].flags |= SUNZILOG_FLAG_IS_CHANNEL_A; |
1517 | |
1518 | /* Channel B */ |
1519 | up[(chip * 2) + 1].port.iotype = SERIAL_IO_MEM; |
1520 | up[(chip * 2) + 1].port.irq = zilog_irq; |
1521 | up[(chip * 2) + 1].port.uartclk = ZS_CLOCK; |
1522 | up[(chip * 2) + 1].port.fifosize = 1; |
1523 | up[(chip * 2) + 1].port.ops = &sunzilog_pops; |
1524 | up[(chip * 2) + 1].port.type = PORT_SUNZILOG; |
1525 | up[(chip * 2) + 1].port.flags = 0; |
1526 | up[(chip * 2) + 1].port.line = (chip * 2) + 1; |
1527 | up[(chip * 2) + 1].flags |= 0; |
1528 | } |
1529 | } |
1530 | |
1531 | static void __init sunzilog_init_kbdms(struct uart_sunzilog_port *up, int channel) |
1532 | { |
1533 | int baud, brg; |
1534 | |
1535 | if (channel == KEYBOARD_LINE) { |
1536 | up->flags |= SUNZILOG_FLAG_CONS_KEYB; |
1537 | up->cflag = B1200 | CS8 | CLOCAL | CREAD; |
1538 | baud = 1200; |
1539 | } else { |
1540 | up->flags |= SUNZILOG_FLAG_CONS_MOUSE; |
1541 | up->cflag = B4800 | CS8 | CLOCAL | CREAD; |
1542 | baud = 4800; |
1543 | } |
1544 | printk(KERN_INFO "zs%d at 0x%p (irq = %s) is a SunZilog\n", |
1545 | channel, up->port.membase, __irq_itoa(zilog_irq)); |
1546 | |
1547 | up->curregs[R15] = BRKIE; |
1548 | brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR); |
1549 | sunzilog_convert_to_zs(up, up->cflag, 0, brg); |
1550 | sunzilog_set_mctrl(&up->port, TIOCM_DTR | TIOCM_RTS); |
1551 | __sunzilog_startup(up); |
1552 | } |
1553 | |
1554 | #ifdef CONFIG_SERIO |
1555 | static void __init sunzilog_register_serio(struct uart_sunzilog_port *up, int channel) |
1556 | { |
1557 | struct serio *serio; |
1558 | |
1559 | up->serio = serio = kmalloc(sizeof(struct serio), GFP_KERNEL); |
1560 | if (serio) { |
1561 | memset(serio, 0, sizeof(*serio)); |
1562 | |
1563 | serio->port_data = up; |
1564 | |
1565 | serio->id.type = SERIO_RS232; |
1566 | if (channel == KEYBOARD_LINE) { |
1567 | serio->id.proto = SERIO_SUNKBD; |
1568 | strlcpy(serio->name, "zskbd", sizeof(serio->name)); |
1569 | } else { |
1570 | serio->id.proto = SERIO_SUN; |
1571 | serio->id.extra = 1; |
1572 | strlcpy(serio->name, "zsms", sizeof(serio->name)); |
1573 | } |
1574 | strlcpy(serio->phys, |
1575 | (channel == KEYBOARD_LINE ? "zs/serio0" : "zs/serio1"), |
1576 | sizeof(serio->phys)); |
1577 | |
1578 | serio->write = sunzilog_serio_write; |
1579 | serio->open = sunzilog_serio_open; |
1580 | serio->close = sunzilog_serio_close; |
1581 | |
1582 | serio_register_port(serio); |
1583 | } else { |
1584 | printk(KERN_WARNING "zs%d: not enough memory for serio port\n", |
1585 | channel); |
1586 | } |
1587 | } |
1588 | #endif |
1589 | |
1590 | static void __init sunzilog_init_hw(void) |
1591 | { |
1592 | int i; |
1593 | |
1594 | for (i = 0; i < NUM_CHANNELS; i++) { |
1595 | struct uart_sunzilog_port *up = &sunzilog_port_table[i]; |
1596 | struct zilog_channel __iomem *channel = ZILOG_CHANNEL_FROM_PORT(&up->port); |
1597 | unsigned long flags; |
1598 | int baud, brg; |
1599 | |
1600 | spin_lock_irqsave(&up->port.lock, flags); |
1601 | |
1602 | if (ZS_IS_CHANNEL_A(up)) { |
1603 | write_zsreg(channel, R9, FHWRES); |
1604 | ZSDELAY_LONG(); |
1605 | (void) read_zsreg(channel, R0); |
1606 | } |
1607 | |
1608 | if (i == KEYBOARD_LINE || i == MOUSE_LINE) { |
1609 | sunzilog_init_kbdms(up, i); |
1610 | up->curregs[R9] |= (NV | MIE); |
1611 | write_zsreg(channel, R9, up->curregs[R9]); |
1612 | } else { |
1613 | /* Normal serial TTY. */ |
1614 | up->parity_mask = 0xff; |
1615 | up->curregs[R1] = EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB; |
1616 | up->curregs[R4] = PAR_EVEN | X16CLK | SB1; |
1617 | up->curregs[R3] = RxENAB | Rx8; |
1618 | up->curregs[R5] = TxENAB | Tx8; |
1619 | up->curregs[R9] = NV | MIE; |
1620 | up->curregs[R10] = NRZ; |
1621 | up->curregs[R11] = TCBR | RCBR; |
1622 | baud = 9600; |
1623 | brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR); |
1624 | up->curregs[R12] = (brg & 0xff); |
1625 | up->curregs[R13] = (brg >> 8) & 0xff; |
1626 | up->curregs[R14] = BRSRC | BRENAB; |
1627 | __load_zsregs(channel, up->curregs); |
1628 | write_zsreg(channel, R9, up->curregs[R9]); |
1629 | } |
1630 | |
1631 | spin_unlock_irqrestore(&up->port.lock, flags); |
1632 | |
1633 | #ifdef CONFIG_SERIO |
1634 | if (i == KEYBOARD_LINE || i == MOUSE_LINE) |
1635 | sunzilog_register_serio(up, i); |
1636 | #endif |
1637 | } |
1638 | } |
1639 | |
1640 | static struct zilog_layout __iomem * __init get_zs(int chip, int node); |
1641 | |
1642 | static void __init sunzilog_scan_probe(struct zs_probe_scan *t, int node) |
1643 | { |
1644 | sunzilog_chip_regs[t->devices] = get_zs(t->devices, node); |
1645 | t->devices++; |
1646 | } |
1647 | |
1648 | static int __init sunzilog_ports_init(void) |
1649 | { |
1650 | struct zs_probe_scan scan; |
1651 | int ret; |
1652 | int uart_count; |
1653 | int i; |
1654 | |
1655 | printk(KERN_DEBUG "SunZilog: %d chips.\n", NUM_SUNZILOG); |
1656 | |
1657 | scan.scanner = sunzilog_scan_probe; |
1658 | scan.depth = 0; |
1659 | scan.devices = 0; |
1660 | sunzilog_scan(&scan, prom_getchild(prom_root_node)); |
1661 | |
1662 | sunzilog_prepare(); |
1663 | |
1664 | if (request_irq(zilog_irq, sunzilog_interrupt, SA_SHIRQ, |
1665 | "SunZilog", sunzilog_irq_chain)) { |
1666 | prom_printf("SunZilog: Unable to register zs interrupt handler.\n"); |
1667 | prom_halt(); |
1668 | } |
1669 | |
1670 | sunzilog_init_hw(); |
1671 | |
1672 | /* We can only init this once we have probed the Zilogs |
1673 | * in the system. Do not count channels assigned to keyboards |
1674 | * or mice when we are deciding how many ports to register. |
1675 | */ |
1676 | uart_count = 0; |
1677 | for (i = 0; i < NUM_CHANNELS; i++) { |
1678 | struct uart_sunzilog_port *up = &sunzilog_port_table[i]; |
1679 | |
1680 | if (ZS_IS_KEYB(up) || ZS_IS_MOUSE(up)) |
1681 | continue; |
1682 | |
1683 | uart_count++; |
1684 | } |
1685 | |
1686 | sunzilog_reg.nr = uart_count; |
1687 | sunzilog_reg.cons = SUNZILOG_CONSOLE; |
1688 | |
1689 | sunzilog_reg.minor = sunserial_current_minor; |
1690 | sunserial_current_minor += uart_count; |
1691 | |
1692 | ret = uart_register_driver(&sunzilog_reg); |
1693 | if (ret == 0) { |
1694 | sunzilog_console_init(); |
1695 | for (i = 0; i < NUM_CHANNELS; i++) { |
1696 | struct uart_sunzilog_port *up = &sunzilog_port_table[i]; |
1697 | |
1698 | if (ZS_IS_KEYB(up) || ZS_IS_MOUSE(up)) |
1699 | continue; |
1700 | |
1701 | if (uart_add_one_port(&sunzilog_reg, &up->port)) { |
1702 | printk(KERN_ERR |
1703 | "SunZilog: failed to add port zs%d\n", i); |
1704 | } |
1705 | } |
1706 | } |
1707 | |
1708 | return ret; |
1709 | } |
1710 | |
1711 | static void __init sunzilog_scan_count(struct zs_probe_scan *t, int node) |
1712 | { |
1713 | t->devices++; |
1714 | } |
1715 | |
1716 | static int __init sunzilog_ports_count(void) |
1717 | { |
1718 | struct zs_probe_scan scan; |
1719 | |
1720 | /* Sun4 Zilog setup is hard coded, no probing to do. */ |
1721 | if (sparc_cpu_model == sun4) |
1722 | return 2; |
1723 | |
1724 | scan.scanner = sunzilog_scan_count; |
1725 | scan.depth = 0; |
1726 | scan.devices = 0; |
1727 | |
1728 | sunzilog_scan(&scan, prom_getchild(prom_root_node)); |
1729 | |
1730 | return scan.devices; |
1731 | } |
1732 | |
1733 | static int __init sunzilog_init(void) |
1734 | { |
1735 | |
1736 | NUM_SUNZILOG = sunzilog_ports_count(); |
1737 | if (NUM_SUNZILOG == 0) |
1738 | return -ENODEV; |
1739 | |
1740 | sunzilog_alloc_tables(); |
1741 | |
1742 | sunzilog_ports_init(); |
1743 | |
1744 | return 0; |
1745 | } |
1746 | |
1747 | static void __exit sunzilog_exit(void) |
1748 | { |
1749 | int i; |
1750 | |
1751 | for (i = 0; i < NUM_CHANNELS; i++) { |
1752 | struct uart_sunzilog_port *up = &sunzilog_port_table[i]; |
1753 | |
1754 | if (ZS_IS_KEYB(up) || ZS_IS_MOUSE(up)) { |
1755 | #ifdef CONFIG_SERIO |
1756 | if (up->serio) { |
1757 | serio_unregister_port(up->serio); |
1758 | up->serio = NULL; |
1759 | } |
1760 | #endif |
1761 | } else |
1762 | uart_remove_one_port(&sunzilog_reg, &up->port); |
1763 | } |
1764 | |
1765 | uart_unregister_driver(&sunzilog_reg); |
1766 | } |
1767 | |
1768 | module_init(sunzilog_init); |
1769 | module_exit(sunzilog_exit); |
1770 | |
1771 | MODULE_AUTHOR("David S. Miller"); |
1772 | MODULE_DESCRIPTION("Sun Zilog serial port driver"); |
1773 | MODULE_LICENSE("GPL"); |