include/asm-alpha/hardirq.h

#ifndef _ALPHA_HARDIRQ_H
#define _ALPHA_HARDIRQ_H

#include <linux/config.h>
#include <linux/threads.h>
#include <linux/cache.h>


/* entry.S is sensitive to the offsets of these fields */
typedef struct {
	unsigned long __softirq_pending;
} ____cacheline_aligned irq_cpustat_t;

#include <linux/irq_cpustat.h>	/* Standard mappings for irq_cpustat_t above */

#define HARDIRQ_BITS	12

/*
 * The hardirq mask has to be large enough to have
 * space for potentially nestable IRQ sources in the system
 * to nest on a single CPU. On Alpha, interrupts are masked at the CPU
 * by IPL as well as at the system level. We only have 8 IPLs (UNIX PALcode)
 * so we really only have 8 nestable IRQs, but allow some overhead
 */
#if (1 << HARDIRQ_BITS) < 16
#error HARDIRQ_BITS is too low!
#endif

#endif /* _ALPHA_HARDIRQ_H */
1	#ifndef _ALPHA_HARDIRQ_H
2	#define _ALPHA_HARDIRQ_H
3
4	#include <linux/config.h>
5	#include <linux/threads.h>
6	#include <linux/cache.h>
7
8
9	/* entry.S is sensitive to the offsets of these fields */
10	typedef struct {
11	unsigned long __softirq_pending;
12	} ____cacheline_aligned irq_cpustat_t;
13
14	#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
15
16	#define HARDIRQ_BITS 12
17
18	/*
19	* The hardirq mask has to be large enough to have
20	* space for potentially nestable IRQ sources in the system
21	* to nest on a single CPU. On Alpha, interrupts are masked at the CPU
22	* by IPL as well as at the system level. We only have 8 IPLs (UNIX PALcode)
23	* so we really only have 8 nestable IRQs, but allow some overhead
24	*/
25	#if (1 << HARDIRQ_BITS) < 16
26	#error HARDIRQ_BITS is too low!
27	#endif
28
29	#endif /* _ALPHA_HARDIRQ_H */