Contents of /trunk/linux-libc-headers/patches/linux-2.6.18.1-mips_headers-1.patch
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Revision 435 -
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Fri Mar 16 00:06:55 2007 UTC (17 years, 6 months ago) by niro
File size: 21640 byte(s)
Fri Mar 16 00:06:55 2007 UTC (17 years, 6 months ago) by niro
File size: 21640 byte(s)
updated to upstream svn-149
1 | diff -Naur linux-2.6.18.1/include/asm-mips/cacheflush.h linux-mips-2.6.18.1/include/asm-mips/cacheflush.h |
2 | --- linux-2.6.18.1/include/asm-mips/cacheflush.h 2006-10-13 20:34:03.000000000 -0700 |
3 | +++ linux-mips-2.6.18.1/include/asm-mips/cacheflush.h 2006-10-17 06:23:28.000000000 -0700 |
4 | @@ -21,7 +21,6 @@ |
5 | * - flush_cache_range(vma, start, end) flushes a range of pages |
6 | * - flush_icache_range(start, end) flush a range of instructions |
7 | * - flush_dcache_page(pg) flushes(wback&invalidates) a page for dcache |
8 | - * - flush_icache_page(vma, pg) flushes(invalidates) a page for icache |
9 | * |
10 | * MIPS specific flush operations: |
11 | * |
12 | @@ -39,7 +38,7 @@ |
13 | |
14 | static inline void flush_dcache_page(struct page *page) |
15 | { |
16 | - if (cpu_has_dc_aliases) |
17 | + if (cpu_has_dc_aliases || !cpu_has_ic_fills_f_dc) |
18 | __flush_dcache_page(page); |
19 | |
20 | } |
21 | @@ -47,30 +46,24 @@ |
22 | #define flush_dcache_mmap_lock(mapping) do { } while (0) |
23 | #define flush_dcache_mmap_unlock(mapping) do { } while (0) |
24 | |
25 | -extern void (*flush_icache_page)(struct vm_area_struct *vma, |
26 | +extern void (*__flush_icache_page)(struct vm_area_struct *vma, |
27 | struct page *page); |
28 | +static inline void flush_icache_page(struct vm_area_struct *vma, |
29 | + struct page *page) |
30 | +{ |
31 | +} |
32 | + |
33 | extern void (*flush_icache_range)(unsigned long start, unsigned long end); |
34 | #define flush_cache_vmap(start, end) flush_cache_all() |
35 | #define flush_cache_vunmap(start, end) flush_cache_all() |
36 | |
37 | -static inline void copy_to_user_page(struct vm_area_struct *vma, |
38 | +extern void copy_to_user_page(struct vm_area_struct *vma, |
39 | struct page *page, unsigned long vaddr, void *dst, const void *src, |
40 | - unsigned long len) |
41 | -{ |
42 | - if (cpu_has_dc_aliases) |
43 | - flush_cache_page(vma, vaddr, page_to_pfn(page)); |
44 | - memcpy(dst, src, len); |
45 | - flush_icache_page(vma, page); |
46 | -} |
47 | + unsigned long len); |
48 | |
49 | -static inline void copy_from_user_page(struct vm_area_struct *vma, |
50 | +extern void copy_from_user_page(struct vm_area_struct *vma, |
51 | struct page *page, unsigned long vaddr, void *dst, const void *src, |
52 | - unsigned long len) |
53 | -{ |
54 | - if (cpu_has_dc_aliases) |
55 | - flush_cache_page(vma, vaddr, page_to_pfn(page)); |
56 | - memcpy(dst, src, len); |
57 | -} |
58 | + unsigned long len); |
59 | |
60 | extern void (*flush_cache_sigtramp)(unsigned long addr); |
61 | extern void (*flush_icache_all)(void); |
62 | diff -Naur linux-2.6.18.1/include/asm-mips/fixmap.h linux-mips-2.6.18.1/include/asm-mips/fixmap.h |
63 | --- linux-2.6.18.1/include/asm-mips/fixmap.h 2006-10-13 20:34:03.000000000 -0700 |
64 | +++ linux-mips-2.6.18.1/include/asm-mips/fixmap.h 2006-10-17 06:23:28.000000000 -0700 |
65 | @@ -45,8 +45,16 @@ |
66 | * fix-mapped? |
67 | */ |
68 | enum fixed_addresses { |
69 | +#define FIX_N_COLOURS 8 |
70 | + FIX_CMAP_BEGIN, |
71 | +#ifdef CONFIG_MIPS_MT_SMTC |
72 | + FIX_CMAP_END = FIX_CMAP_BEGIN + (FIX_N_COLOURS * NR_CPUS), |
73 | +#else |
74 | + FIX_CMAP_END = FIX_CMAP_BEGIN + FIX_N_COLOURS, |
75 | +#endif |
76 | #ifdef CONFIG_HIGHMEM |
77 | - FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */ |
78 | + /* reserved pte's for temporary kernel mappings */ |
79 | + FIX_KMAP_BEGIN = FIX_CMAP_END + 1, |
80 | FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1, |
81 | #endif |
82 | __end_of_fixed_addresses |
83 | @@ -70,9 +78,9 @@ |
84 | * at the top of mem.. |
85 | */ |
86 | #if defined(CONFIG_CPU_TX39XX) || defined(CONFIG_CPU_TX49XX) |
87 | -#define FIXADDR_TOP (0xff000000UL - 0x2000) |
88 | +#define FIXADDR_TOP ((unsigned long)(long)(int)(0xff000000 - 0x20000)) |
89 | #else |
90 | -#define FIXADDR_TOP (0xffffe000UL) |
91 | +#define FIXADDR_TOP ((unsigned long)(long)(int)0xfffe0000) |
92 | #endif |
93 | #define FIXADDR_SIZE (__end_of_fixed_addresses << PAGE_SHIFT) |
94 | #define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE) |
95 | diff -Naur linux-2.6.18.1/include/asm-mips/fpu.h linux-mips-2.6.18.1/include/asm-mips/fpu.h |
96 | --- linux-2.6.18.1/include/asm-mips/fpu.h 2006-10-13 20:34:03.000000000 -0700 |
97 | +++ linux-mips-2.6.18.1/include/asm-mips/fpu.h 2006-10-17 06:23:28.000000000 -0700 |
98 | @@ -134,9 +134,11 @@ |
99 | |
100 | static inline fpureg_t *get_fpu_regs(struct task_struct *tsk) |
101 | { |
102 | - if (cpu_has_fpu) { |
103 | - if ((tsk == current) && __is_fpu_owner()) |
104 | + if (tsk == current) { |
105 | + preempt_disable(); |
106 | + if (is_fpu_owner()) |
107 | _save_fp(current); |
108 | + preempt_enable(); |
109 | } |
110 | |
111 | return tsk->thread.fpu.fpr; |
112 | diff -Naur linux-2.6.18.1/include/asm-mips/irq.h linux-mips-2.6.18.1/include/asm-mips/irq.h |
113 | --- linux-2.6.18.1/include/asm-mips/irq.h 2006-10-13 20:34:03.000000000 -0700 |
114 | +++ linux-mips-2.6.18.1/include/asm-mips/irq.h 2006-10-17 06:23:28.000000000 -0700 |
115 | @@ -76,8 +76,4 @@ |
116 | unsigned long hwmask); |
117 | #endif /* CONFIG_MIPS_MT_SMTC */ |
118 | |
119 | -#ifdef CONFIG_SMP |
120 | -#define ARCH_HAS_IRQ_PER_CPU |
121 | -#endif |
122 | - |
123 | #endif /* _ASM_IRQ_H */ |
124 | diff -Naur linux-2.6.18.1/include/asm-mips/mach-atlas/mc146818rtc.h linux-mips-2.6.18.1/include/asm-mips/mach-atlas/mc146818rtc.h |
125 | --- linux-2.6.18.1/include/asm-mips/mach-atlas/mc146818rtc.h 2006-10-13 20:34:03.000000000 -0700 |
126 | +++ linux-mips-2.6.18.1/include/asm-mips/mach-atlas/mc146818rtc.h 2006-10-17 06:23:28.000000000 -0700 |
127 | @@ -28,10 +28,12 @@ |
128 | #include <asm/mips-boards/atlas.h> |
129 | #include <asm/mips-boards/atlasint.h> |
130 | |
131 | +#define ARCH_RTC_LOCATION |
132 | + |
133 | #define RTC_PORT(x) (ATLAS_RTC_ADR_REG + (x) * 8) |
134 | #define RTC_IO_EXTENT 0x100 |
135 | #define RTC_IOMAPPED 0 |
136 | -#define RTC_IRQ ATLASINT_RTC |
137 | +#define RTC_IRQ ATLAS_INT_RTC |
138 | |
139 | static inline unsigned char CMOS_READ(unsigned long addr) |
140 | { |
141 | diff -Naur linux-2.6.18.1/include/asm-mips/mach-au1x00/au1xxx_ide.h linux-mips-2.6.18.1/include/asm-mips/mach-au1x00/au1xxx_ide.h |
142 | --- linux-2.6.18.1/include/asm-mips/mach-au1x00/au1xxx_ide.h 2006-10-13 20:34:03.000000000 -0700 |
143 | +++ linux-mips-2.6.18.1/include/asm-mips/mach-au1x00/au1xxx_ide.h 2006-10-17 06:23:28.000000000 -0700 |
144 | @@ -83,6 +83,7 @@ |
145 | } _auide_hwif; |
146 | |
147 | #ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA |
148 | + |
149 | /* HD white list */ |
150 | static const struct drive_list_entry dma_white_list [] = { |
151 | /* |
152 | diff -Naur linux-2.6.18.1/include/asm-mips/mips-boards/atlasint.h linux-mips-2.6.18.1/include/asm-mips/mips-boards/atlasint.h |
153 | --- linux-2.6.18.1/include/asm-mips/mips-boards/atlasint.h 2006-10-13 20:34:03.000000000 -0700 |
154 | +++ linux-mips-2.6.18.1/include/asm-mips/mips-boards/atlasint.h 2006-10-17 06:23:28.000000000 -0700 |
155 | @@ -1,6 +1,7 @@ |
156 | /* |
157 | - * Carsten Langgaard, carstenl@mips.com |
158 | - * Copyright (C) 1999 MIPS Technologies, Inc. All rights reserved. |
159 | + * Copyright (C) 1999, 2006 MIPS Technologies, Inc. All rights reserved. |
160 | + * Authors: Carsten Langgaard <carstenl@mips.com> |
161 | + * Maciej W. Rozycki <macro@mips.com> |
162 | * |
163 | * ######################################################################## |
164 | * |
165 | @@ -25,41 +26,88 @@ |
166 | #ifndef _MIPS_ATLASINT_H |
167 | #define _MIPS_ATLASINT_H |
168 | |
169 | -#define ATLASINT_BASE 1 |
170 | -#define ATLASINT_UART (ATLASINT_BASE+0) |
171 | -#define ATLASINT_TIM0 (ATLASINT_BASE+1) |
172 | -#define ATLASINT_RES2 (ATLASINT_BASE+2) |
173 | -#define ATLASINT_RES3 (ATLASINT_BASE+3) |
174 | -#define ATLASINT_RTC (ATLASINT_BASE+4) |
175 | -#define ATLASINT_COREHI (ATLASINT_BASE+5) |
176 | -#define ATLASINT_CORELO (ATLASINT_BASE+6) |
177 | -#define ATLASINT_RES7 (ATLASINT_BASE+7) |
178 | -#define ATLASINT_PCIA (ATLASINT_BASE+8) |
179 | -#define ATLASINT_PCIB (ATLASINT_BASE+9) |
180 | -#define ATLASINT_PCIC (ATLASINT_BASE+10) |
181 | -#define ATLASINT_PCID (ATLASINT_BASE+11) |
182 | -#define ATLASINT_ENUM (ATLASINT_BASE+12) |
183 | -#define ATLASINT_DEG (ATLASINT_BASE+13) |
184 | -#define ATLASINT_ATXFAIL (ATLASINT_BASE+14) |
185 | -#define ATLASINT_INTA (ATLASINT_BASE+15) |
186 | -#define ATLASINT_INTB (ATLASINT_BASE+16) |
187 | -#define ATLASINT_ETH ATLASINT_INTB |
188 | -#define ATLASINT_INTC (ATLASINT_BASE+17) |
189 | -#define ATLASINT_SCSI ATLASINT_INTC |
190 | -#define ATLASINT_INTD (ATLASINT_BASE+18) |
191 | -#define ATLASINT_SERR (ATLASINT_BASE+19) |
192 | -#define ATLASINT_RES20 (ATLASINT_BASE+20) |
193 | -#define ATLASINT_RES21 (ATLASINT_BASE+21) |
194 | -#define ATLASINT_RES22 (ATLASINT_BASE+22) |
195 | -#define ATLASINT_RES23 (ATLASINT_BASE+23) |
196 | -#define ATLASINT_RES24 (ATLASINT_BASE+24) |
197 | -#define ATLASINT_RES25 (ATLASINT_BASE+25) |
198 | -#define ATLASINT_RES26 (ATLASINT_BASE+26) |
199 | -#define ATLASINT_RES27 (ATLASINT_BASE+27) |
200 | -#define ATLASINT_RES28 (ATLASINT_BASE+28) |
201 | -#define ATLASINT_RES29 (ATLASINT_BASE+29) |
202 | -#define ATLASINT_RES30 (ATLASINT_BASE+30) |
203 | -#define ATLASINT_RES31 (ATLASINT_BASE+31) |
204 | -#define ATLASINT_END (ATLASINT_BASE+31) |
205 | +/* |
206 | + * Interrupts 0..7 are used for Atlas CPU interrupts (nonEIC mode) |
207 | + */ |
208 | +#define MIPSCPU_INT_BASE 0 |
209 | + |
210 | +/* CPU interrupt offsets */ |
211 | +#define MIPSCPU_INT_SW0 0 |
212 | +#define MIPSCPU_INT_SW1 1 |
213 | +#define MIPSCPU_INT_MB0 2 |
214 | +#define MIPSCPU_INT_ATLAS MIPSCPU_INT_MB0 |
215 | +#define MIPSCPU_INT_MB1 3 |
216 | +#define MIPSCPU_INT_MB2 4 |
217 | +#define MIPSCPU_INT_MB3 5 |
218 | +#define MIPSCPU_INT_MB4 6 |
219 | +#define MIPSCPU_INT_CPUCTR 7 |
220 | + |
221 | +/* |
222 | + * Interrupts 8..39 are used for Atlas interrupt controller interrupts |
223 | + */ |
224 | +#define ATLAS_INT_BASE 8 |
225 | +#define ATLAS_INT_UART (ATLAS_INT_BASE + 0) |
226 | +#define ATLAS_INT_TIM0 (ATLAS_INT_BASE + 1) |
227 | +#define ATLAS_INT_RES2 (ATLAS_INT_BASE + 2) |
228 | +#define ATLAS_INT_RES3 (ATLAS_INT_BASE + 3) |
229 | +#define ATLAS_INT_RTC (ATLAS_INT_BASE + 4) |
230 | +#define ATLAS_INT_COREHI (ATLAS_INT_BASE + 5) |
231 | +#define ATLAS_INT_CORELO (ATLAS_INT_BASE + 6) |
232 | +#define ATLAS_INT_RES7 (ATLAS_INT_BASE + 7) |
233 | +#define ATLAS_INT_PCIA (ATLAS_INT_BASE + 8) |
234 | +#define ATLAS_INT_PCIB (ATLAS_INT_BASE + 9) |
235 | +#define ATLAS_INT_PCIC (ATLAS_INT_BASE + 10) |
236 | +#define ATLAS_INT_PCID (ATLAS_INT_BASE + 11) |
237 | +#define ATLAS_INT_ENUM (ATLAS_INT_BASE + 12) |
238 | +#define ATLAS_INT_DEG (ATLAS_INT_BASE + 13) |
239 | +#define ATLAS_INT_ATXFAIL (ATLAS_INT_BASE + 14) |
240 | +#define ATLAS_INT_INTA (ATLAS_INT_BASE + 15) |
241 | +#define ATLAS_INT_INTB (ATLAS_INT_BASE + 16) |
242 | +#define ATLAS_INT_ETH ATLAS_INT_INTB |
243 | +#define ATLAS_INT_INTC (ATLAS_INT_BASE + 17) |
244 | +#define ATLAS_INT_SCSI ATLAS_INT_INTC |
245 | +#define ATLAS_INT_INTD (ATLAS_INT_BASE + 18) |
246 | +#define ATLAS_INT_SERR (ATLAS_INT_BASE + 19) |
247 | +#define ATLAS_INT_RES20 (ATLAS_INT_BASE + 20) |
248 | +#define ATLAS_INT_RES21 (ATLAS_INT_BASE + 21) |
249 | +#define ATLAS_INT_RES22 (ATLAS_INT_BASE + 22) |
250 | +#define ATLAS_INT_RES23 (ATLAS_INT_BASE + 23) |
251 | +#define ATLAS_INT_RES24 (ATLAS_INT_BASE + 24) |
252 | +#define ATLAS_INT_RES25 (ATLAS_INT_BASE + 25) |
253 | +#define ATLAS_INT_RES26 (ATLAS_INT_BASE + 26) |
254 | +#define ATLAS_INT_RES27 (ATLAS_INT_BASE + 27) |
255 | +#define ATLAS_INT_RES28 (ATLAS_INT_BASE + 28) |
256 | +#define ATLAS_INT_RES29 (ATLAS_INT_BASE + 29) |
257 | +#define ATLAS_INT_RES30 (ATLAS_INT_BASE + 30) |
258 | +#define ATLAS_INT_RES31 (ATLAS_INT_BASE + 31) |
259 | +#define ATLAS_INT_END (ATLAS_INT_BASE + 31) |
260 | + |
261 | +/* |
262 | + * Interrupts 64..127 are used for Soc-it Classic interrupts |
263 | + */ |
264 | +#define MSC01C_INT_BASE 64 |
265 | + |
266 | +/* SOC-it Classic interrupt offsets */ |
267 | +#define MSC01C_INT_TMR 0 |
268 | +#define MSC01C_INT_PCI 1 |
269 | + |
270 | +/* |
271 | + * Interrupts 64..127 are used for Soc-it EIC interrupts |
272 | + */ |
273 | +#define MSC01E_INT_BASE 64 |
274 | + |
275 | +/* SOC-it EIC interrupt offsets */ |
276 | +#define MSC01E_INT_SW0 1 |
277 | +#define MSC01E_INT_SW1 2 |
278 | +#define MSC01E_INT_MB0 3 |
279 | +#define MSC01E_INT_ATLAS MSC01E_INT_MB0 |
280 | +#define MSC01E_INT_MB1 4 |
281 | +#define MSC01E_INT_MB2 5 |
282 | +#define MSC01E_INT_MB3 6 |
283 | +#define MSC01E_INT_MB4 7 |
284 | +#define MSC01E_INT_TMR 8 |
285 | +#define MSC01E_INT_PCI 9 |
286 | +#define MSC01E_INT_PERFCTR 10 |
287 | +#define MSC01E_INT_CPUCTR 11 |
288 | |
289 | #endif /* !(_MIPS_ATLASINT_H) */ |
290 | diff -Naur linux-2.6.18.1/include/asm-mips/page.h linux-mips-2.6.18.1/include/asm-mips/page.h |
291 | --- linux-2.6.18.1/include/asm-mips/page.h 2006-10-13 20:34:03.000000000 -0700 |
292 | +++ linux-mips-2.6.18.1/include/asm-mips/page.h 2006-10-17 06:23:28.000000000 -0700 |
293 | @@ -53,19 +53,17 @@ |
294 | extern void (*flush_data_cache_page)(unsigned long addr); |
295 | |
296 | clear_page(addr); |
297 | - if (pages_do_alias((unsigned long) addr, vaddr)) |
298 | + if (pages_do_alias((unsigned long) addr, vaddr & PAGE_MASK)) |
299 | flush_data_cache_page((unsigned long)addr); |
300 | } |
301 | |
302 | -static inline void copy_user_page(void *vto, void *vfrom, unsigned long vaddr, |
303 | - struct page *to) |
304 | -{ |
305 | - extern void (*flush_data_cache_page)(unsigned long addr); |
306 | +extern void copy_user_page(void *vto, void *vfrom, unsigned long vaddr, |
307 | + struct page *to); |
308 | +struct vm_area_struct; |
309 | +extern void copy_user_highpage(struct page *to, struct page *from, |
310 | + unsigned long vaddr, struct vm_area_struct *vma); |
311 | |
312 | - copy_page(vto, vfrom); |
313 | - if (pages_do_alias((unsigned long)vto, vaddr)) |
314 | - flush_data_cache_page((unsigned long)vto); |
315 | -} |
316 | +#define __HAVE_ARCH_COPY_USER_HIGHPAGE |
317 | |
318 | /* |
319 | * These are used to make use of C type-checking.. |
320 | @@ -74,15 +72,17 @@ |
321 | #ifdef CONFIG_CPU_MIPS32 |
322 | typedef struct { unsigned long pte_low, pte_high; } pte_t; |
323 | #define pte_val(x) ((x).pte_low | ((unsigned long long)(x).pte_high << 32)) |
324 | + #define __pte(x) ({ pte_t __pte = {(x), ((unsigned long long)(x)) >> 32}; __pte; }) |
325 | #else |
326 | typedef struct { unsigned long long pte; } pte_t; |
327 | #define pte_val(x) ((x).pte) |
328 | + #define __pte(x) ((pte_t) { (x) } ) |
329 | #endif |
330 | #else |
331 | typedef struct { unsigned long pte; } pte_t; |
332 | #define pte_val(x) ((x).pte) |
333 | -#endif |
334 | #define __pte(x) ((pte_t) { (x) } ) |
335 | +#endif |
336 | |
337 | /* |
338 | * For 3-level pagetables we defines these ourselves, for 2-level the |
339 | diff -Naur linux-2.6.18.1/include/asm-mips/ptrace.h linux-mips-2.6.18.1/include/asm-mips/ptrace.h |
340 | --- linux-2.6.18.1/include/asm-mips/ptrace.h 2006-10-13 20:34:03.000000000 -0700 |
341 | +++ linux-mips-2.6.18.1/include/asm-mips/ptrace.h 2006-10-17 06:23:28.000000000 -0700 |
342 | @@ -10,8 +10,6 @@ |
343 | #define _ASM_PTRACE_H |
344 | |
345 | |
346 | -#include <asm/isadep.h> |
347 | - |
348 | /* 0 - 31 are integer registers, 32 - 63 are fp registers. */ |
349 | #define FPR_BASE 32 |
350 | #define PC 64 |
351 | @@ -73,6 +71,7 @@ |
352 | #ifdef __KERNEL__ |
353 | |
354 | #include <linux/linkage.h> |
355 | +#include <asm/isadep.h> |
356 | |
357 | /* |
358 | * Does the process account for user or for system time? |
359 | diff -Naur linux-2.6.18.1/include/asm-mips/spinlock.h linux-mips-2.6.18.1/include/asm-mips/spinlock.h |
360 | --- linux-2.6.18.1/include/asm-mips/spinlock.h 2006-10-13 20:34:03.000000000 -0700 |
361 | +++ linux-mips-2.6.18.1/include/asm-mips/spinlock.h 2006-10-17 06:23:28.000000000 -0700 |
362 | @@ -239,7 +239,51 @@ |
363 | : "memory"); |
364 | } |
365 | |
366 | -#define __raw_read_trylock(lock) generic__raw_read_trylock(lock) |
367 | +static inline int __raw_read_trylock(raw_rwlock_t *rw) |
368 | +{ |
369 | + unsigned int tmp; |
370 | + int ret; |
371 | + |
372 | + if (R10000_LLSC_WAR) { |
373 | + __asm__ __volatile__( |
374 | + " .set noreorder # __raw_read_trylock \n" |
375 | + " li %2, 0 \n" |
376 | + "1: ll %1, %3 \n" |
377 | + " bnez %1, 2f \n" |
378 | + " addu %1, 1 \n" |
379 | + " sc %1, %0 \n" |
380 | + " beqzl %1, 1b \n" |
381 | + " .set reorder \n" |
382 | +#ifdef CONFIG_SMP |
383 | + " sync \n" |
384 | +#endif |
385 | + " li %2, 1 \n" |
386 | + "2: \n" |
387 | + : "=m" (rw->lock), "=&r" (tmp), "=&r" (ret) |
388 | + : "m" (rw->lock) |
389 | + : "memory"); |
390 | + } else { |
391 | + __asm__ __volatile__( |
392 | + " .set noreorder # __raw_read_trylock \n" |
393 | + " li %2, 0 \n" |
394 | + "1: ll %1, %3 \n" |
395 | + " bnez %1, 2f \n" |
396 | + " addu %1, 1 \n" |
397 | + " sc %1, %0 \n" |
398 | + " beqz %1, 1b \n" |
399 | + " .set reorder \n" |
400 | +#ifdef CONFIG_SMP |
401 | + " sync \n" |
402 | +#endif |
403 | + " li %2, 1 \n" |
404 | + "2: \n" |
405 | + : "=m" (rw->lock), "=&r" (tmp), "=&r" (ret) |
406 | + : "m" (rw->lock) |
407 | + : "memory"); |
408 | + } |
409 | + |
410 | + return ret; |
411 | +} |
412 | |
413 | static inline int __raw_write_trylock(raw_rwlock_t *rw) |
414 | { |
415 | @@ -283,4 +327,5 @@ |
416 | return ret; |
417 | } |
418 | |
419 | + |
420 | #endif /* _ASM_SPINLOCK_H */ |
421 | diff -Naur linux-2.6.18.1/include/asm-mips/system.h linux-mips-2.6.18.1/include/asm-mips/system.h |
422 | --- linux-2.6.18.1/include/asm-mips/system.h 2006-10-13 20:34:03.000000000 -0700 |
423 | +++ linux-mips-2.6.18.1/include/asm-mips/system.h 2006-10-17 06:23:28.000000000 -0700 |
424 | @@ -392,7 +392,7 @@ |
425 | { |
426 | __u64 retval; |
427 | |
428 | - if (cpu_has_llsc) { |
429 | + if (cpu_has_llsc && R10000_LLSC_WAR) { |
430 | __asm__ __volatile__( |
431 | " .set push \n" |
432 | " .set noat \n" |
433 | diff -Naur linux-2.6.18.1/include/asm-mips/timex.h linux-mips-2.6.18.1/include/asm-mips/timex.h |
434 | --- linux-2.6.18.1/include/asm-mips/timex.h 2006-10-13 20:34:03.000000000 -0700 |
435 | +++ linux-mips-2.6.18.1/include/asm-mips/timex.h 2006-10-17 06:23:28.000000000 -0700 |
436 | @@ -8,6 +8,8 @@ |
437 | #ifndef _ASM_TIMEX_H |
438 | #define _ASM_TIMEX_H |
439 | |
440 | +#ifdef __KERNEL__ |
441 | + |
442 | #include <asm/mipsregs.h> |
443 | |
444 | /* |
445 | @@ -51,4 +53,6 @@ |
446 | return read_c0_count(); |
447 | } |
448 | |
449 | +#endif /* __KERNEL__ */ |
450 | + |
451 | #endif /* _ASM_TIMEX_H */ |
452 | diff -Naur linux-2.6.18.1/include/asm-mips/unistd.h linux-mips-2.6.18.1/include/asm-mips/unistd.h |
453 | --- linux-2.6.18.1/include/asm-mips/unistd.h 2006-10-13 20:34:03.000000000 -0700 |
454 | +++ linux-mips-2.6.18.1/include/asm-mips/unistd.h 2006-10-17 06:23:28.000000000 -0700 |
455 | @@ -313,7 +313,7 @@ |
456 | #define __NR_mknodat (__NR_Linux + 290) |
457 | #define __NR_fchownat (__NR_Linux + 291) |
458 | #define __NR_futimesat (__NR_Linux + 292) |
459 | -#define __NR_fstatat (__NR_Linux + 293) |
460 | +#define __NR_fstatat64 (__NR_Linux + 293) |
461 | #define __NR_unlinkat (__NR_Linux + 294) |
462 | #define __NR_renameat (__NR_Linux + 295) |
463 | #define __NR_linkat (__NR_Linux + 296) |
464 | @@ -329,16 +329,18 @@ |
465 | #define __NR_tee (__NR_Linux + 306) |
466 | #define __NR_vmsplice (__NR_Linux + 307) |
467 | #define __NR_move_pages (__NR_Linux + 308) |
468 | +#define __NR_set_robust_list (__NR_Linux + 309) |
469 | +#define __NR_get_robust_list (__NR_Linux + 310) |
470 | |
471 | /* |
472 | * Offset of the last Linux o32 flavoured syscall |
473 | */ |
474 | -#define __NR_Linux_syscalls 308 |
475 | +#define __NR_Linux_syscalls 310 |
476 | |
477 | #endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ |
478 | |
479 | #define __NR_O32_Linux 4000 |
480 | -#define __NR_O32_Linux_syscalls 308 |
481 | +#define __NR_O32_Linux_syscalls 310 |
482 | |
483 | #if _MIPS_SIM == _MIPS_SIM_ABI64 |
484 | |
485 | @@ -598,7 +600,7 @@ |
486 | #define __NR_mknodat (__NR_Linux + 249) |
487 | #define __NR_fchownat (__NR_Linux + 250) |
488 | #define __NR_futimesat (__NR_Linux + 251) |
489 | -#define __NR_fstatat (__NR_Linux + 252) |
490 | +#define __NR_newfstatat (__NR_Linux + 252) |
491 | #define __NR_unlinkat (__NR_Linux + 253) |
492 | #define __NR_renameat (__NR_Linux + 254) |
493 | #define __NR_linkat (__NR_Linux + 255) |
494 | @@ -614,16 +616,18 @@ |
495 | #define __NR_tee (__NR_Linux + 265) |
496 | #define __NR_vmsplice (__NR_Linux + 266) |
497 | #define __NR_move_pages (__NR_Linux + 267) |
498 | +#define __NR_set_robust_list (__NR_Linux + 268) |
499 | +#define __NR_get_robust_list (__NR_Linux + 269) |
500 | |
501 | /* |
502 | * Offset of the last Linux 64-bit flavoured syscall |
503 | */ |
504 | -#define __NR_Linux_syscalls 267 |
505 | +#define __NR_Linux_syscalls 269 |
506 | |
507 | #endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */ |
508 | |
509 | #define __NR_64_Linux 5000 |
510 | -#define __NR_64_Linux_syscalls 267 |
511 | +#define __NR_64_Linux_syscalls 269 |
512 | |
513 | #if _MIPS_SIM == _MIPS_SIM_NABI32 |
514 | |
515 | @@ -887,7 +891,7 @@ |
516 | #define __NR_mknodat (__NR_Linux + 253) |
517 | #define __NR_fchownat (__NR_Linux + 254) |
518 | #define __NR_futimesat (__NR_Linux + 255) |
519 | -#define __NR_fstatat (__NR_Linux + 256) |
520 | +#define __NR_newfstatat (__NR_Linux + 256) |
521 | #define __NR_unlinkat (__NR_Linux + 257) |
522 | #define __NR_renameat (__NR_Linux + 258) |
523 | #define __NR_linkat (__NR_Linux + 259) |
524 | @@ -903,16 +907,18 @@ |
525 | #define __NR_tee (__NR_Linux + 269) |
526 | #define __NR_vmsplice (__NR_Linux + 270) |
527 | #define __NR_move_pages (__NR_Linux + 271) |
528 | +#define __NR_set_robust_list (__NR_Linux + 272) |
529 | +#define __NR_get_robust_list (__NR_Linux + 273) |
530 | |
531 | /* |
532 | * Offset of the last N32 flavoured syscall |
533 | */ |
534 | -#define __NR_Linux_syscalls 271 |
535 | +#define __NR_Linux_syscalls 273 |
536 | |
537 | #endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */ |
538 | |
539 | #define __NR_N32_Linux 6000 |
540 | -#define __NR_N32_Linux_syscalls 271 |
541 | +#define __NR_N32_Linux_syscalls 273 |
542 | |
543 | #ifdef __KERNEL__ |
544 | |
545 | diff -Naur linux-2.6.18.1/include/asm-mips/user.h linux-mips-2.6.18.1/include/asm-mips/user.h |
546 | --- linux-2.6.18.1/include/asm-mips/user.h 2006-10-13 20:34:03.000000000 -0700 |
547 | +++ linux-mips-2.6.18.1/include/asm-mips/user.h 2006-10-17 06:23:28.000000000 -0700 |
548 | @@ -8,6 +8,8 @@ |
549 | #ifndef _ASM_USER_H |
550 | #define _ASM_USER_H |
551 | |
552 | +#ifdef __KERNEL__ |
553 | + |
554 | #include <asm/page.h> |
555 | #include <asm/reg.h> |
556 | |
557 | @@ -55,4 +57,6 @@ |
558 | #define HOST_DATA_START_ADDR (u.start_data) |
559 | #define HOST_STACK_END_ADDR (u.start_stack + u.u_ssize * NBPG) |
560 | |
561 | +#endif /* __KERNEL__ */ |
562 | + |
563 | #endif /* _ASM_USER_H */ |
564 | diff -Naur linux-2.6.18.1/include/linux/pci_ids.h linux-mips-2.6.18.1/include/linux/pci_ids.h |
565 | --- linux-2.6.18.1/include/linux/pci_ids.h 2006-10-13 20:34:03.000000000 -0700 |
566 | +++ linux-mips-2.6.18.1/include/linux/pci_ids.h 2006-10-17 06:23:28.000000000 -0700 |
567 | @@ -1603,6 +1603,9 @@ |
568 | #define PCI_VENDOR_ID_SATSAGEM 0x1267 |
569 | #define PCI_DEVICE_ID_SATSAGEM_NICCY 0x1016 |
570 | |
571 | +#define PCI_VENDOR_ID_SILICON_MOTION 0x126f |
572 | +#define PCI_DEVICE_ID_SM501_VOYAGER_GX_REV_AA 0x0501 |
573 | +#define PCI_DEVICE_ID_SM501_VOYAGER_GX_REV_B 0x0510 |
574 | |
575 | #define PCI_VENDOR_ID_ENSONIQ 0x1274 |
576 | #define PCI_DEVICE_ID_ENSONIQ_CT5880 0x5880 |
577 | diff -Naur linux-2.6.18.1/include/linux/serial.h linux-mips-2.6.18.1/include/linux/serial.h |
578 | --- linux-2.6.18.1/include/linux/serial.h 2006-10-13 20:34:03.000000000 -0700 |
579 | +++ linux-mips-2.6.18.1/include/linux/serial.h 2006-10-17 06:23:28.000000000 -0700 |
580 | @@ -76,7 +76,8 @@ |
581 | #define PORT_16654 11 |
582 | #define PORT_16850 12 |
583 | #define PORT_RSA 13 /* RSA-DV II/S card */ |
584 | -#define PORT_MAX 13 |
585 | +#define PORT_SB1250 14 |
586 | +#define PORT_MAX 14 |
587 | |
588 | #define SERIAL_IO_PORT 0 |
589 | #define SERIAL_IO_HUB6 1 |
590 | diff -Naur linux-2.6.18.1/include/linux/serial_ip3106.h linux-mips-2.6.18.1/include/linux/serial_ip3106.h |
591 | --- linux-2.6.18.1/include/linux/serial_ip3106.h 2006-10-13 20:34:03.000000000 -0700 |
592 | +++ linux-mips-2.6.18.1/include/linux/serial_ip3106.h 2006-10-17 06:23:28.000000000 -0700 |
593 | @@ -78,4 +78,16 @@ |
594 | #define IP3106_UART_FIFO_RXFIFO 0x00001F00 |
595 | #define IP3106_UART_FIFO_RBRTHR 0x000000FF |
596 | |
597 | +#define ip3106_lcr(base,port) *(volatile u32 *)(base+(port*0x1000) + 0x000) |
598 | +#define ip3106_mcr(base, port) *(volatile u32 *)(base+(port*0x1000) + 0x004) |
599 | +#define ip3106_baud(base, port) *(volatile u32 *)(base+(port*0x1000) + 0x008) |
600 | +#define ip3106_cfg(base, port) *(volatile u32 *)(base+(port*0x1000) + 0x00C) |
601 | +#define ip3106_fifo(base, port) *(volatile u32 *)(base+(port*0x1000) + 0x028) |
602 | +#define ip3106_istat(base, port) *(volatile u32 *)(base+(port*0x1000) + 0xFE0) |
603 | +#define ip3106_ien(base, port) *(volatile u32 *)(base+(port*0x1000) + 0xFE4) |
604 | +#define ip3106_iclr(base, port) *(volatile u32 *)(base+(port*0x1000) + 0xFE8) |
605 | +#define ip3106_iset(base, port) *(volatile u32 *)(base+(port*0x1000) + 0xFEC) |
606 | +#define ip3106_pd(base, port) *(volatile u32 *)(base+(port*0x1000) + 0xFF4) |
607 | +#define ip3106_mid(base, port) *(volatile u32 *)(base+(port*0x1000) + 0xFFC) |
608 | + |
609 | #endif |