diff -Naur linux-2.6.21.1/include/asm-mips/addrspace.h linux-mips-2.6.21.1/include/asm-mips/addrspace.h
--- linux-2.6.21.1/include/asm-mips/addrspace.h	2007-04-27 14:49:26.000000000 -0700
+++ linux-mips-2.6.21.1/include/asm-mips/addrspace.h	2007-04-30 08:27:20.000000000 -0700
@@ -133,6 +133,7 @@
     || defined (CONFIG_CPU_R4X00)					\
     || defined (CONFIG_CPU_R5000)					\
     || defined (CONFIG_CPU_RM7000)					\
+    || defined (CONFIG_CPU_RM9000)					\
     || defined (CONFIG_CPU_NEVADA)					\
     || defined (CONFIG_CPU_TX49XX)					\
     || defined (CONFIG_CPU_MIPS64)
diff -Naur linux-2.6.21.1/include/asm-mips/mach-cobalt/ide.h linux-mips-2.6.21.1/include/asm-mips/mach-cobalt/ide.h
--- linux-2.6.21.1/include/asm-mips/mach-cobalt/ide.h	1969-12-31 16:00:00.000000000 -0800
+++ linux-mips-2.6.21.1/include/asm-mips/mach-cobalt/ide.h	2007-05-05 22:24:37.000000000 -0700
@@ -0,0 +1,83 @@
+
+/*
+ * PIO "in" transfers can cause D-cache lines to be allocated
+ * to the data being read. If the target is the page cache then
+ * the kernel can create a user space mapping of the same page
+ * without flushing it from the D-cache. This has large potential
+ * to create cache aliases. The Cobalts seem to trigger this
+ * problem easily.
+ *
+ * MIPs doesn't have a flush_dcache_range() so we roll
+ * our own.
+ *
+ * -- pdh
+ */
+
+#define MAX_HWIFS                      2
+
+#include <asm/r4kcache.h>
+
+static inline void __flush_dcache(void)
+{
+       unsigned long dc_size, dc_line, addr, end;
+
+       dc_size = current_cpu_data.dcache.ways << current_cpu_data.dcache.waybit;
+       dc_line = current_cpu_data.dcache.linesz;
+
+       addr = CKSEG0;
+       end = addr + dc_size;
+
+       for (; addr < end; addr += dc_line)
+               flush_dcache_line_indexed(addr);
+}
+
+static inline void __flush_dcache_range(unsigned long start, unsigned long end)
+{
+       unsigned long dc_size, dc_line, addr;
+
+       dc_size = current_cpu_data.dcache.ways << current_cpu_data.dcache.waybit;
+       dc_line = current_cpu_data.dcache.linesz;
+
+       addr = start & ~(dc_line - 1);
+       end += dc_line - 1;
+
+       if (end - addr < dc_size)
+               for (; addr < end; addr += dc_line)
+                       flush_dcache_line(addr);
+       else
+               __flush_dcache();
+}
+
+static inline void __ide_insw(unsigned long port, void *addr, unsigned int count)
+{
+       insw(port, addr, count);
+
+       __flush_dcache_range((unsigned long) addr, (unsigned long) addr + count * 2);
+}
+
+static inline void __ide_insl(unsigned long port, void *addr, unsigned int count)
+{
+       insl(port, addr, count);
+
+       __flush_dcache_range((unsigned long) addr, (unsigned long) addr + count * 4);
+}
+
+static inline void __ide_mm_insw(volatile void __iomem *port, void *addr, unsigned int count)
+{
+       readsw(port, addr, count);
+
+       __flush_dcache_range((unsigned long) addr, (unsigned long) addr + count * 2);
+}
+
+static inline void __ide_mm_insl(volatile void __iomem *port, void *addr, unsigned int count)
+{
+       readsl(port, addr, count);
+
+       __flush_dcache_range((unsigned long) addr, (unsigned long) addr + count * 4);
+}
+
+#define insw                   __ide_insw
+#define insl                   __ide_insl
+
+#define __ide_mm_outsw         writesw
+#define __ide_mm_outsl         writesl
diff -Naur linux-2.6.21.1/include/asm-mips/mach-generic/ide.h linux-mips-2.6.21.1/include/asm-mips/mach-generic/ide.h
--- linux-2.6.21.1/include/asm-mips/mach-generic/ide.h	2007-04-27 14:49:26.000000000 -0700
+++ linux-mips-2.6.21.1/include/asm-mips/mach-generic/ide.h	2007-04-30 08:27:20.000000000 -0700
@@ -29,17 +29,12 @@
 
 #define IDE_ARCH_OBSOLETE_DEFAULTS
 
+extern int mips_system_has_legacy_ide;
+
 static __inline__ int ide_probe_legacy(void)
 {
 #ifdef CONFIG_PCI
-	struct pci_dev *dev;
-	if ((dev = pci_get_class(PCI_CLASS_BRIDGE_EISA << 8, NULL)) != NULL ||
-	    (dev = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, NULL)) != NULL) {
-		pci_dev_put(dev);
-
-		return 1;
-	}
-	return 0;
+	return mips_system_has_legacy_ide;
 #elif defined(CONFIG_EISA) || defined(CONFIG_ISA)
 	return 1;
 #else