busybox/scripts/Makefile.build

# ==========================================================================
# Building
# ==========================================================================

src := $(obj)

PHONY := __build
__build:

# Read .config if it exist, otherwise ignore
-include .config

include scripts/Kbuild.include

# The filename Kbuild has precedence over Makefile
# bbox: we also try to include Kbuild file in obj tree first
kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
include $(if $(wildcard $(src)/Kbuild), $(src)/Kbuild, \
		$(if $(wildcard $(kbuild-dir)/Kbuild), $(kbuild-dir)/Kbuild, \
			$(kbuild-dir)/Makefile \
		) \
	)

include scripts/Makefile.lib

ifdef host-progs
ifneq ($(hostprogs-y),$(host-progs))
$(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
hostprogs-y += $(host-progs)
endif
endif

# Do not include host rules unles needed
ifneq ($(hostprogs-y)$(hostprogs-m),)
include scripts/Makefile.host
endif

ifneq ($(KBUILD_SRC),)
# Create output directory if not already present
_dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))

# Create directories for object files if directory does not exist
# Needed when obj-y := dir/file.o syntax is used
_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
endif


ifdef EXTRA_TARGETS
$(warning kbuild: $(obj)/Makefile - Usage of EXTRA_TARGETS is obsolete in 2.6. Please fix!)
endif

ifdef build-targets
$(warning kbuild: $(obj)/Makefile - Usage of build-targets is obsolete in 2.6. Please fix!)
endif

ifdef export-objs
$(warning kbuild: $(obj)/Makefile - Usage of export-objs is obsolete in 2.6. Please fix!)
endif

ifdef O_TARGET
$(warning kbuild: $(obj)/Makefile - Usage of O_TARGET := $(O_TARGET) is obsolete in 2.6. Please fix!)
endif

ifdef L_TARGET
$(error kbuild: $(obj)/Makefile - Use of L_TARGET is replaced by lib-y in 2.6. Please fix!)
endif

ifdef list-multi
$(warning kbuild: $(obj)/Makefile - list-multi := $(list-multi) is obsolete in 2.6. Please fix!)
endif

ifndef obj
$(warning kbuild: Makefile.build is included improperly)
endif

# ===========================================================================

ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),)
lib-target := $(obj)/lib.a
endif

ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(lib-target)),)
builtin-target := $(obj)/built-in.o
endif

# We keep a list of all modules in $(MODVERDIR)

__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
	 $(if $(KBUILD_MODULES),$(obj-m)) \
	 $(subdir-ym) $(always)
	@:

# Linus' kernel sanity checking tool
ifneq ($(KBUILD_CHECKSRC),0)
  ifeq ($(KBUILD_CHECKSRC),2)
    quiet_cmd_force_checksrc = CHECK   $<
          cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  else
      quiet_cmd_checksrc     = CHECK   $<
            cmd_checksrc     = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  endif
endif


# Compile C sources (.c)
# ---------------------------------------------------------------------------

# Default is built-in, unless we know otherwise
modkern_cflags := $(CFLAGS_KERNEL)
quiet_modtag := $(empty)   $(empty)

$(real-objs-m)        : modkern_cflags := $(CFLAGS_MODULE)
$(real-objs-m:.o=.i)  : modkern_cflags := $(CFLAGS_MODULE)
$(real-objs-m:.o=.s)  : modkern_cflags := $(CFLAGS_MODULE)
$(real-objs-m:.o=.lst): modkern_cflags := $(CFLAGS_MODULE)

$(real-objs-m)        : quiet_modtag := [M]
$(real-objs-m:.o=.i)  : quiet_modtag := [M]
$(real-objs-m:.o=.s)  : quiet_modtag := [M]
$(real-objs-m:.o=.lst): quiet_modtag := [M]

$(obj-m)              : quiet_modtag := [M]

# Default for not multi-part modules
modname = $(*F)

$(multi-objs-m)         : modname = $(modname-multi)
$(multi-objs-m:.o=.i)   : modname = $(modname-multi)
$(multi-objs-m:.o=.s)   : modname = $(modname-multi)
$(multi-objs-m:.o=.lst) : modname = $(modname-multi)
$(multi-objs-y)         : modname = $(modname-multi)
$(multi-objs-y:.o=.i)   : modname = $(modname-multi)
$(multi-objs-y:.o=.s)   : modname = $(modname-multi)
$(multi-objs-y:.o=.lst) : modname = $(modname-multi)

quiet_cmd_cc_s_c = CC $(quiet_modtag)  $@
cmd_cc_s_c       = $(CC) $(c_flags) -fverbose-asm -S -o $@ $<

%.s: %.c FORCE
	$(call if_changed_dep,cc_s_c)

quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
cmd_cc_i_c       = $(CPP) $(c_flags)   -o $@ $<

%.i: %.c FORCE
	$(call if_changed_dep,cc_i_c)

# C (.c) files
# The C file is compiled and updated dependency information is generated.
# (See cmd_cc_o_c + relevant part of rule_cc_o_c)

quiet_cmd_cc_o_c = CC $(quiet_modtag)  $@

ifndef CONFIG_MODVERSIONS
cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<

else
# When module versioning is enabled the following steps are executed:
# o compile a .tmp_<file>.o from <file>.c
# o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
#   not export symbols, we just rename .tmp_<file>.o to <file>.o and
#   are done.
# o otherwise, we calculate symbol versions using the good old
#   genksyms on the preprocessed source and postprocess them in a way
#   that they are usable as a linker script
# o generate <file>.o from .tmp_<file>.o using the linker to
#   replace the unresolved symbols __crc_exported_symbol with
#   the actual value of the checksum generated by genksyms

cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
cmd_modversions =							\
	if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then	\
		$(CPP) -D__GENKSYMS__ $(c_flags) $<			\
		| $(GENKSYMS) -a $(ARCH)				\
		> $(@D)/.tmp_$(@F:.o=.ver);				\
									\
		$(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) 		\
			-T $(@D)/.tmp_$(@F:.o=.ver);			\
		rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver);	\
	else								\
		mv -f $(@D)/.tmp_$(@F) $@;				\
	fi;
endif

define rule_cc_o_c
	$(call echo-cmd,checksrc) $(cmd_checksrc)			  \
	$(call echo-cmd,cc_o_c) $(cmd_cc_o_c);				  \
	$(cmd_modversions)						  \
	scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > $(@D)/.$(@F).tmp;  \
	rm -f $(depfile);						  \
	mv -f $(@D)/.$(@F).tmp $(@D)/.$(@F).cmd
endef

# Built-in and composite module parts

%.o: %.c FORCE
	$(call cmd,force_checksrc)
	$(call if_changed_rule,cc_o_c)

# Single-part modules are special since we need to mark them in $(MODVERDIR)

$(single-used-m): %.o: %.c FORCE
	$(call cmd,force_checksrc)
	$(call if_changed_rule,cc_o_c)
	@{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)

quiet_cmd_cc_lst_c = MKLST   $@
      cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
		     $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
				     System.map $(OBJDUMP) > $@

%.lst: %.c FORCE
	$(call if_changed_dep,cc_lst_c)

# Compile assembler sources (.S)
# ---------------------------------------------------------------------------

modkern_aflags := $(AFLAGS_KERNEL)

$(real-objs-m)      : modkern_aflags := $(AFLAGS_MODULE)
$(real-objs-m:.o=.s): modkern_aflags := $(AFLAGS_MODULE)

quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
cmd_as_s_S       = $(CPP) $(a_flags)   -o $@ $<

%.s: %.S FORCE
	$(call if_changed_dep,as_s_S)

quiet_cmd_as_o_S = AS $(quiet_modtag)  $@
cmd_as_o_S       = $(CC) $(a_flags) -c -o $@ $<

%.o: %.S FORCE
	$(call if_changed_dep,as_o_S)

targets += $(real-objs-y) $(real-objs-m) $(lib-y)
targets += $(extra-y) $(MAKECMDGOALS) $(always)

# Linker scripts preprocessor (.lds.S -> .lds)
# ---------------------------------------------------------------------------
quiet_cmd_cpp_lds_S = LDS     $@
      cmd_cpp_lds_S = $(CPP) $(cpp_flags) -D__ASSEMBLY__ -o $@ $<

%.lds: %.lds.S FORCE
	$(call if_changed_dep,cpp_lds_S)

# Build the compiled-in targets
# ---------------------------------------------------------------------------

# To build objects in subdirs, we need to descend into the directories
$(sort $(subdir-obj-y)): $(subdir-ym) ;

#
# Rule to compile a set of .o files into one .o file
#
ifdef builtin-target
quiet_cmd_link_o_target = LD      $@
# If the list of objects to link is empty, just create an empty built-in.o
cmd_link_o_target = $(if $(strip $(obj-y)),\
		$(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^),\
		rm -f $@; $(AR) rcs $@)

$(builtin-target): $(obj-y) FORCE
	$(call if_changed,link_o_target)

targets += $(builtin-target)
endif # builtin-target

#
# Rule to compile a set of .o files into one .a file
#
ifdef lib-target
quiet_cmd_link_l_target = AR      $@
cmd_link_l_target = rm -f $@; $(AR) $(EXTRA_ARFLAGS) rcs $@ $(lib-y)

$(lib-target): $(lib-y) FORCE
	$(call if_changed,link_l_target)

targets += $(lib-target)
endif

#
# Rule to link composite objects
#
#  Composite objects are specified in kbuild makefile as follows:
#    <composite-object>-objs := <list of .o files>
#  or
#    <composite-object>-y    := <list of .o files>
link_multi_deps =                     \
$(filter $(addprefix $(obj)/,         \
$($(subst $(obj)/,,$(@:.o=-objs)))    \
$($(subst $(obj)/,,$(@:.o=-y)))), $^)

quiet_cmd_link_multi-y = LD      $@
cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps)

quiet_cmd_link_multi-m = LD [M]  $@
cmd_link_multi-m = $(LD) $(ld_flags) $(LDFLAGS_MODULE) -o $@ $(link_multi_deps)

# We would rather have a list of rules like
# 	foo.o: $(foo-objs)
# but that's not so easy, so we rather make all composite objects depend
# on the set of all their parts
$(multi-used-y) : %.o: $(multi-objs-y) FORCE
	$(call if_changed,link_multi-y)

$(multi-used-m) : %.o: $(multi-objs-m) FORCE
	$(call if_changed,link_multi-m)
	@{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)

targets += $(multi-used-y) $(multi-used-m)


# Descending
# ---------------------------------------------------------------------------

PHONY += $(subdir-ym)
$(subdir-ym):
	$(Q)$(MAKE) $(build)=$@

# Add FORCE to the prequisites of a target to force it to be always rebuilt.
# ---------------------------------------------------------------------------

PHONY += FORCE

FORCE:

# Read all saved command lines and dependencies for the $(targets) we
# may be building above, using $(if_changed{,_dep}). As an
# optimization, we don't need to read them if the target does not
# exist, we will rebuild anyway in that case.

targets := $(wildcard $(sort $(targets)))
cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))

ifneq ($(cmd_files),)
  include $(cmd_files)
endif


# Declare the contents of the .PHONY variable as phony.  We keep that
# information in a variable se we can use it in if_changed and friends.

.PHONY: $(PHONY)
1	# ==========================================================================
2	# Building
3	# ==========================================================================
4
5	src := $(obj)
6
7	PHONY := __build
8	__build:
9
10	# Read .config if it exist, otherwise ignore
11	-include .config
12
13	include scripts/Kbuild.include
14
15	# The filename Kbuild has precedence over Makefile
16	# bbox: we also try to include Kbuild file in obj tree first
17	kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
18	include $(if $(wildcard $(src)/Kbuild), $(src)/Kbuild, \
19	$(if $(wildcard $(kbuild-dir)/Kbuild), $(kbuild-dir)/Kbuild, \
20	$(kbuild-dir)/Makefile \
21	) \
22	)
23
24	include scripts/Makefile.lib
25
26	ifdef host-progs
27	ifneq ($(hostprogs-y),$(host-progs))
28	$(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
29	hostprogs-y += $(host-progs)
30	endif
31	endif
32
33	# Do not include host rules unles needed
34	ifneq ($(hostprogs-y)$(hostprogs-m),)
35	include scripts/Makefile.host
36	endif
37
38	ifneq ($(KBUILD_SRC),)
39	# Create output directory if not already present
40	_dummy := $(shell [ -d $(obj) ] \|\| mkdir -p $(obj))
41
42	# Create directories for object files if directory does not exist
43	# Needed when obj-y := dir/file.o syntax is used
44	_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] \|\| mkdir -p $(d)))
45	endif
46
47
48	ifdef EXTRA_TARGETS
49	$(warning kbuild: $(obj)/Makefile - Usage of EXTRA_TARGETS is obsolete in 2.6. Please fix!)
50	endif
51
52	ifdef build-targets
53	$(warning kbuild: $(obj)/Makefile - Usage of build-targets is obsolete in 2.6. Please fix!)
54	endif
55
56	ifdef export-objs
57	$(warning kbuild: $(obj)/Makefile - Usage of export-objs is obsolete in 2.6. Please fix!)
58	endif
59
60	ifdef O_TARGET
61	$(warning kbuild: $(obj)/Makefile - Usage of O_TARGET := $(O_TARGET) is obsolete in 2.6. Please fix!)
62	endif
63
64	ifdef L_TARGET
65	$(error kbuild: $(obj)/Makefile - Use of L_TARGET is replaced by lib-y in 2.6. Please fix!)
66	endif
67
68	ifdef list-multi
69	$(warning kbuild: $(obj)/Makefile - list-multi := $(list-multi) is obsolete in 2.6. Please fix!)
70	endif
71
72	ifndef obj
73	$(warning kbuild: Makefile.build is included improperly)
74	endif
75
76	# ===========================================================================
77
78	ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),)
79	lib-target := $(obj)/lib.a
80	endif
81
82	ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(lib-target)),)
83	builtin-target := $(obj)/built-in.o
84	endif
85
86	# We keep a list of all modules in $(MODVERDIR)
87
88	__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
89	$(if $(KBUILD_MODULES),$(obj-m)) \
90	$(subdir-ym) $(always)
91	@:
92
93	# Linus' kernel sanity checking tool
94	ifneq ($(KBUILD_CHECKSRC),0)
95	ifeq ($(KBUILD_CHECKSRC),2)
96	quiet_cmd_force_checksrc = CHECK $<
97	cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
98	else
99	quiet_cmd_checksrc = CHECK $<
100	cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
101	endif
102	endif
103
104
105	# Compile C sources (.c)
106	# ---------------------------------------------------------------------------
107
108	# Default is built-in, unless we know otherwise
109	modkern_cflags := $(CFLAGS_KERNEL)
110	quiet_modtag := $(empty) $(empty)
111
112	$(real-objs-m) : modkern_cflags := $(CFLAGS_MODULE)
113	$(real-objs-m:.o=.i) : modkern_cflags := $(CFLAGS_MODULE)
114	$(real-objs-m:.o=.s) : modkern_cflags := $(CFLAGS_MODULE)
115	$(real-objs-m:.o=.lst): modkern_cflags := $(CFLAGS_MODULE)
116
117	$(real-objs-m) : quiet_modtag := [M]
118	$(real-objs-m:.o=.i) : quiet_modtag := [M]
119	$(real-objs-m:.o=.s) : quiet_modtag := [M]
120	$(real-objs-m:.o=.lst): quiet_modtag := [M]
121
122	$(obj-m) : quiet_modtag := [M]
123
124	# Default for not multi-part modules
125	modname = $(*F)
126
127	$(multi-objs-m) : modname = $(modname-multi)
128	$(multi-objs-m:.o=.i) : modname = $(modname-multi)
129	$(multi-objs-m:.o=.s) : modname = $(modname-multi)
130	$(multi-objs-m:.o=.lst) : modname = $(modname-multi)
131	$(multi-objs-y) : modname = $(modname-multi)
132	$(multi-objs-y:.o=.i) : modname = $(modname-multi)
133	$(multi-objs-y:.o=.s) : modname = $(modname-multi)
134	$(multi-objs-y:.o=.lst) : modname = $(modname-multi)
135
136	quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
137	cmd_cc_s_c = $(CC) $(c_flags) -fverbose-asm -S -o $@ $<
138
139	%.s: %.c FORCE
140	$(call if_changed_dep,cc_s_c)
141
142	quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
143	cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $<
144
145	%.i: %.c FORCE
146	$(call if_changed_dep,cc_i_c)
147
148	# C (.c) files
149	# The C file is compiled and updated dependency information is generated.
150	# (See cmd_cc_o_c + relevant part of rule_cc_o_c)
151
152	quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
153
154	ifndef CONFIG_MODVERSIONS
155	cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
156
157	else
158	# When module versioning is enabled the following steps are executed:
159	# o compile a .tmp_<file>.o from <file>.c
160	# o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
161	# not export symbols, we just rename .tmp_<file>.o to <file>.o and
162	# are done.
163	# o otherwise, we calculate symbol versions using the good old
164	# genksyms on the preprocessed source and postprocess them in a way
165	# that they are usable as a linker script
166	# o generate <file>.o from .tmp_<file>.o using the linker to
167	# replace the unresolved symbols __crc_exported_symbol with
168	# the actual value of the checksum generated by genksyms
169
170	cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
171	cmd_modversions = \
172	if $(OBJDUMP) -h $(@D)/.tmp_$(@F) \| grep -q __ksymtab; then \
173	$(CPP) -D__GENKSYMS__ $(c_flags) $< \
174	\| $(GENKSYMS) -a $(ARCH) \
175	> $(@D)/.tmp_$(@F:.o=.ver); \
176	\
177	$(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \
178	-T $(@D)/.tmp_$(@F:.o=.ver); \
179	rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \
180	else \
181	mv -f $(@D)/.tmp_$(@F) $@; \
182	fi;
183	endif
184
185	define rule_cc_o_c
186	$(call echo-cmd,checksrc) $(cmd_checksrc) \
187	$(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \
188	$(cmd_modversions) \
189	scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > $(@D)/.$(@F).tmp; \
190	rm -f $(depfile); \
191	mv -f $(@D)/.$(@F).tmp $(@D)/.$(@F).cmd
192	endef
193
194	# Built-in and composite module parts
195
196	%.o: %.c FORCE
197	$(call cmd,force_checksrc)
198	$(call if_changed_rule,cc_o_c)
199
200	# Single-part modules are special since we need to mark them in $(MODVERDIR)
201
202	$(single-used-m): %.o: %.c FORCE
203	$(call cmd,force_checksrc)
204	$(call if_changed_rule,cc_o_c)
205	@{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
206
207	quiet_cmd_cc_lst_c = MKLST $@
208	cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
209	$(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
210	System.map $(OBJDUMP) > $@
211
212	%.lst: %.c FORCE
213	$(call if_changed_dep,cc_lst_c)
214
215	# Compile assembler sources (.S)
216	# ---------------------------------------------------------------------------
217
218	modkern_aflags := $(AFLAGS_KERNEL)
219
220	$(real-objs-m) : modkern_aflags := $(AFLAGS_MODULE)
221	$(real-objs-m:.o=.s): modkern_aflags := $(AFLAGS_MODULE)
222
223	quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
224	cmd_as_s_S = $(CPP) $(a_flags) -o $@ $<
225
226	%.s: %.S FORCE
227	$(call if_changed_dep,as_s_S)
228
229	quiet_cmd_as_o_S = AS $(quiet_modtag) $@
230	cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
231
232	%.o: %.S FORCE
233	$(call if_changed_dep,as_o_S)
234
235	targets += $(real-objs-y) $(real-objs-m) $(lib-y)
236	targets += $(extra-y) $(MAKECMDGOALS) $(always)
237
238	# Linker scripts preprocessor (.lds.S -> .lds)
239	# ---------------------------------------------------------------------------
240	quiet_cmd_cpp_lds_S = LDS $@
241	cmd_cpp_lds_S = $(CPP) $(cpp_flags) -D__ASSEMBLY__ -o $@ $<
242
243	%.lds: %.lds.S FORCE
244	$(call if_changed_dep,cpp_lds_S)
245
246	# Build the compiled-in targets
247	# ---------------------------------------------------------------------------
248
249	# To build objects in subdirs, we need to descend into the directories
250	$(sort $(subdir-obj-y)): $(subdir-ym) ;
251
252	#
253	# Rule to compile a set of .o files into one .o file
254	#
255	ifdef builtin-target
256	quiet_cmd_link_o_target = LD $@
257	# If the list of objects to link is empty, just create an empty built-in.o
258	cmd_link_o_target = $(if $(strip $(obj-y)),\
259	$(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^),\
260	rm -f $@; $(AR) rcs $@)
261
262	$(builtin-target): $(obj-y) FORCE
263	$(call if_changed,link_o_target)
264
265	targets += $(builtin-target)
266	endif # builtin-target
267
268	#
269	# Rule to compile a set of .o files into one .a file
270	#
271	ifdef lib-target
272	quiet_cmd_link_l_target = AR $@
273	cmd_link_l_target = rm -f $@; $(AR) $(EXTRA_ARFLAGS) rcs $@ $(lib-y)
274
275	$(lib-target): $(lib-y) FORCE
276	$(call if_changed,link_l_target)
277
278	targets += $(lib-target)
279	endif
280
281	#
282	# Rule to link composite objects
283	#
284	# Composite objects are specified in kbuild makefile as follows:
285	# <composite-object>-objs := <list of .o files>
286	# or
287	# <composite-object>-y := <list of .o files>
288	link_multi_deps = \
289	$(filter $(addprefix $(obj)/, \
290	$($(subst $(obj)/,,$(@:.o=-objs))) \
291	$($(subst $(obj)/,,$(@:.o=-y)))), $^)
292
293	quiet_cmd_link_multi-y = LD $@
294	cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps)
295
296	quiet_cmd_link_multi-m = LD [M] $@
297	cmd_link_multi-m = $(LD) $(ld_flags) $(LDFLAGS_MODULE) -o $@ $(link_multi_deps)
298
299	# We would rather have a list of rules like
300	# foo.o: $(foo-objs)
301	# but that's not so easy, so we rather make all composite objects depend
302	# on the set of all their parts
303	$(multi-used-y) : %.o: $(multi-objs-y) FORCE
304	$(call if_changed,link_multi-y)
305
306	$(multi-used-m) : %.o: $(multi-objs-m) FORCE
307	$(call if_changed,link_multi-m)
308	@{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
309
310	targets += $(multi-used-y) $(multi-used-m)
311
312
313	# Descending
314	# ---------------------------------------------------------------------------
315
316	PHONY += $(subdir-ym)
317	$(subdir-ym):
318	$(Q)$(MAKE) $(build)=$@
319
320	# Add FORCE to the prequisites of a target to force it to be always rebuilt.
321	# ---------------------------------------------------------------------------
322
323	PHONY += FORCE
324
325	FORCE:
326
327	# Read all saved command lines and dependencies for the $(targets) we
328	# may be building above, using $(if_changed{,_dep}). As an
329	# optimization, we don't need to read them if the target does not
330	# exist, we will rebuild anyway in that case.
331
332	targets := $(wildcard $(sort $(targets)))
333	cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
334
335	ifneq ($(cmd_files),)
336	include $(cmd_files)
337	endif
338
339
340	# Declare the contents of the .PHONY variable as phony. We keep that
341	# information in a variable se we can use it in if_changed and friends.
342
343	.PHONY: $(PHONY)