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Contents of /smage/trunk/core/xf86-video-ati/mcore/files/xf86-video-ati-6.13.0-mcore-dri-and-drm-fixes.patch

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Revision 498 - (show annotations) (download)
Fri May 7 20:43:41 2010 UTC (14 years ago) by niro
File size: 58032 byte(s)
-added patches
1 diff -Naur xf86-video-ati-6.13.0/Makefile.in xf86-video-ati-6.13.0-mcore/Makefile.in
2 --- xf86-video-ati-6.13.0/Makefile.in 2010-04-05 17:55:33.000000000 +0200
3 +++ xf86-video-ati-6.13.0-mcore/Makefile.in 2010-05-07 20:06:02.000000000 +0200
4 @@ -1,4 +1,4 @@
5 -# Makefile.in generated by automake 1.10.1 from Makefile.am.
6 +# Makefile.in generated by automake 1.10.2 from Makefile.am.
7 # @configure_input@
8
9 # Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
10 @@ -94,6 +94,7 @@
11 ADMIN_MAN_DIR = @ADMIN_MAN_DIR@
12 ADMIN_MAN_SUFFIX = @ADMIN_MAN_SUFFIX@
13 AMTAR = @AMTAR@
14 +AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@
15 APP_MAN_DIR = @APP_MAN_DIR@
16 APP_MAN_SUFFIX = @APP_MAN_SUFFIX@
17 AR = @AR@
18 @@ -114,8 +115,6 @@
19 DRIVER_MAN_DIR = @DRIVER_MAN_DIR@
20 DRIVER_MAN_SUFFIX = @DRIVER_MAN_SUFFIX@
21 DRIVER_NAME = @DRIVER_NAME@
22 -DRI_CFLAGS = @DRI_CFLAGS@
23 -DRI_LIBS = @DRI_LIBS@
24 DSYMUTIL = @DSYMUTIL@
25 DUMPBIN = @DUMPBIN@
26 ECHO_C = @ECHO_C@
27 @@ -152,6 +151,7 @@
28 MKDIR_P = @MKDIR_P@
29 NM = @NM@
30 NMEDIT = @NMEDIT@
31 +OBJDUMP = @OBJDUMP@
32 OBJEXT = @OBJEXT@
33 OTOOL = @OTOOL@
34 OTOOL64 = @OTOOL64@
35 @@ -226,6 +226,7 @@
36 srcdir = @srcdir@
37 sysconfdir = @sysconfdir@
38 target_alias = @target_alias@
39 +top_build_prefix = @top_build_prefix@
40 top_builddir = @top_builddir@
41 top_srcdir = @top_srcdir@
42 SUBDIRS = src man
43 @@ -292,7 +293,7 @@
44 -rm -rf .libs _libs
45
46 distclean-libtool:
47 - -rm -f libtool
48 + -rm -f libtool config.lt
49
50 # This directory's subdirectories are mostly independent; you can cd
51 # into them and run `make' without going through this Makefile.
52 @@ -369,7 +370,7 @@
53 unique=`for i in $$list; do \
54 if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
55 done | \
56 - $(AWK) '{ files[$$0] = 1; nonemtpy = 1; } \
57 + $(AWK) '{ files[$$0] = 1; nonempty = 1; } \
58 END { if (nonempty) { for (i in files) print i; }; }'`; \
59 mkid -fID $$unique
60 tags: TAGS
61 diff -Naur xf86-video-ati-6.13.0/config.h.in xf86-video-ati-6.13.0-mcore/config.h.in
62 --- xf86-video-ati-6.13.0/config.h.in 2010-04-05 17:55:55.000000000 +0200
63 +++ xf86-video-ati-6.13.0-mcore/config.h.in 2010-05-07 20:06:01.000000000 +0200
64 @@ -2,9 +2,6 @@
65
66 #include "xorg-server.h"
67
68 -/* Use Damage extension */
69 -#undef DAMAGE
70 -
71 /* Use linux pragma pack */
72 #undef FGL_LINUX
73
74 @@ -14,6 +11,9 @@
75 /* Define to 1 if you have the <dlfcn.h> header file. */
76 #undef HAVE_DLFCN_H
77
78 +/* Enable DRI driver support */
79 +#undef HAVE_DRI
80 +
81 /* have new FreeShadow API */
82 #undef HAVE_FREE_SHADOW
83
84 @@ -90,9 +90,6 @@
85 /* Patch version of this package */
86 #undef PACKAGE_VERSION_PATCHLEVEL
87
88 -/* Enable DRI2 code */
89 -#undef RADEON_DRI2
90 -
91 /* Define to 1 if you have the ANSI C header files. */
92 #undef STDC_HEADERS
93
94 @@ -108,15 +105,6 @@
95 /* Version number of package */
96 #undef VERSION
97
98 -/* Enable DRI driver support */
99 -#undef XF86DRI
100 -
101 -/* Enable developmental DRI driver support */
102 -#undef XF86DRI_DEVEL
103 -
104 -/* DRM kernel modesetting */
105 -#undef XF86DRM_MODE
106 -
107 /* X server has built-in mode code */
108 #undef XMODES
109
110 diff -Naur xf86-video-ati-6.13.0/configure.ac xf86-video-ati-6.13.0-mcore/configure.ac
111 --- xf86-video-ati-6.13.0/configure.ac 2010-04-05 17:55:04.000000000 +0200
112 +++ xf86-video-ati-6.13.0-mcore/configure.ac 2010-05-07 19:45:53.000000000 +0200
113 @@ -100,64 +100,16 @@
114 AC_HEADER_STDC
115
116 if test "$DRI" != no; then
117 - PKG_CHECK_MODULES(DRI, [libdrm >= 2.2 xf86driproto])
118 - save_CPPFLAGS="$CPPFLAGS"
119 - CPPFLAGS="$XORG_CFLAGS $DRI_CFLAGS"
120 - AC_CHECK_HEADER([dri.h],
121 - [have_dri_h="yes"], [have_dri_h="no"],[-])
122 - AC_CHECK_HEADER([sarea.h],
123 - [have_sarea_h="yes"], [have_sarea_h="no"],[-])
124 - AC_PREPROC_IFELSE([AC_LANG_PROGRAM([[
125 -#include <xorg-server.h>
126 -#include <dristruct.h>
127 - ]])],
128 - [have_dristruct_h="yes"], [have_dristruct_h="no"],[-])
129 - AC_CHECK_HEADER([damage.h],
130 - [have_damage_h="yes"], [have_damage_h="no"],[-])
131 - CPPFLAGS="$save_CPPFLAGS"
132 -fi
133 -
134 -AC_MSG_CHECKING([whether to include DRI support])
135 -if test x$DRI = xauto; then
136 - if test "$have_dri_h" = yes -a \
137 - "$have_sarea_h" = yes -a \
138 - "$have_dristruct_h" = yes; then
139 - DRI="yes"
140 - else
141 - DRI="no"
142 - fi
143 -fi
144 -AC_MSG_RESULT([$DRI])
145 -
146 -AM_CONDITIONAL(DRI, test x$DRI = xyes)
147 -if test "$DRI" = yes; then
148 - AC_DEFINE(XF86DRI,1,[Enable DRI driver support])
149 - AC_DEFINE(XF86DRI_DEVEL,1,[Enable developmental DRI driver support])
150 - if test "$have_damage_h" = yes; then
151 - AC_DEFINE(DAMAGE,1,[Use Damage extension])
152 - fi
153 -
154 - save_CFLAGS="$CFLAGS"
155 - CFLAGS="$XORG_CFLAGS $DRI_CFLAGS $CFLAGS"
156 - if test "$DRM_MODE" = yes; then
157 - AC_CHECK_HEADER(xf86drmMode.h,[DRM_MODE=yes],[DRM_MODE=no],[#include <stdint.h>
158 -#include <stdlib.h>])
159 - if test "x$DRM_MODE" = xyes; then
160 - PKG_CHECK_MODULES(LIBDRM_RADEON, [xorg-server >= 1.6.2 libdrm_radeon],
161 - [LIBDRM_RADEON=yes], [LIBDRM_RADEON=no])
162 -
163 - if test "x$LIBDRM_RADEON" = xyes; then
164 - AC_DEFINE(XF86DRM_MODE,1,[DRM kernel modesetting])
165 - AC_DEFINE(RADEON_DRI2, 1,[Enable DRI2 code])
166 - else
167 - DRM_MODE=no
168 - fi
169 - fi
170 - fi
171 - CFLAGS="$save_CFLAGS"
172 + AC_CHECK_FILES([${sdkdir}/dri.h ${sdkdir}/sarea.h ${sdkdir}/dristruct.h],
173 + [DRI="yes"
174 + AC_DEFINE(HAVE_DRI,1,[Enable DRI driver support])],
175 + [DRI="no"])
176 else
177 DRM_MODE=no
178 fi
179 +AM_CONDITIONAL(DRI, test x$DRI = xyes)
180 +AC_MSG_CHECKING([whether to include DRI support])
181 +AC_MSG_RESULT([$DRI])
182 AM_CONDITIONAL(DRM_MODE, test x$DRM_MODE = xyes)
183
184 save_CFLAGS="$CFLAGS"
185 @@ -355,7 +307,6 @@
186 esac
187
188 AC_SUBST([XORG_CFLAGS])
189 -AC_SUBST([DRI_CFLAGS])
190 AC_SUBST([LIBDRM_RADEON_CFLAGS])
191 AC_SUBST([LIBDRM_RADEON_LIBS])
192 AC_SUBST([moduledir])
193 diff -Naur xf86-video-ati-6.13.0/man/Makefile.in xf86-video-ati-6.13.0-mcore/man/Makefile.in
194 --- xf86-video-ati-6.13.0/man/Makefile.in 2010-04-05 17:55:33.000000000 +0200
195 +++ xf86-video-ati-6.13.0-mcore/man/Makefile.in 2010-05-07 20:06:01.000000000 +0200
196 @@ -1,4 +1,4 @@
197 -# Makefile.in generated by automake 1.10.1 from Makefile.am.
198 +# Makefile.in generated by automake 1.10.2 from Makefile.am.
199 # @configure_input@
200
201 # Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
202 @@ -80,6 +80,7 @@
203 ADMIN_MAN_DIR = @ADMIN_MAN_DIR@
204 ADMIN_MAN_SUFFIX = @ADMIN_MAN_SUFFIX@
205 AMTAR = @AMTAR@
206 +AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@
207 APP_MAN_DIR = @APP_MAN_DIR@
208 APP_MAN_SUFFIX = @APP_MAN_SUFFIX@
209 AR = @AR@
210 @@ -100,8 +101,6 @@
211 DRIVER_MAN_DIR = @DRIVER_MAN_DIR@
212 DRIVER_MAN_SUFFIX = @DRIVER_MAN_SUFFIX@
213 DRIVER_NAME = @DRIVER_NAME@
214 -DRI_CFLAGS = @DRI_CFLAGS@
215 -DRI_LIBS = @DRI_LIBS@
216 DSYMUTIL = @DSYMUTIL@
217 DUMPBIN = @DUMPBIN@
218 ECHO_C = @ECHO_C@
219 @@ -138,6 +137,7 @@
220 MKDIR_P = @MKDIR_P@
221 NM = @NM@
222 NMEDIT = @NMEDIT@
223 +OBJDUMP = @OBJDUMP@
224 OBJEXT = @OBJEXT@
225 OTOOL = @OTOOL@
226 OTOOL64 = @OTOOL64@
227 @@ -212,6 +212,7 @@
228 srcdir = @srcdir@
229 sysconfdir = @sysconfdir@
230 target_alias = @target_alias@
231 +top_build_prefix = @top_build_prefix@
232 top_builddir = @top_builddir@
233 top_srcdir = @top_srcdir@
234 drivermandir = $(DRIVER_MAN_DIR)
235 @@ -244,8 +245,8 @@
236 @for dep in $?; do \
237 case '$(am__configure_deps)' in \
238 *$$dep*) \
239 - cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh \
240 - && exit 0; \
241 + ( cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh ) \
242 + && { if test -f $@; then exit 0; else break; fi; }; \
243 exit 1;; \
244 esac; \
245 done; \
246 diff -Naur xf86-video-ati-6.13.0/src/Makefile.am xf86-video-ati-6.13.0-mcore/src/Makefile.am
247 --- xf86-video-ati-6.13.0/src/Makefile.am 2010-01-05 01:32:29.000000000 +0100
248 +++ xf86-video-ati-6.13.0-mcore/src/Makefile.am 2010-05-07 20:07:36.000000000 +0200
249 @@ -76,7 +76,6 @@
250 AM_CFLAGS = \
251 @LIBDRM_RADEON_CFLAGS@ \
252 @XORG_CFLAGS@ \
253 - @DRI_CFLAGS@ \
254 @XMODES_CFLAGS@ \
255 -DDISABLE_EASF \
256 -DENABLE_ALL_SERVICE_FUNCTIONS \
257 diff -Naur xf86-video-ati-6.13.0/src/Makefile.in xf86-video-ati-6.13.0-mcore/src/Makefile.in
258 --- xf86-video-ati-6.13.0/src/Makefile.in 2010-04-05 17:55:33.000000000 +0200
259 +++ xf86-video-ati-6.13.0-mcore/src/Makefile.in 2010-05-07 20:07:54.000000000 +0200
260 @@ -1,4 +1,4 @@
261 -# Makefile.in generated by automake 1.10.1 from Makefile.am.
262 +# Makefile.in generated by automake 1.10.2 from Makefile.am.
263 # @configure_input@
264
265 # Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
266 @@ -101,10 +101,9 @@
267 ati_drv_la_LINK = $(LIBTOOL) --tag=CC $(AM_LIBTOOLFLAGS) \
268 $(LIBTOOLFLAGS) --mode=link $(CCLD) $(AM_CFLAGS) $(CFLAGS) \
269 $(ati_drv_la_LDFLAGS) $(LDFLAGS) -o $@
270 -@DRI_TRUE@am__DEPENDENCIES_2 = $(am__DEPENDENCIES_1)
271 -@XSERVER_LIBPCIACCESS_TRUE@am__DEPENDENCIES_3 = $(am__DEPENDENCIES_1)
272 +@XSERVER_LIBPCIACCESS_TRUE@am__DEPENDENCIES_2 = $(am__DEPENDENCIES_1)
273 radeon_drv_la_DEPENDENCIES = $(am__DEPENDENCIES_1) \
274 - $(am__DEPENDENCIES_2) $(am__DEPENDENCIES_3)
275 + $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_2)
276 am__radeon_drv_la_SOURCES_DIST = radeon_accel.c radeon_cursor.c \
277 radeon_legacy_memory.c radeon_driver.c radeon_video.c \
278 radeon_bios.c radeon_mm_i2c.c radeon_vip.c radeon_misc.c \
279 @@ -197,6 +196,7 @@
280 ADMIN_MAN_DIR = @ADMIN_MAN_DIR@
281 ADMIN_MAN_SUFFIX = @ADMIN_MAN_SUFFIX@
282 AMTAR = @AMTAR@
283 +AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@
284 APP_MAN_DIR = @APP_MAN_DIR@
285 APP_MAN_SUFFIX = @APP_MAN_SUFFIX@
286 AR = @AR@
287 @@ -217,8 +217,6 @@
288 DRIVER_MAN_DIR = @DRIVER_MAN_DIR@
289 DRIVER_MAN_SUFFIX = @DRIVER_MAN_SUFFIX@
290 DRIVER_NAME = @DRIVER_NAME@
291 -DRI_CFLAGS = @DRI_CFLAGS@
292 -DRI_LIBS = @DRI_LIBS@
293 DSYMUTIL = @DSYMUTIL@
294 DUMPBIN = @DUMPBIN@
295 ECHO_C = @ECHO_C@
296 @@ -255,6 +253,7 @@
297 MKDIR_P = @MKDIR_P@
298 NM = @NM@
299 NMEDIT = @NMEDIT@
300 +OBJDUMP = @OBJDUMP@
301 OBJEXT = @OBJEXT@
302 OTOOL = @OTOOL@
303 OTOOL64 = @OTOOL64@
304 @@ -329,6 +328,7 @@
305 srcdir = @srcdir@
306 sysconfdir = @sysconfdir@
307 target_alias = @target_alias@
308 +top_build_prefix = @top_build_prefix@
309 top_builddir = @top_builddir@
310 top_srcdir = @top_srcdir@
311 radeon_drv_la_LIBADD = $(LIBDRM_RADEON_LIBS) $(am__append_1) \
312 @@ -371,7 +371,6 @@
313 AM_CFLAGS = \
314 @LIBDRM_RADEON_CFLAGS@ \
315 @XORG_CFLAGS@ \
316 - @DRI_CFLAGS@ \
317 @XMODES_CFLAGS@ \
318 -DDISABLE_EASF \
319 -DENABLE_ALL_SERVICE_FUNCTIONS \
320 @@ -477,8 +476,8 @@
321 @for dep in $?; do \
322 case '$(am__configure_deps)' in \
323 *$$dep*) \
324 - cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh \
325 - && exit 0; \
326 + ( cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh ) \
327 + && { if test -f $@; then exit 0; else break; fi; }; \
328 exit 1;; \
329 esac; \
330 done; \
331 @@ -829,7 +828,7 @@
332 unique=`for i in $$list; do \
333 if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
334 done | \
335 - $(AWK) '{ files[$$0] = 1; nonemtpy = 1; } \
336 + $(AWK) '{ files[$$0] = 1; nonempty = 1; } \
337 END { if (nonempty) { for (i in files) print i; }; }'`; \
338 mkid -fID $$unique
339 tags: TAGS
340 diff -Naur xf86-video-ati-6.13.0/src/atombios_crtc.c xf86-video-ati-6.13.0-mcore/src/atombios_crtc.c
341 --- xf86-video-ati-6.13.0/src/atombios_crtc.c 2010-02-22 21:09:07.000000000 +0100
342 +++ xf86-video-ati-6.13.0-mcore/src/atombios_crtc.c 2010-05-07 19:49:03.000000000 +0200
343 @@ -46,8 +46,7 @@
344 #include "radeon_macros.h"
345 #include "radeon_atombios.h"
346
347 -#ifdef XF86DRI
348 -#define _XF86DRI_SERVER_
349 +#ifdef HAVE_DRI
350 #include "radeon_drm.h"
351 #include "sarea.h"
352 #endif
353 diff -Naur xf86-video-ati-6.13.0/src/drmmode_display.c xf86-video-ati-6.13.0-mcore/src/drmmode_display.c
354 --- xf86-video-ati-6.13.0/src/drmmode_display.c 2010-03-22 14:42:57.000000000 +0100
355 +++ xf86-video-ati-6.13.0-mcore/src/drmmode_display.c 2010-05-07 20:12:58.000000000 +0200
356 @@ -29,7 +29,7 @@
357 #include "config.h"
358 #endif
359
360 -#ifdef XF86DRM_MODE
361 +#ifdef HAVE_DRM_MODE
362 #include <sys/ioctl.h>
363 #include "micmap.h"
364 #include "xf86cmap.h"
365 diff -Naur xf86-video-ati-6.13.0/src/drmmode_display.h xf86-video-ati-6.13.0-mcore/src/drmmode_display.h
366 --- xf86-video-ati-6.13.0/src/drmmode_display.h 2010-03-22 14:42:57.000000000 +0100
367 +++ xf86-video-ati-6.13.0-mcore/src/drmmode_display.h 2010-05-07 20:13:29.000000000 +0200
368 @@ -27,7 +27,7 @@
369 #ifndef DRMMODE_DISPLAY_H
370 #define DRMMODE_DISPLAY_H
371
372 -#ifdef XF86DRM_MODE
373 +#ifdef HAVE_DRM_MODE
374
375 #include "xf86drmMode.h"
376
377 diff -Naur xf86-video-ati-6.13.0/src/legacy_crtc.c xf86-video-ati-6.13.0-mcore/src/legacy_crtc.c
378 --- xf86-video-ati-6.13.0/src/legacy_crtc.c 2010-02-22 21:00:16.000000000 +0100
379 +++ xf86-video-ati-6.13.0-mcore/src/legacy_crtc.c 2010-05-07 20:36:32.000000000 +0200
380 @@ -47,8 +47,7 @@
381 #include "radeon_version.h"
382 #include "radeon_atombios.h"
383
384 -#ifdef XF86DRI
385 -#define _XF86DRI_SERVER_
386 +#ifdef HAVE_DRI
387 #include "radeon_drm.h"
388 #include "sarea.h"
389 #ifdef DRM_IOCTL_MODESET_CTL
390 @@ -640,7 +639,7 @@
391 void
392 radeon_crtc_modeset_ioctl(xf86CrtcPtr crtc, Bool post)
393 {
394 -#if defined(XF86DRI) && defined(DRM_IOCTL_MODESET_CTL)
395 +#if defined(HAVE_DRI) && defined(DRM_IOCTL_MODESET_CTL)
396 RADEONInfoPtr info = RADEONPTR(crtc->scrn);
397 RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private;
398 struct drm_modeset_ctl modeset;
399 @@ -765,13 +764,13 @@
400 ScrnInfoPtr pScrn = crtc->scrn;
401 RADEONInfoPtr info = RADEONPTR(pScrn);
402 int Base;
403 -#ifdef XF86DRI
404 +#ifdef HAVE_DRI
405 drm_radeon_sarea_t *pSAREAPriv;
406 XF86DRISAREAPtr pSAREA;
407 #endif
408
409 save->crtc_offset = pScrn->fbOffset;
410 -#ifdef XF86DRI
411 +#ifdef HAVE_DRI
412 if (info->dri && info->dri->allowPageFlip)
413 save->crtc_offset_cntl = RADEON_CRTC_OFFSET_FLIP_CNTL;
414 else
415 @@ -815,7 +814,7 @@
416 /*save->crtc_offset_cntl = INREG(RADEON_CRTC_OFFSET_CNTL) & ~0xf;*/
417 #if 0
418 /* try to get rid of flickering when scrolling at least for 2d */
419 -#ifdef XF86DRI
420 +#ifdef HAVE_DRI
421 if (!info->have3DWindows)
422 #endif
423 save->crtc_offset_cntl &= ~RADEON_CRTC_OFFSET_FLIP_CNTL;
424 @@ -846,7 +845,7 @@
425 Base &= ~7; /* 3 lower bits are always 0 */
426
427
428 -#ifdef XF86DRI
429 +#ifdef HAVE_DRI
430 if (info->directRenderingInited) {
431 /* note cannot use pScrn->pScreen since this is unitialized when called from
432 RADEONScreenInit, and we need to call from there to get mergedfb + pageflip working */
433 @@ -985,7 +984,7 @@
434 ScrnInfoPtr pScrn = crtc->scrn;
435 RADEONInfoPtr info = RADEONPTR(pScrn);
436 int Base;
437 -#ifdef XF86DRI
438 +#ifdef HAVE_DRI
439 drm_radeon_sarea_t *pSAREAPriv;
440 XF86DRISAREAPtr pSAREA;
441 #endif
442 @@ -993,7 +992,7 @@
443 /* It seems all fancy options apart from pflip can be safely disabled
444 */
445 save->crtc2_offset = pScrn->fbOffset;
446 -#ifdef XF86DRI
447 +#ifdef HAVE_DRI
448 if (info->dri && info->dri->allowPageFlip)
449 save->crtc2_offset_cntl = RADEON_CRTC_OFFSET_FLIP_CNTL;
450 else
451 @@ -1037,7 +1036,7 @@
452 /*save->crtc2_offset_cntl = INREG(RADEON_CRTC2_OFFSET_CNTL) & ~0xf;*/
453 #if 0
454 /* try to get rid of flickering when scrolling at least for 2d */
455 -#ifdef XF86DRI
456 +#ifdef HAVE_DRI
457 if (!info->have3DWindows)
458 #endif
459 save->crtc2_offset_cntl &= ~RADEON_CRTC_OFFSET_FLIP_CNTL;
460 @@ -1067,7 +1066,7 @@
461
462 Base &= ~7; /* 3 lower bits are always 0 */
463
464 -#ifdef XF86DRI
465 +#ifdef HAVE_DRI
466 if (info->directRenderingInited) {
467 /* note cannot use pScrn->pScreen since this is unitialized when called from
468 RADEONScreenInit, and we need to call from there to get mergedfb + pageflip working */
469 @@ -1505,7 +1504,7 @@
470 /* DDR64 SCLK_EFF = SCLK for analysis */
471 sclk_eff = info->sclk;
472 } else {
473 -#ifdef XF86DRI
474 +#ifdef HAVE_DRI
475 if (info->directRenderingEnabled)
476 sclk_eff = info->sclk - (info->dri->agpMode * 50.0 / 3.0);
477 else
478 diff -Naur xf86-video-ati-6.13.0/src/r600_exa.c xf86-video-ati-6.13.0-mcore/src/r600_exa.c
479 --- xf86-video-ati-6.13.0/src/r600_exa.c 2010-04-01 04:37:46.000000000 +0200
480 +++ xf86-video-ati-6.13.0-mcore/src/r600_exa.c 2010-05-07 20:14:58.000000000 +0200
481 @@ -232,7 +232,7 @@
482
483 accel_state->vs_size = 512;
484 accel_state->ps_size = 512;
485 -#if defined(XF86DRM_MODE)
486 +#if defined(HAVE_DRM_MODE)
487 if (info->cs) {
488 accel_state->vs_mc_addr = vs_offset;
489 accel_state->ps_mc_addr = ps_offset;
490 @@ -265,7 +265,7 @@
491 return TRUE;
492 }
493
494 -#if defined(XF86DRM_MODE)
495 +#if defined(HAVE_DRM_MODE)
496 static inline void radeon_add_pixmap(struct radeon_cs *cs, PixmapPtr pPix, int read_domains, int write_domain)
497 {
498 struct radeon_exa_pixmap_priv *driver_priv = exaGetPixmapDriverPrivate(pPix);
499 @@ -299,7 +299,7 @@
500 if (!R600ValidPM(pm, pPix->drawable.bitsPerPixel))
501 RADEON_FALLBACK(("invalid planemask\n"));
502
503 -#if defined(XF86DRM_MODE)
504 +#if defined(HAVE_DRM_MODE)
505 if (info->cs) {
506 dst.offset = 0;
507 dst.bo = radeon_get_pixmap_bo(pPix);
508 @@ -725,7 +725,7 @@
509
510 accel_state->same_surface = FALSE;
511
512 -#if defined(XF86DRM_MODE)
513 +#if defined(HAVE_DRM_MODE)
514 if (info->cs) {
515 src_obj.offset = 0;
516 dst_obj.offset = 0;
517 @@ -765,7 +765,7 @@
518 if (accel_state->same_surface == TRUE) {
519 unsigned long size = pDst->drawable.height * accel_state->dst_obj.pitch * pDst->drawable.bitsPerPixel/8;
520
521 -#if defined(XF86DRM_MODE)
522 +#if defined(HAVE_DRM_MODE)
523 if (info->cs) {
524 if (accel_state->copy_area_bo) {
525 radeon_bo_unref(accel_state->copy_area_bo);
526 @@ -827,7 +827,7 @@
527 uint32_t orig_src_domain = accel_state->src_obj[0].domain;
528 struct radeon_bo *orig_bo = accel_state->dst_obj.bo;
529
530 -#if defined(XF86DRM_MODE)
531 +#if defined(HAVE_DRM_MODE)
532 if (info->cs) {
533 tmp_offset = 0;
534 orig_offset = 0;
535 @@ -1381,7 +1381,7 @@
536 if (pDst->drawable.bitsPerPixel < 8 || pSrc->drawable.bitsPerPixel < 8)
537 return FALSE;
538
539 -#if defined(XF86DRM_MODE)
540 +#if defined(HAVE_DRM_MODE)
541 if (info->cs) {
542 src_obj.offset = 0;
543 dst_obj.offset = 0;
544 @@ -1409,7 +1409,7 @@
545 dst_obj.domain = RADEON_GEM_DOMAIN_VRAM;
546
547 if (pMask) {
548 -#if defined(XF86DRM_MODE)
549 +#if defined(HAVE_DRM_MODE)
550 if (info->cs) {
551 mask_obj.offset = 0;
552 mask_obj.bo = radeon_get_pixmap_bo(pMask);
553 @@ -1912,7 +1912,7 @@
554
555 }
556
557 -#if defined(XF86DRM_MODE)
558 +#if defined(HAVE_DRM_MODE)
559
560 static Bool
561 R600UploadToScreenCS(PixmapPtr pDst, int x, int y, int w, int h,
562 @@ -2129,7 +2129,7 @@
563 struct radeon_accel_state *accel_state = info->accel_state;
564
565 if (accel_state->exaMarkerSynced != marker) {
566 -#ifdef XF86DRM_MODE
567 +#ifdef HAVE_DRM_MODE
568 #if (EXA_VERSION_MAJOR == 2 && EXA_VERSION_MINOR >= 4)
569 if (!info->cs)
570 #endif
571 @@ -2151,7 +2151,7 @@
572
573 accel_state->shaders = NULL;
574
575 -#ifdef XF86DRM_MODE
576 +#ifdef HAVE_DRM_MODE
577 #if (EXA_VERSION_MAJOR == 2 && EXA_VERSION_MINOR >= 4)
578 if (info->cs) {
579 accel_state->shaders_bo = radeon_bo_open(info->bufmgr, 0, size, 0,
580 @@ -2182,7 +2182,7 @@
581 struct radeon_accel_state *accel_state = info->accel_state;
582 RADEONChipFamily ChipSet = info->ChipFamily;
583 uint32_t *shader;
584 -#ifdef XF86DRM_MODE
585 +#ifdef HAVE_DRM_MODE
586 #if (EXA_VERSION_MAJOR == 2 && EXA_VERSION_MINOR >= 4)
587 int ret;
588
589 @@ -2234,7 +2234,7 @@
590 accel_state->xv_ps_offset = 4096;
591 R600_xv_ps(ChipSet, shader + accel_state->xv_ps_offset / 4);
592
593 -#ifdef XF86DRM_MODE
594 +#ifdef HAVE_DRM_MODE
595 #if (EXA_VERSION_MAJOR == 2 && EXA_VERSION_MINOR >= 4)
596 if (info->cs) {
597 radeon_bo_unmap(accel_state->shaders_bo);
598 @@ -2295,7 +2295,7 @@
599 info->accel_state->exa->MarkSync = R600MarkSync;
600 info->accel_state->exa->WaitMarker = R600Sync;
601
602 -#ifdef XF86DRM_MODE
603 +#ifdef HAVE_DRM_MODE
604 #if (EXA_VERSION_MAJOR == 2 && EXA_VERSION_MINOR >= 4)
605 if (info->cs) {
606 info->accel_state->exa->CreatePixmap = RADEONEXACreatePixmap;
607 @@ -2324,7 +2324,7 @@
608 info->accel_state->exa->flags |= EXA_SUPPORTS_PREPARE_AUX;
609 #endif
610
611 -#ifdef XF86DRM_MODE
612 +#ifdef HAVE_DRM_MODE
613 #ifdef EXA_HANDLES_PIXMAPS
614 if (info->cs) {
615 info->accel_state->exa->flags |= EXA_HANDLES_PIXMAPS;
616 @@ -2364,7 +2364,7 @@
617 return FALSE;
618 }
619
620 -#ifdef XF86DRM_MODE
621 +#ifdef HAVE_DRM_MODE
622 #if (EXA_VERSION_MAJOR == 2 && EXA_VERSION_MINOR >= 4)
623 if (!info->cs)
624 #endif
625 @@ -2381,7 +2381,7 @@
626 info->accel_state->vb_start_op = -1;
627 R600VlineHelperClear(pScrn);
628
629 -#ifdef XF86DRM_MODE
630 +#ifdef HAVE_DRM_MODE
631 radeon_vbo_init_lists(pScrn);
632 #endif
633
634 diff -Naur xf86-video-ati-6.13.0/src/r600_state.h xf86-video-ati-6.13.0-mcore/src/r600_state.h
635 --- xf86-video-ati-6.13.0/src/r600_state.h 2010-04-01 04:37:46.000000000 +0200
636 +++ xf86-video-ati-6.13.0-mcore/src/r600_state.h 2010-05-07 20:15:26.000000000 +0200
637 @@ -176,7 +176,7 @@
638 uint32_t num_indices;
639 } draw_config_t;
640
641 -#if defined(XF86DRM_MODE)
642 +#ifdef HAVE_DRM_MODE
643 #define BEGIN_BATCH(n) \
644 do { \
645 if (info->cs) \
646 diff -Naur xf86-video-ati-6.13.0/src/r600_textured_videofuncs.c xf86-video-ati-6.13.0-mcore/src/r600_textured_videofuncs.c
647 --- xf86-video-ati-6.13.0/src/r600_textured_videofuncs.c 2010-04-01 04:37:46.000000000 +0200
648 +++ xf86-video-ati-6.13.0-mcore/src/r600_textured_videofuncs.c 2010-05-07 20:15:57.000000000 +0200
649 @@ -163,7 +163,7 @@
650 CLEAR (vs_conf);
651 CLEAR (ps_conf);
652
653 -#if defined(XF86DRM_MODE)
654 +#if defined(HAVE_DRM_MODE)
655 if (info->cs) {
656 dst_obj.offset = 0;
657 src_obj.offset = 0;
658 diff -Naur xf86-video-ati-6.13.0/src/r6xx_accel.c xf86-video-ati-6.13.0-mcore/src/r6xx_accel.c
659 --- xf86-video-ati-6.13.0/src/r6xx_accel.c 2010-04-01 04:37:46.000000000 +0200
660 +++ xf86-video-ati-6.13.0-mcore/src/r6xx_accel.c 2010-05-07 20:16:29.000000000 +0200
661 @@ -52,7 +52,7 @@
662 int start = 0;
663 drm_radeon_indirect_t indirect;
664
665 -#if defined(XF86DRM_MODE)
666 +#if defined(HAVE_DRM_MODE)
667 if (info->cs) {
668 radeon_cs_flush_indirect(pScrn);
669 return;
670 @@ -84,7 +84,7 @@
671
672 void R600IBDiscard(ScrnInfoPtr pScrn, drmBufPtr ib)
673 {
674 -#if defined(XF86DRM_MODE)
675 +#if defined(HAVE_DRM_MODE)
676 int ret;
677 RADEONInfoPtr info = RADEONPTR(pScrn);
678 if (info->cs) {
679 @@ -353,7 +353,7 @@
680 if (start > crtc->mode.VDisplay)
681 return;
682
683 -#if defined(XF86DRM_MODE)
684 +#if defined(HAVE_DRM_MODE)
685 if (info->cs) {
686 drmmode_crtc_private_ptr drmmode_crtc = crtc->driver_private;
687
688 @@ -1209,7 +1209,7 @@
689 RADEONInfoPtr info = RADEONPTR(pScrn);
690 struct radeon_accel_state *accel_state = info->accel_state;
691
692 -#if defined(XF86DRM_MODE)
693 +#if defined(HAVE_DRM_MODE)
694 if (info->cs) {
695 if (CS_FULL(info->cs)) {
696 radeon_cs_flush_indirect(pScrn);
697 @@ -1301,7 +1301,7 @@
698
699 void r600_vb_no_space(ScrnInfoPtr pScrn, int vert_size)
700 {
701 -#ifdef XF86DRM_MODE
702 +#ifdef HAVE_DRM_MODE
703 RADEONInfoPtr info = RADEONPTR(pScrn);
704 struct radeon_accel_state *accel_state = info->accel_state;
705
706 diff -Naur xf86-video-ati-6.13.0/src/radeon.h xf86-video-ati-6.13.0-mcore/src/radeon.h
707 --- xf86-video-ati-6.13.0/src/radeon.h 2010-04-01 04:37:46.000000000 +0200
708 +++ xf86-video-ati-6.13.0-mcore/src/radeon.h 2010-05-07 20:42:33.000000000 +0200
709 @@ -49,6 +49,9 @@
710 /* PCI support */
711 #include "xf86Pci.h"
712
713 +#define RADEON_GEM_DOMAIN_GTT 0x2
714 +#define RADEON_GEM_DOMAIN_VRAM 0x4
715 +
716 #ifdef USE_EXA
717 #include "exa.h"
718 #endif
719 @@ -70,8 +73,7 @@
720 #include "radeon_tv.h"
721
722 /* DRI support */
723 -#ifdef XF86DRI
724 -#define _XF86DRI_SERVER_
725 +#ifdef HAVE_DRI
726 #include "dri.h"
727 #include "GL/glxint.h"
728 #include "xf86drm.h"
729 @@ -86,7 +88,7 @@
730 #include "xf86Crtc.h"
731 #include "X11/Xatom.h"
732
733 -#ifdef XF86DRM_MODE
734 +#ifdef HAVE_DRM_MODE
735 #include "radeon_bo.h"
736 #include "radeon_cs.h"
737 #include "radeon_dri2.h"
738 @@ -155,7 +157,7 @@
739 OPTION_SW_CURSOR,
740 OPTION_DAC_6BIT,
741 OPTION_DAC_8BIT,
742 -#ifdef XF86DRI
743 +#ifdef HAVE_DRI
744 OPTION_BUS_TYPE,
745 OPTION_CP_PIO,
746 OPTION_USEC_TIMEOUT,
747 @@ -516,7 +518,7 @@
748 struct radeon_bo *src_bo;
749 };
750
751 -#ifdef XF86DRI
752 +#ifdef HAVE_DRI
753 struct radeon_cp {
754 Bool CPRuns; /* CP is running */
755 Bool CPInUse; /* CP has been used by X server */
756 @@ -744,7 +746,7 @@
757 /* where to discard IB from if we cancel operation */
758 uint32_t ib_reset_op;
759 struct radeon_bo *vb_bo;
760 -#ifdef XF86DRM_MODE
761 +#ifdef HAVE_DRM_MODE
762 struct radeon_dma_bo bo_free;
763 struct radeon_dma_bo bo_wait;
764 struct radeon_dma_bo bo_reserved;
765 @@ -909,20 +911,22 @@
766
767 RADEONFBLayout CurrentLayout;
768
769 -#ifdef XF86DRI
770 +#ifdef HAVE_DRI
771 Bool directRenderingEnabled;
772 Bool directRenderingInited;
773 RADEONCardType cardType; /* Current card is a PCI card */
774 struct radeon_cp *cp;
775 struct radeon_dri *dri;
776 -#ifdef XF86DRM_MODE
777 +#ifdef HAVE_DRM_MODE
778 struct radeon_dri2 dri2;
779 #endif
780 #ifdef USE_EXA
781 Bool accelDFS;
782 #endif
783 Bool DMAForXv;
784 -#endif /* XF86DRI */
785 +#endif /* HAVE_DRI */
786 + RADEONCardType cardType; /* Current card is a PCI card */
787 + Bool DMAForXv;
788
789 /* accel */
790 Bool RenderAccel; /* Render */
791 @@ -1037,7 +1041,7 @@
792 struct radeon_2d_state state_2d;
793 Bool kms_enabled;
794 struct radeon_bo *front_bo;
795 -#ifdef XF86DRM_MODE
796 +#ifdef HAVE_DRM_MODE
797 struct radeon_bo_manager *bufmgr;
798 struct radeon_cs_manager *csm;
799 struct radeon_cs *cs;
800 @@ -1128,7 +1132,7 @@
801 uint32_t *dstPitchOffset, int *x, int *y);
802 extern void RADEONInit3DEngine(ScrnInfoPtr pScrn);
803 extern void RADEONWaitForFifoFunction(ScrnInfoPtr pScrn, int entries);
804 -#ifdef XF86DRI
805 +#ifdef HAVE_DRI
806 extern drmBufPtr RADEONCPGetBuffer(ScrnInfoPtr pScrn);
807 extern void RADEONCPFlushIndirect(ScrnInfoPtr pScrn, int discard);
808 extern void RADEONCPReleaseIndirect(ScrnInfoPtr pScrn);
809 @@ -1161,7 +1165,7 @@
810 extern Bool radeon_card_posted(ScrnInfoPtr pScrn);
811
812 /* radeon_commonfuncs.c */
813 -#ifdef XF86DRI
814 +#ifdef HAVE_DRI
815 extern void RADEONWaitForIdleCP(ScrnInfoPtr pScrn);
816 extern void RADEONWaitForVLineCP(ScrnInfoPtr pScrn, PixmapPtr pPix,
817 xf86CrtcPtr crtc, int start, int stop);
818 @@ -1197,7 +1201,7 @@
819 extern void radeon_crtc_set_cursor_position(xf86CrtcPtr crtc, int x, int y);
820 extern void radeon_crtc_show_cursor(xf86CrtcPtr crtc);
821
822 -#ifdef XF86DRI
823 +#ifdef HAVE_DRI
824 /* radeon_dri.c */
825 extern void RADEONDRIAllocatePCIGARTTable(ScreenPtr pScreen);
826 extern void RADEONDRICloseScreen(ScreenPtr pScreen);
827 @@ -1278,7 +1282,7 @@
828 extern Bool R600LoadShaders(ScrnInfoPtr pScrn);
829 #endif
830
831 -#if defined(XF86DRI) && defined(USE_EXA)
832 +#if defined(HAVE_DRI) && defined(USE_EXA)
833 /* radeon_exa.c */
834 extern Bool RADEONGetDatatypeBpp(int bpp, uint32_t *type);
835 extern Bool RADEONGetPixmapOffsetPitch(PixmapPtr pPix,
836 @@ -1336,7 +1340,7 @@
837 radeon_legacy_free_memory(ScrnInfoPtr pScrn,
838 void *mem_struct);
839
840 -#ifdef XF86DRM_MODE
841 +#ifdef HAVE_DRM_MODE
842 extern void radeon_cs_flush_indirect(ScrnInfoPtr pScrn);
843 extern void radeon_ddx_cs_start(ScrnInfoPtr pScrn,
844 int num, const char *file,
845 @@ -1346,7 +1350,7 @@
846 struct radeon_bo *radeon_get_pixmap_bo(PixmapPtr pPix);
847 void radeon_set_pixmap_bo(PixmapPtr pPix, struct radeon_bo *bo);
848
849 -#ifdef XF86DRI
850 +#ifdef HAVE_DRI
851 # ifdef USE_XAA
852 /* radeon_accelfuncs.c */
853 extern void RADEONAccelInitCP(ScreenPtr pScreen, XAAInfoRecPtr a);
854 @@ -1582,11 +1586,11 @@
855 } \
856 } while (0)
857
858 -#endif /* XF86DRI */
859 +#endif /* HAVE_DRI */
860
861 -#if defined(XF86DRI) && defined(USE_EXA)
862 +#if defined(HAVE_DRI) && defined(USE_EXA)
863
864 -#ifdef XF86DRM_MODE
865 +#ifdef HAVE_DRM_MODE
866 #define CS_FULL(cs) ((cs)->cdw > 15 * 1024)
867 #else
868 #define CS_FULL(cs) FALSE
869 diff -Naur xf86-video-ati-6.13.0/src/radeon_accel.c xf86-video-ati-6.13.0-mcore/src/radeon_accel.c
870 --- xf86-video-ati-6.13.0/src/radeon_accel.c 2010-03-09 15:36:22.000000000 +0100
871 +++ xf86-video-ati-6.13.0-mcore/src/radeon_accel.c 2010-05-07 20:26:06.000000000 +0200
872 @@ -82,8 +82,7 @@
873 #include "radeon_macros.h"
874 #include "radeon_probe.h"
875 #include "radeon_version.h"
876 -#ifdef XF86DRI
877 -#define _XF86DRI_SERVER_
878 +#ifdef HAVE_DRI
879 #include "radeon_drm.h"
880 #endif
881
882 @@ -144,7 +143,7 @@
883 "FIFO timed out, resetting engine...\n");
884 RADEONEngineReset(pScrn);
885 RADEONEngineRestore(pScrn);
886 -#ifdef XF86DRI
887 +#ifdef HAVE_DRI
888 if (info->directRenderingEnabled) {
889 RADEONCP_RESET(pScrn, info);
890 RADEONCP_START(pScrn, info);
891 @@ -175,7 +174,7 @@
892 xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
893 "FIFO timed out, resetting engine...\n");
894 R600EngineReset(pScrn);
895 -#ifdef XF86DRI
896 +#ifdef HAVE_DRI
897 if (info->directRenderingEnabled) {
898 RADEONCP_RESET(pScrn, info);
899 RADEONCP_START(pScrn, info);
900 @@ -424,6 +423,7 @@
901 info->accel_state->XInited3D = FALSE;
902 }
903
904 +#ifdef HAVE_DRI
905 static int RADEONDRMGetNumPipes(ScrnInfoPtr pScrn, int *num_pipes)
906 {
907 RADEONInfoPtr info = RADEONPTR(pScrn);
908 @@ -441,6 +441,7 @@
909 return drmCommandWriteRead(info->dri->drmFD, DRM_RADEON_INFO, &np2, sizeof(np2));
910 }
911 }
912 +#endif
913
914 /* Initialize the acceleration hardware */
915 void RADEONEngineInit(ScrnInfoPtr pScrn)
916 @@ -455,7 +456,7 @@
917 info->CurrentLayout.pixel_code,
918 info->CurrentLayout.bitsPerPixel);
919
920 -#ifdef XF86DRI
921 +#ifdef HAVE_DRI
922 if (info->directRenderingEnabled && (IS_R300_3D || IS_R500_3D)) {
923 int num_pipes;
924
925 @@ -591,7 +592,7 @@
926 #undef OUT_ACCEL_REG
927 #undef FINISH_ACCEL
928
929 -#ifdef XF86DRI
930 +#ifdef HAVE_DRI
931
932 #define ACCEL_CP
933 #define ACCEL_PREAMBLE() \
934 @@ -1060,7 +1061,7 @@
935
936 #ifdef USE_EXA
937 if (info->useEXA) {
938 -# ifdef XF86DRI
939 +#ifdef HAVE_DRI
940 if (info->directRenderingEnabled) {
941 if (info->ChipFamily >= CHIP_FAMILY_R600) {
942 if (!R600DrawInit(pScreen))
943 @@ -1070,7 +1071,7 @@
944 return FALSE;
945 }
946 } else
947 -# endif /* XF86DRI */
948 +# endif /* HAVE_DRI */
949 {
950 if (info->ChipFamily >= CHIP_FAMILY_R600)
951 return FALSE;
952 @@ -1093,11 +1094,11 @@
953 return FALSE;
954 }
955
956 -#ifdef XF86DRI
957 +#ifdef HAVE_DRI
958 if (info->directRenderingEnabled)
959 RADEONAccelInitCP(pScreen, a);
960 else
961 -#endif /* XF86DRI */
962 +#endif /* HAVE_DRI */
963 RADEONAccelInitMMIO(pScreen, a);
964
965 RADEONEngineInit(pScrn);
966 @@ -1115,7 +1116,7 @@
967 {
968 RADEONInfoPtr info = RADEONPTR (pScrn);
969
970 -#ifdef XF86DRI
971 +#ifdef HAVE_DRI
972 if (info->directRenderingEnabled) {
973 drm_radeon_sarea_t *pSAREAPriv;
974
975 @@ -1132,7 +1133,7 @@
976 }
977
978 #ifdef USE_XAA
979 -#ifdef XF86DRI
980 +#ifdef HAVE_DRI
981 Bool
982 RADEONSetupMemXAA_DRI(int scrnIndex, ScreenPtr pScreen)
983 {
984 @@ -1154,7 +1155,7 @@
985 info->dri->backPitch = pScrn->displayWidth;
986
987 /* make sure we use 16 line alignment for tiling (8 might be enough).
988 - * Might need that for non-XF86DRI too?
989 + * Might need that for non-HAVE_DRI too?
990 */
991 if (info->allowColorTiling) {
992 bufferSize = RADEON_ALIGN((RADEON_ALIGN(pScrn->virtualY, 16)) * width_bytes,
993 @@ -1389,7 +1390,7 @@
994 ((info->dri->depthOffset + info->fbLocation) >> 10));
995 return TRUE;
996 }
997 -#endif /* XF86DRI */
998 +#endif /* HAVE_DRI */
999
1000 Bool
1001 RADEONSetupMemXAA(int scrnIndex, ScreenPtr pScreen)
1002 diff -Naur xf86-video-ati-6.13.0/src/radeon_commonfuncs.c xf86-video-ati-6.13.0-mcore/src/radeon_commonfuncs.c
1003 --- xf86-video-ati-6.13.0/src/radeon_commonfuncs.c 2009-11-27 22:24:55.000000000 +0100
1004 +++ xf86-video-ati-6.13.0-mcore/src/radeon_commonfuncs.c 2010-05-07 20:17:26.000000000 +0200
1005 @@ -864,7 +864,7 @@
1006 if (start > crtc->mode.VDisplay)
1007 return;
1008
1009 -#if defined(ACCEL_CP) && defined(XF86DRM_MODE)
1010 +#if defined(ACCEL_CP) && defined(HAVE_DRM_MODE)
1011 if (info->cs) {
1012 drmmode_crtc_private_ptr drmmode_crtc = crtc->driver_private;
1013
1014 @@ -994,7 +994,7 @@
1015 xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
1016 "Idle timed out, resetting engine...\n");
1017 R600EngineReset(pScrn);
1018 -#ifdef XF86DRI
1019 +#ifdef HAVE_DRI
1020 if (info->directRenderingEnabled) {
1021 RADEONCP_RESET(pScrn, info);
1022 RADEONCP_START(pScrn, info);
1023 @@ -1020,7 +1020,7 @@
1024 "Idle timed out, resetting engine...\n");
1025 RADEONEngineReset(pScrn);
1026 RADEONEngineRestore(pScrn);
1027 -#ifdef XF86DRI
1028 +#ifdef HAVE_DRI
1029 if (info->directRenderingEnabled) {
1030 RADEONCP_RESET(pScrn, info);
1031 RADEONCP_START(pScrn, info);
1032 diff -Naur xf86-video-ati-6.13.0/src/radeon_crtc.c xf86-video-ati-6.13.0-mcore/src/radeon_crtc.c
1033 --- xf86-video-ati-6.13.0/src/radeon_crtc.c 2010-03-09 15:36:22.000000000 +0100
1034 +++ xf86-video-ati-6.13.0-mcore/src/radeon_crtc.c 2010-05-07 20:44:10.000000000 +0200
1035 @@ -46,8 +46,7 @@
1036 #include "radeon_probe.h"
1037 #include "radeon_version.h"
1038
1039 -#ifdef XF86DRI
1040 -#define _XF86DRI_SERVER_
1041 +#ifdef HAVE_DRI
1042 #include "radeon_drm.h"
1043 #include "sarea.h"
1044 #endif
1045 @@ -604,7 +603,7 @@
1046 ScrnInfoPtr pScrn = crtc->scrn;
1047 RADEONInfoPtr info = RADEONPTR(pScrn);
1048
1049 -#ifdef XF86DRI
1050 +#ifdef HAVE_DRI
1051 if (info->cp->CPStarted && pScrn->pScreen) {
1052 DRILock(pScrn->pScreen, 0);
1053 if (info->accelOn)
1054 @@ -625,7 +624,7 @@
1055 ScrnInfoPtr pScrn = crtc->scrn;
1056 RADEONInfoPtr info = RADEONPTR(pScrn);
1057
1058 -#ifdef XF86DRI
1059 +#ifdef HAVE_DRI
1060 if (info->cp->CPStarted && pScrn->pScreen) DRIUnlock(pScrn->pScreen);
1061 #endif
1062
1063 @@ -649,6 +648,7 @@
1064 int size;
1065 int cpp = pScrn->bitsPerPixel / 8;
1066
1067 +#ifdef HAVE_DRI
1068 /* No rotation without accel */
1069 if (((info->ChipFamily >= CHIP_FAMILY_R600) && !info->directRenderingEnabled) ||
1070 xf86ReturnOptValBool(info->Options, OPTION_NOACCEL, FALSE)) {
1071 @@ -656,6 +656,7 @@
1072 "Acceleration required for rotation\n");
1073 return NULL;
1074 }
1075 +#endif
1076
1077 rotate_pitch = pScrn->displayWidth * cpp;
1078 size = rotate_pitch * height;
1079 @@ -1124,7 +1125,7 @@
1080 if (info->tilingEnabled != can_tile)
1081 changed = TRUE;
1082
1083 -#ifdef XF86DRI
1084 +#ifdef HAVE_DRI
1085 if (info->directRenderingEnabled && (info->tilingEnabled != can_tile)) {
1086 drm_radeon_sarea_t *pSAREAPriv;
1087 if (RADEONDRISetParam(pScrn, RADEON_SETPARAM_SWITCH_TILING, (can_tile ? 1 : 0)) < 0)
1088 diff -Naur xf86-video-ati-6.13.0/src/radeon_driver.c xf86-video-ati-6.13.0-mcore/src/radeon_driver.c
1089 --- xf86-video-ati-6.13.0/src/radeon_driver.c 2010-03-15 17:27:28.000000000 +0100
1090 +++ xf86-video-ati-6.13.0-mcore/src/radeon_driver.c 2010-05-07 20:34:41.000000000 +0200
1091 @@ -76,8 +76,7 @@
1092 #include "radeon_version.h"
1093 #include "radeon_atombios.h"
1094
1095 -#ifdef XF86DRI
1096 -#define _XF86DRI_SERVER_
1097 +#ifdef HAVE_DRI
1098 #include "radeon_dri.h"
1099 #include "radeon_drm.h"
1100 #include "sarea.h"
1101 @@ -130,7 +129,7 @@
1102 static void
1103 RADEONSaveBIOSRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save);
1104
1105 -#ifdef XF86DRI
1106 +#ifdef HAVE_DRI
1107 static void RADEONAdjustMemMapRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save);
1108 #endif
1109
1110 @@ -139,7 +138,7 @@
1111 { OPTION_SW_CURSOR, "SWcursor", OPTV_BOOLEAN, {0}, FALSE },
1112 { OPTION_DAC_6BIT, "Dac6Bit", OPTV_BOOLEAN, {0}, FALSE },
1113 { OPTION_DAC_8BIT, "Dac8Bit", OPTV_BOOLEAN, {0}, TRUE },
1114 -#ifdef XF86DRI
1115 +#ifdef HAVE_DRI
1116 { OPTION_BUS_TYPE, "BusType", OPTV_ANYSTR, {0}, FALSE },
1117 { OPTION_CP_PIO, "CPPIOMode", OPTV_BOOLEAN, {0}, FALSE },
1118 { OPTION_USEC_TIMEOUT, "CPusecTimeout", OPTV_INTEGER, {0}, FALSE },
1119 @@ -368,6 +367,7 @@
1120
1121 info = RADEONPTR(pScrn);
1122
1123 +#ifdef HAVE_DRI
1124 if (info->cp) {
1125 xfree(info->cp);
1126 info->cp = NULL;
1127 @@ -377,6 +377,7 @@
1128 xfree(info->dri);
1129 info->dri = NULL;
1130 }
1131 +#endif
1132
1133 if (info->accel_state) {
1134 xfree(info->accel_state);
1135 @@ -1436,7 +1437,7 @@
1136 if (mem_size > 0x20000000)
1137 mem_size = aper_size;
1138
1139 -#ifdef XF86DRI
1140 +#ifdef HAVE_DRI
1141 /* Apply memory map limitation if using an old DRI */
1142 if (info->directRenderingEnabled && !info->dri->newMemoryMap) {
1143 if (aper_size < mem_size)
1144 @@ -1452,7 +1453,7 @@
1145 if (info->IsIGP)
1146 info->mc_fb_location = INREG(RADEON_NB_TOM);
1147 else
1148 -#ifdef XF86DRI
1149 +#ifdef HAVE_DRI
1150 /* Old DRI has restrictions on the memory map */
1151 if ( info->directRenderingEnabled &&
1152 info->dri->pKernelDRMVersion->version_minor < 10 )
1153 @@ -1636,7 +1637,7 @@
1154 else
1155 aper_size = INREG(RADEON_CONFIG_APER_SIZE) / 1024;
1156
1157 -#ifdef XF86DRI
1158 +#ifdef HAVE_DRI
1159 /* If we use the DRI, we need to check if it's a version that has the
1160 * bug of always cropping MC_FB_LOCATION to one aperture, in which case
1161 * we need to limit the amount of accessible video memory
1162 @@ -1654,7 +1655,7 @@
1163 return aper_size;
1164 }
1165 info->dri->newMemoryMap = TRUE;
1166 -#endif /* XF86DRI */
1167 +#endif /* HAVE_DRI */
1168
1169 if (info->ChipFamily >= CHIP_FAMILY_R600)
1170 return aper_size;
1171 @@ -1786,7 +1787,7 @@
1172 info->FbMapSize = pScrn->videoRam * 1024;
1173
1174 /* if the card is PCI Express reserve the last 32k for the gart table */
1175 -#ifdef XF86DRI
1176 +#ifdef HAVE_DRI
1177 if (info->cardType == CARD_PCIE && info->directRenderingEnabled)
1178 /* work out the size of pcie aperture */
1179 info->FbSecureSize = RADEONDRIGetPciAperTableSize(pScrn);
1180 @@ -1812,7 +1813,7 @@
1181 unsigned char *RADEONMMIO = info->MMIO;
1182 MessageType from = X_PROBED;
1183 int i;
1184 -#ifdef XF86DRI
1185 +#ifdef HAVE_DRI
1186 const char *s;
1187 uint32_t cmd_stat;
1188 #endif
1189 @@ -1961,7 +1962,7 @@
1190 info->ChipFamily == CHIP_FAMILY_RS200)
1191 info->ChipErrata |= CHIP_ERRATA_PLL_DELAY;
1192
1193 -#ifdef XF86DRI
1194 +#ifdef HAVE_DRI
1195 /* AGP/PCI */
1196 /* Proper autodetection of an AGP capable device requires examining
1197 * PCI config registers to determine if the device implements extended
1198 @@ -2167,7 +2168,7 @@
1199 return TRUE;
1200 }
1201
1202 -#ifdef XF86DRI
1203 +#ifdef HAVE_DRI
1204 if ((!info->directRenderingEnabled) ||
1205 (maxy <= pScrn->virtualY * 3) ||
1206 (pScrn->videoRam <= 32768))
1207 @@ -2303,7 +2304,7 @@
1208 return TRUE;
1209 }
1210
1211 -#ifdef XF86DRI
1212 +#ifdef HAVE_DRI
1213 static Bool RADEONPreInitDRI(ScrnInfoPtr pScrn)
1214 {
1215 RADEONInfoPtr info = RADEONPTR(pScrn);
1216 @@ -2541,7 +2542,7 @@
1217
1218 return TRUE;
1219 }
1220 -#endif /* XF86DRI */
1221 +#endif /* HAVE_DRI */
1222
1223 static void RADEONPreInitColorTiling(ScrnInfoPtr pScrn)
1224 {
1225 @@ -2568,7 +2569,7 @@
1226 if (info->IsPrimary || info->IsSecondary)
1227 info->allowColorTiling = FALSE;
1228
1229 -#ifdef XF86DRI
1230 +#ifdef HAVE_DRI
1231 if (info->directRenderingEnabled &&
1232 info->dri->pKernelDRMVersion->version_minor < 14) {
1233 xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
1234 @@ -2582,7 +2583,7 @@
1235 info->allowColorTiling = FALSE;
1236 return;
1237 }
1238 -#endif /* XF86DRI */
1239 +#endif /* HAVE_DRI */
1240
1241 if (info->allowColorTiling) {
1242 xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Color tiling enabled by default\n");
1243 @@ -3127,12 +3128,11 @@
1244 /* Save BIOS scratch registers */
1245 RADEONSaveBIOSRegisters(pScrn, info->SavedReg);
1246
1247 -#ifdef XF86DRI
1248 +#ifdef HAVE_DRI
1249 /* PreInit DRI first of all since we need that for getting a proper
1250 * memory map
1251 */
1252 info->directRenderingEnabled = RADEONPreInitDRI(pScrn);
1253 -#endif
1254 if (!info->directRenderingEnabled) {
1255 if (info->ChipFamily >= CHIP_FAMILY_R600) {
1256 info->r600_shadow_fb = TRUE;
1257 @@ -3142,6 +3142,7 @@
1258 info->r600_shadow_fb = FALSE;
1259 }
1260 }
1261 +#endif
1262
1263 if (!RADEONPreInitVRAM(pScrn))
1264 goto fail;
1265 @@ -3262,7 +3263,7 @@
1266 uint16_t lut_r[256], lut_g[256], lut_b[256];
1267 int c;
1268
1269 -#ifdef XF86DRI
1270 +#ifdef HAVE_DRI
1271 if (info->cp->CPStarted && pScrn->pScreen) DRILock(pScrn->pScreen, 0);
1272 #endif
1273
1274 @@ -3326,7 +3327,7 @@
1275 }
1276 }
1277
1278 -#ifdef XF86DRI
1279 +#ifdef HAVE_DRI
1280 if (info->cp->CPStarted && pScrn->pScreen) DRIUnlock(pScrn->pScreen);
1281 #endif
1282 }
1283 @@ -3422,12 +3423,12 @@
1284 #ifdef USE_XAA
1285 info->accel_state->accel = NULL;
1286 #endif
1287 -#ifdef XF86DRI
1288 +#ifdef HAVE_DRI
1289 pScrn->fbOffset = info->dri->frontOffset;
1290 #endif
1291
1292 if (info->IsSecondary) pScrn->fbOffset = pScrn->videoRam * 1024;
1293 -#ifdef XF86DRI
1294 +#ifdef HAVE_DRI
1295 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
1296 "RADEONScreenInit %lx %ld %d\n",
1297 pScrn->memPhysBase, pScrn->fbOffset, info->dri->frontOffset);
1298 @@ -3438,7 +3439,7 @@
1299 #endif
1300 if (!RADEONMapMem(pScrn)) return FALSE;
1301
1302 -#ifdef XF86DRI
1303 +#ifdef HAVE_DRI
1304 info->dri->fbX = 0;
1305 info->dri->fbY = 0;
1306 #endif
1307 @@ -3482,7 +3483,7 @@
1308 pScrn->defaultVisual)) return FALSE;
1309 miSetPixmapDepths ();
1310
1311 -#ifdef XF86DRI
1312 +#ifdef HAVE_DRI
1313 if (info->directRenderingEnabled) {
1314 MessageType from;
1315
1316 @@ -3505,7 +3506,7 @@
1317
1318
1319 hasDRI = info->directRenderingEnabled;
1320 -#endif /* XF86DRI */
1321 +#endif /* HAVE_DRI */
1322
1323 /* Initialize the memory map, this basically calculates the values
1324 * we'll use later on for MC_FB_LOCATION & MC_AGP_LOCATION
1325 @@ -3523,7 +3524,7 @@
1326 }
1327 }
1328
1329 -#ifdef XF86DRI
1330 +#ifdef HAVE_DRI
1331 /* Depth moves are disabled by default since they are extremely slow */
1332 info->dri->depthMoves = xf86ReturnOptValBool(info->Options,
1333 OPTION_DEPTH_MOVE, FALSE);
1334 @@ -3553,7 +3554,7 @@
1335
1336 #ifdef USE_EXA
1337 if (info->useEXA) {
1338 -#ifdef XF86DRI
1339 +#ifdef HAVE_DRI
1340 if (hasDRI) {
1341 info->accelDFS = xf86ReturnOptValBool(info->Options, OPTION_ACCEL_DFS,
1342 info->cardType != CARD_AGP);
1343 @@ -3574,14 +3575,14 @@
1344 }
1345 }
1346 }
1347 -#endif /* XF86DRI */
1348 +#endif /* HAVE_DRI */
1349
1350 if (!RADEONSetupMemEXA(pScreen))
1351 return FALSE;
1352 }
1353 #endif
1354
1355 -#if defined(XF86DRI) && defined(USE_XAA)
1356 +#if defined(HAVE_DRI) && defined(USE_XAA)
1357 if (!info->useEXA && hasDRI) {
1358 info->dri->textureSize = -1;
1359 if (xf86GetOptValInteger(info->Options, OPTION_FBTEX_PERCENT,
1360 @@ -3611,7 +3612,7 @@
1361 /* Setup DRI after visuals have been established, but before fbScreenInit is
1362 * called. fbScreenInit will eventually call the driver's InitGLXVisuals
1363 * call back. */
1364 -#ifdef XF86DRI
1365 +#ifdef HAVE_DRI
1366 if (info->directRenderingEnabled) {
1367 /* FIXME: When we move to dynamic allocation of back and depth
1368 * buffers, we will want to revisit the following check for 3
1369 @@ -3719,7 +3720,7 @@
1370 xf86SetBackingStore(pScreen);
1371
1372 /* DRI finalisation */
1373 -#ifdef XF86DRI
1374 +#ifdef HAVE_DRI
1375 if (info->directRenderingEnabled && info->cardType==CARD_PCIE &&
1376 info->dri->pKernelDRMVersion->version_minor >= 19)
1377 {
1378 @@ -4169,7 +4170,7 @@
1379 }
1380 }
1381
1382 -#ifdef XF86DRI
1383 +#ifdef HAVE_DRI
1384 static void RADEONAdjustMemMapRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save)
1385 {
1386 RADEONInfoPtr info = RADEONPTR(pScrn);
1387 @@ -4300,7 +4301,7 @@
1388 } else {
1389 color_pattern = R200_SURF_TILE_COLOR_MACRO;
1390 }
1391 -#ifdef XF86DRI
1392 +#ifdef HAVE_DRI
1393 if (info->directRenderingInited) {
1394 drm_radeon_surface_free_t drmsurffree;
1395 drm_radeon_surface_alloc_t drmsurfalloc;
1396 @@ -5490,7 +5491,7 @@
1397 RADEONInfoPtr info = RADEONPTR(pScrn);
1398 Bool tilingOld = info->tilingEnabled;
1399 Bool ret;
1400 -#ifdef XF86DRI
1401 +#ifdef HAVE_DRI
1402 Bool CPStarted = info->cp->CPStarted;
1403
1404 if (CPStarted) {
1405 @@ -5504,7 +5505,7 @@
1406
1407 if (info->allowColorTiling) {
1408 info->tilingEnabled = (mode->Flags & (V_DBLSCAN | V_INTERLACE)) ? FALSE : TRUE;
1409 -#ifdef XF86DRI
1410 +#ifdef HAVE_DRI
1411 if (info->directRenderingEnabled && (info->tilingEnabled != tilingOld)) {
1412 drm_radeon_sarea_t *pSAREAPriv;
1413 if (RADEONDRISetParam(pScrn, RADEON_SETPARAM_SWITCH_TILING, (info->tilingEnabled ? 1 : 0)) < 0)
1414 @@ -5535,7 +5536,7 @@
1415 RADEONEngineRestore(pScrn);
1416 }
1417
1418 -#ifdef XF86DRI
1419 +#ifdef HAVE_DRI
1420 if (CPStarted) {
1421 RADEONCP_START(pScrn, info);
1422 DRIUnlock(pScrn->pScreen);
1423 @@ -5616,7 +5617,7 @@
1424 RADEONInfoPtr info = RADEONPTR(pScrn);
1425 unsigned char *RADEONMMIO = info->MMIO;
1426 int Base, reg, regcntl, crtcoffsetcntl, xytilereg, crtcxytile = 0;
1427 -#ifdef XF86DRI
1428 +#ifdef HAVE_DRI
1429 drm_radeon_sarea_t *pSAREAPriv;
1430 XF86DRISAREAPtr pSAREA;
1431 #endif
1432 @@ -5655,7 +5656,7 @@
1433 crtcoffsetcntl = INREG(regcntl) & ~0xf;
1434 #if 0
1435 /* try to get rid of flickering when scrolling at least for 2d */
1436 -#ifdef XF86DRI
1437 +#ifdef HAVE_DRI
1438 if (!info->dri->have3DWindows)
1439 #endif
1440 crtcoffsetcntl &= ~RADEON_CRTC_OFFSET_FLIP_CNTL;
1441 @@ -5689,7 +5690,7 @@
1442
1443 Base &= ~7; /* 3 lower bits are always 0 */
1444
1445 -#ifdef XF86DRI
1446 +#ifdef HAVE_DRI
1447 if (info->directRenderingInited) {
1448 /* note cannot use pScrn->pScreen since this is unitialized when called from
1449 RADEONScreenInit, and we need to call from there to get mergedfb + pageflip working */
1450 @@ -5740,7 +5741,7 @@
1451 if (IS_AVIVO_VARIANT)
1452 return;
1453
1454 -#ifdef XF86DRI
1455 +#ifdef HAVE_DRI
1456 if (info->cp->CPStarted && pScrn->pScreen) DRILock(pScrn->pScreen, 0);
1457 #endif
1458
1459 @@ -5757,7 +5758,7 @@
1460 }
1461
1462
1463 -#ifdef XF86DRI
1464 +#ifdef HAVE_DRI
1465 if (info->cp->CPStarted && pScrn->pScreen) DRIUnlock(pScrn->pScreen);
1466 #endif
1467 }
1468 @@ -5812,7 +5813,7 @@
1469
1470 if (info->ChipFamily < CHIP_FAMILY_R600)
1471 RADEONRestoreSurfaces(pScrn, info->ModeReg);
1472 -#ifdef XF86DRI
1473 +#ifdef HAVE_DRI
1474 if (info->directRenderingEnabled) {
1475 if (info->cardType == CARD_PCIE &&
1476 info->dri->pKernelDRMVersion->version_minor >= 19 &&
1477 @@ -5848,7 +5849,7 @@
1478 if (info->accelOn && info->accel_state)
1479 info->accel_state->XInited3D = FALSE;
1480
1481 -#ifdef XF86DRI
1482 +#ifdef HAVE_DRI
1483 if (info->directRenderingEnabled) {
1484 if (info->ChipFamily >= CHIP_FAMILY_R600)
1485 R600LoadShaders(pScrn);
1486 @@ -5874,7 +5875,7 @@
1487
1488 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
1489 "RADEONLeaveVT\n");
1490 -#ifdef XF86DRI
1491 +#ifdef HAVE_DRI
1492 if (RADEONPTR(pScrn)->directRenderingInited) {
1493
1494 RADEONDRISetVBlankInterrupt (pScrn, FALSE);
1495 @@ -5976,7 +5977,7 @@
1496 radeon_crtc->initialized = FALSE;
1497 }
1498
1499 -#ifdef XF86DRI
1500 +#ifdef HAVE_DRI
1501 #ifdef DAMAGE
1502 if (info->dri && info->dri->pDamage) {
1503 PixmapPtr pPix = pScreen->GetScreenPixmap(pScreen);
1504 diff -Naur xf86-video-ati-6.13.0/src/radeon_exa.c xf86-video-ati-6.13.0-mcore/src/radeon_exa.c
1505 --- xf86-video-ati-6.13.0/src/radeon_exa.c 2010-03-11 20:14:28.000000000 +0100
1506 +++ xf86-video-ati-6.13.0-mcore/src/radeon_exa.c 2010-05-07 20:17:50.000000000 +0200
1507 @@ -36,7 +36,7 @@
1508 #include "radeon.h"
1509 #include "radeon_reg.h"
1510 #include "r600_reg.h"
1511 -#ifdef XF86DRI
1512 +#ifdef HAVE_DRI
1513 #include "radeon_drm.h"
1514 #endif
1515 #include "radeon_macros.h"
1516 @@ -121,7 +121,7 @@
1517 }
1518
1519
1520 -#ifdef XF86DRM_MODE
1521 +#ifdef HAVE_DRM_MODE
1522
1523 static inline void radeon_add_pixmap(struct radeon_cs *cs, PixmapPtr pPix, int read_domains, int write_domain)
1524 {
1525 @@ -130,7 +130,7 @@
1526 radeon_cs_space_add_persistent_bo(cs, driver_priv->bo, read_domains, write_domain);
1527 }
1528
1529 -#endif /* XF86DRM_MODE */
1530 +#endif /* HAVE_DRM_MODE */
1531
1532
1533 /* Assumes that depth 15 and 16 can be used as depth 16, which is okay since we
1534 @@ -245,7 +245,7 @@
1535 default:
1536 flags = 0;
1537 }
1538 -#if defined(XF86DRI)
1539 +#if defined(HAVE_DRI)
1540 if (info->directRenderingEnabled && info->allowColorTiling) {
1541 struct drm_radeon_surface_alloc drmsurfalloc;
1542 int rc;
1543 @@ -288,7 +288,7 @@
1544
1545 if (swapper_surfaces[index] == 0)
1546 return;
1547 -#if defined(XF86DRI)
1548 +#if defined(HAVE_DRI)
1549 if (info->directRenderingEnabled && info->allowColorTiling) {
1550 struct drm_radeon_surface_free drmsurffree;
1551
1552 @@ -308,7 +308,7 @@
1553
1554 #endif /* X_BYTE_ORDER == X_BIG_ENDIAN */
1555
1556 -#ifdef XF86DRM_MODE
1557 +#ifdef HAVE_DRM_MODE
1558 Bool RADEONPrepareAccess_CS(PixmapPtr pPix, int index)
1559 {
1560 ScreenPtr pScreen = pPix->drawable.pScreen;
1561 @@ -525,7 +525,7 @@
1562 #undef FINISH_ACCEL
1563 #undef OUT_RELOC
1564
1565 -#ifdef XF86DRI
1566 +#ifdef HAVE_DRI
1567
1568 #define ACCEL_CP
1569 #define ACCEL_PREAMBLE() \
1570 @@ -550,7 +550,7 @@
1571 #undef FINISH_ACCEL
1572 #undef OUT_RING_F
1573
1574 -#endif /* XF86DRI */
1575 +#endif /* HAVE_DRI */
1576
1577 /*
1578 * Once screen->off_screen_base is set, this function
1579 @@ -610,7 +610,7 @@
1580 }
1581 }
1582
1583 -#if defined(XF86DRI)
1584 +#if defined(HAVE_DRI)
1585 if (info->directRenderingEnabled) {
1586 int depthCpp = (info->dri->depthBits - 8) / 4, l, next, depth_size;
1587
1588 @@ -679,7 +679,7 @@
1589 info->dri->textureSize = 0;
1590 }
1591 } else
1592 -#endif /* XF86DRI */
1593 +#endif /* HAVE_DRI */
1594 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
1595 "Will use %d kb for front buffer at offset 0x%08x\n",
1596 screen_size / 1024, 0);
1597 @@ -692,7 +692,7 @@
1598 return TRUE;
1599 }
1600
1601 -#ifdef XF86DRI
1602 +#ifdef HAVE_DRI
1603
1604 #ifndef ExaOffscreenMarkUsed
1605 extern void ExaOffscreenMarkUsed(PixmapPtr);
1606 diff -Naur xf86-video-ati-6.13.0/src/radeon_exa_funcs.c xf86-video-ati-6.13.0-mcore/src/radeon_exa_funcs.c
1607 --- xf86-video-ati-6.13.0/src/radeon_exa_funcs.c 2010-03-09 15:36:22.000000000 +0100
1608 +++ xf86-video-ati-6.13.0-mcore/src/radeon_exa_funcs.c 2010-05-07 20:18:36.000000000 +0200
1609 @@ -164,7 +164,7 @@
1610
1611 RADEON_SWITCH_TO_2D();
1612
1613 -#ifdef XF86DRM_MODE
1614 +#ifdef HAVE_DRM_MODE
1615 if (info->cs) {
1616 struct radeon_exa_pixmap_priv *driver_priv;
1617 int ret;
1618 @@ -218,7 +218,7 @@
1619
1620 TRACE;
1621
1622 -#if defined(ACCEL_CP) && defined(XF86DRM_MODE)
1623 +#if defined(ACCEL_CP) && defined(HAVE_DRM_MODE)
1624 if (info->cs && CS_FULL(info->cs)) {
1625 FUNC_NAME(RADEONDone2D)(info->accel_state->dst_pix);
1626 radeon_cs_flush_indirect(pScrn);
1627 @@ -288,7 +288,7 @@
1628
1629 RADEON_SWITCH_TO_2D();
1630
1631 -#ifdef XF86DRM_MODE
1632 +#ifdef HAVE_DRM_MODE
1633 if (info->cs) {
1634 struct radeon_exa_pixmap_priv *driver_priv;
1635 int ret;
1636 @@ -330,7 +330,7 @@
1637
1638 TRACE;
1639
1640 -#if defined(ACCEL_CP) && defined(XF86DRM_MODE)
1641 +#if defined(ACCEL_CP) && defined(HAVE_DRM_MODE)
1642 if (info->cs && CS_FULL(info->cs)) {
1643 FUNC_NAME(RADEONDone2D)(info->accel_state->dst_pix);
1644 radeon_cs_flush_indirect(pScrn);
1645 @@ -451,7 +451,7 @@
1646 FINISH_ACCEL();
1647 }
1648
1649 -#if defined(XF86DRM_MODE)
1650 +#if defined(HAVE_DRM_MODE)
1651 static Bool
1652 RADEONUploadToScreenCS(PixmapPtr pDst, int x, int y, int w, int h,
1653 char *src, int src_pitch)
1654 @@ -799,7 +799,7 @@
1655 if (info->accelDFS)
1656 info->accel_state->exa->DownloadFromScreen = RADEONDownloadFromScreenCP;
1657 }
1658 -# if defined(XF86DRM_MODE)
1659 +# if defined(HAVE_DRM_MODE)
1660 else {
1661 info->accel_state->exa->UploadToScreen = &RADEONUploadToScreenCS;
1662 info->accel_state->exa->DownloadFromScreen = &RADEONDownloadFromScreenCS;
1663 @@ -836,7 +836,7 @@
1664 if (info->RenderAccel) {
1665 if (IS_R300_3D || IS_R500_3D) {
1666 if ((info->ChipFamily < CHIP_FAMILY_RS400)
1667 -#ifdef XF86DRI
1668 +#ifdef HAVE_DRI
1669 || (info->directRenderingEnabled)
1670 #endif
1671 ) {
1672 @@ -869,7 +869,7 @@
1673 }
1674 #endif
1675
1676 -#ifdef XF86DRM_MODE
1677 +#ifdef HAVE_DRM_MODE
1678 #if (EXA_VERSION_MAJOR == 2 && EXA_VERSION_MINOR >= 4)
1679 if (info->cs) {
1680 info->accel_state->exa->CreatePixmap = RADEONEXACreatePixmap;
1681 diff -Naur xf86-video-ati-6.13.0/src/radeon_exa_render.c xf86-video-ati-6.13.0-mcore/src/radeon_exa_render.c
1682 --- xf86-video-ati-6.13.0/src/radeon_exa_render.c 2010-03-11 20:14:28.000000000 +0100
1683 +++ xf86-video-ati-6.13.0-mcore/src/radeon_exa_render.c 2010-05-07 20:19:00.000000000 +0200
1684 @@ -579,7 +579,7 @@
1685 info->accel_state->msk_pix = pMask;
1686 info->accel_state->src_pix = pSrc;
1687
1688 -#ifdef XF86DRM_MODE
1689 +#ifdef HAVE_DRM_MODE
1690 if (info->cs) {
1691 int ret;
1692
1693 @@ -2264,7 +2264,7 @@
1694 if (!info->accel_state->draw_header) {
1695 BEGIN_RING(3);
1696
1697 -#ifdef XF86DRM_MODE
1698 +#ifdef HAVE_DRM_MODE
1699 if (info->cs)
1700 info->accel_state->draw_header = info->cs->packets + info->cs->cdw;
1701 else
1702 @@ -2296,7 +2296,7 @@
1703 if (!info->accel_state->draw_header) {
1704 BEGIN_RING(2);
1705
1706 -#ifdef XF86DRM_MODE
1707 +#ifdef HAVE_DRM_MODE
1708 if (info->cs)
1709 info->accel_state->draw_header = info->cs->packets + info->cs->cdw;
1710 else
1711 @@ -2319,7 +2319,7 @@
1712 if (!info->accel_state->draw_header) {
1713 BEGIN_RING(2);
1714
1715 -#ifdef XF86DRM_MODE
1716 +#ifdef HAVE_DRM_MODE
1717 if (info->cs)
1718 info->accel_state->draw_header = info->cs->packets + info->cs->cdw;
1719 else
1720 diff -Naur xf86-video-ati-6.13.0/src/radeon_kms.c xf86-video-ati-6.13.0-mcore/src/radeon_kms.c
1721 --- xf86-video-ati-6.13.0/src/radeon_kms.c 2010-03-22 14:42:57.000000000 +0100
1722 +++ xf86-video-ati-6.13.0-mcore/src/radeon_kms.c 2010-05-07 20:19:13.000000000 +0200
1723 @@ -41,7 +41,7 @@
1724 #include "atipciids.h"
1725
1726
1727 -#ifdef XF86DRM_MODE
1728 +#ifdef HAVE_DRM_MODE
1729
1730 #include "radeon_chipset_gen.h"
1731 #include "radeon_chipinfo_gen.h"
1732 diff -Naur xf86-video-ati-6.13.0/src/radeon_legacy_memory.c xf86-video-ati-6.13.0-mcore/src/radeon_legacy_memory.c
1733 --- xf86-video-ati-6.13.0/src/radeon_legacy_memory.c 2010-03-09 15:36:22.000000000 +0100
1734 +++ xf86-video-ati-6.13.0-mcore/src/radeon_legacy_memory.c 2010-05-07 20:19:28.000000000 +0200
1735 @@ -22,7 +22,7 @@
1736 RADEONInfoPtr info = RADEONPTR(pScrn);
1737 uint32_t offset = 0;
1738
1739 -#ifdef XF86DRM_MODE
1740 +#ifdef HAVE_DRM_MODE
1741 if (info->cs) {
1742 struct radeon_bo *video_bo;
1743
1744 @@ -110,7 +110,7 @@
1745 {
1746 RADEONInfoPtr info = RADEONPTR(pScrn);
1747
1748 -#ifdef XF86DRM_MODE
1749 +#ifdef HAVE_DRM_MODE
1750 if (info->cs) {
1751 struct radeon_bo *bo = mem_struct;
1752 radeon_bo_unref(bo);
1753 diff -Naur xf86-video-ati-6.13.0/src/radeon_probe.c xf86-video-ati-6.13.0-mcore/src/radeon_probe.c
1754 --- xf86-video-ati-6.13.0/src/radeon_probe.c 2010-02-26 03:02:51.000000000 +0100
1755 +++ xf86-video-ati-6.13.0-mcore/src/radeon_probe.c 2010-05-07 20:19:50.000000000 +0200
1756 @@ -49,7 +49,7 @@
1757 #include "xf86Resources.h"
1758 #endif
1759
1760 -#ifdef XF86DRM_MODE
1761 +#ifdef HAVE_DRM_MODE
1762 #include "xf86drmMode.h"
1763 #include "dri.h"
1764 #endif
1765 @@ -86,7 +86,7 @@
1766 }
1767
1768
1769 -#ifdef XF86DRM_MODE
1770 +#ifdef HAVE_DRM_MODE
1771 static Bool radeon_kernel_mode_enabled(ScrnInfoPtr pScrn, struct pci_device *pci_dev)
1772 {
1773 char *busIdString;
1774 @@ -143,7 +143,7 @@
1775 pScrn->Probe = RADEONProbe;
1776 #endif
1777
1778 -#ifdef XF86DRM_MODE
1779 +#ifdef HAVE_DRM_MODE
1780 if (kms == 1) {
1781 pScrn->PreInit = RADEONPreInit_KMS;
1782 pScrn->ScreenInit = RADEONScreenInit_KMS;
1783 diff -Naur xf86-video-ati-6.13.0/src/radeon_probe.h xf86-video-ati-6.13.0-mcore/src/radeon_probe.h
1784 --- xf86-video-ati-6.13.0/src/radeon_probe.h 2010-02-01 18:07:26.000000000 +0100
1785 +++ xf86-video-ati-6.13.0-mcore/src/radeon_probe.h 2010-05-07 20:20:02.000000000 +0200
1786 @@ -660,7 +660,7 @@
1787
1788 extern const OptionInfoRec *RADEONOptionsWeak(void);
1789
1790 -#ifdef XF86DRM_MODE
1791 +#ifdef HAVE_DRM_MODE
1792 extern Bool RADEONPreInit_KMS(ScrnInfoPtr, int);
1793 extern Bool RADEONScreenInit_KMS(int, ScreenPtr, int, char **);
1794 extern Bool RADEONSwitchMode_KMS(int, DisplayModePtr, int);
1795 diff -Naur xf86-video-ati-6.13.0/src/radeon_textured_video.c xf86-video-ati-6.13.0-mcore/src/radeon_textured_video.c
1796 --- xf86-video-ati-6.13.0/src/radeon_textured_video.c 2010-03-09 15:36:22.000000000 +0100
1797 +++ xf86-video-ati-6.13.0-mcore/src/radeon_textured_video.c 2010-05-07 20:20:17.000000000 +0200
1798 @@ -155,7 +155,7 @@
1799 #undef OUT_RELOC
1800 #undef FINISH_ACCEL
1801
1802 -#ifdef XF86DRI
1803 +#ifdef HAVE_DRI
1804
1805 #define ACCEL_CP
1806 #define ACCEL_PREAMBLE() \
1807 @@ -178,7 +178,7 @@
1808 #undef FINISH_ACCEL
1809 #undef OUT_RING_F
1810
1811 -#endif /* XF86DRI */
1812 +#endif /* HAVE_DRI */
1813
1814 static void
1815 R600CopyData(
1816 @@ -467,11 +467,11 @@
1817 pPriv->w = width;
1818 pPriv->h = height;
1819
1820 -#if defined(XF86DRM_MODE)
1821 +#if defined(HAVE_DRM_MODE)
1822 if (info->cs)
1823 radeon_bo_unmap(pPriv->src_bo[pPriv->currentBuffer]);
1824 #endif
1825 -#ifdef XF86DRI
1826 +#ifdef HAVE_DRI
1827 if (info->directRenderingEnabled) {
1828 if (IS_R600_3D)
1829 R600DisplayTexturedVideo(pScrn, pPriv);
1830 diff -Naur xf86-video-ati-6.13.0/src/radeon_textured_videofuncs.c xf86-video-ati-6.13.0-mcore/src/radeon_textured_videofuncs.c
1831 --- xf86-video-ati-6.13.0/src/radeon_textured_videofuncs.c 2010-03-09 15:36:22.000000000 +0100
1832 +++ xf86-video-ati-6.13.0-mcore/src/radeon_textured_videofuncs.c 2010-05-07 20:20:39.000000000 +0200
1833 @@ -103,7 +103,7 @@
1834 int nBox = REGION_NUM_RECTS(&pPriv->clip);
1835 ACCEL_PREAMBLE();
1836
1837 -#ifdef XF86DRM_MODE
1838 +#ifdef HAVE_DRM_MODE
1839 if (info->cs) {
1840 int ret;
1841
1842 @@ -499,7 +499,7 @@
1843 Bool needux8 = FALSE, needvx8 = FALSE;
1844 ACCEL_PREAMBLE();
1845
1846 -#ifdef XF86DRM_MODE
1847 +#ifdef HAVE_DRM_MODE
1848 if (info->cs) {
1849 int ret;
1850
1851 @@ -1048,7 +1048,7 @@
1852 int nBox = REGION_NUM_RECTS(&pPriv->clip);
1853 ACCEL_PREAMBLE();
1854
1855 -#ifdef XF86DRM_MODE
1856 +#ifdef HAVE_DRM_MODE
1857 if (info->cs) {
1858 int ret;
1859
1860 @@ -2506,7 +2506,7 @@
1861 int nBox = REGION_NUM_RECTS(&pPriv->clip);
1862 ACCEL_PREAMBLE();
1863
1864 -#ifdef XF86DRM_MODE
1865 +#ifdef HAVE_DRM_MODE
1866 if (info->cs) {
1867 int ret;
1868
1869 diff -Naur xf86-video-ati-6.13.0/src/radeon_vbo.c xf86-video-ati-6.13.0-mcore/src/radeon_vbo.c
1870 --- xf86-video-ati-6.13.0/src/radeon_vbo.c 2009-12-01 21:59:23.000000000 +0100
1871 +++ xf86-video-ati-6.13.0-mcore/src/radeon_vbo.c 2010-05-07 20:20:54.000000000 +0200
1872 @@ -37,7 +37,7 @@
1873
1874 /* KMS vertex buffer support - for R600 only but could be used on previous gpus */
1875
1876 -#ifdef XF86DRM_MODE
1877 +#ifdef HAVE_DRM_MODE
1878
1879 static struct radeon_bo *radeon_vbo_get_bo(ScrnInfoPtr pScrn);
1880
1881 diff -Naur xf86-video-ati-6.13.0/src/radeon_vbo.h xf86-video-ati-6.13.0-mcore/src/radeon_vbo.h
1882 --- xf86-video-ati-6.13.0/src/radeon_vbo.h 2009-12-01 21:59:23.000000000 +0100
1883 +++ xf86-video-ati-6.13.0-mcore/src/radeon_vbo.h 2010-05-07 20:21:08.000000000 +0200
1884 @@ -32,7 +32,7 @@
1885 r600_vb_no_space(pScrn, vert_size);
1886 }
1887 accel_state->vb_op_vert_size = vert_size;
1888 -#if defined(XF86DRM_MODE)
1889 +#if defined(HAVE_DRM_MODE)
1890 if (info->cs) {
1891 int ret;
1892 struct radeon_bo *bo = accel_state->vb_bo;
1893 diff -Naur xf86-video-ati-6.13.0/src/radeon_video.c xf86-video-ati-6.13.0-mcore/src/radeon_video.c
1894 --- xf86-video-ati-6.13.0/src/radeon_video.c 2010-03-09 15:36:22.000000000 +0100
1895 +++ xf86-video-ati-6.13.0-mcore/src/radeon_video.c 2010-05-07 20:00:47.000000000 +0200
1896 @@ -295,7 +295,7 @@
1897 }
1898
1899 if ((info->ChipFamily < CHIP_FAMILY_RS400)
1900 -#ifdef XF86DRI
1901 +#ifdef HAVE_DRI
1902 || (info->directRenderingEnabled)
1903 #endif
1904 ) {
1905 @@ -2174,7 +2174,7 @@
1906 bpp = 1;
1907 }
1908
1909 -#ifdef XF86DRI
1910 +#ifdef HAVE_DRI
1911
1912 if ( info->directRenderingEnabled && info->DMAForXv )
1913 {
1914 @@ -2198,7 +2198,7 @@
1915 return;
1916 }
1917 else
1918 -#endif /* XF86DRI */
1919 +#endif /* HAVE_DRI */
1920 {
1921 int swap = RADEON_HOST_DATA_SWAP_NONE;
1922
1923 @@ -2248,7 +2248,7 @@
1924 uint8_t *sptr;
1925 int i,j;
1926 RADEONInfoPtr info = RADEONPTR(pScrn);
1927 -#ifdef XF86DRI
1928 +#ifdef HAVE_DRI
1929
1930 if ( info->directRenderingEnabled && info->DMAForXv )
1931 {
1932 @@ -2281,7 +2281,7 @@
1933 return;
1934 }
1935 else
1936 -#endif /* XF86DRI */
1937 +#endif /* HAVE_DRI */
1938 {
1939 #if X_BYTE_ORDER == X_BIG_ENDIAN
1940 unsigned char *RADEONMMIO = info->MMIO;
1941 @@ -2310,7 +2310,7 @@
1942 }
1943
1944
1945 -#ifdef XF86DRI
1946 +#ifdef HAVE_DRI
1947 static void RADEON_420_422(
1948 unsigned int *d,
1949 unsigned char *s1,
1950 @@ -2341,7 +2341,7 @@
1951 unsigned int w
1952 ){
1953 RADEONInfoPtr info = RADEONPTR(pScrn);
1954 -#ifdef XF86DRI
1955 +#ifdef HAVE_DRI
1956
1957 if ( info->directRenderingEnabled && info->DMAForXv )
1958 {
1959 @@ -2375,7 +2375,7 @@
1960 FLUSH_RING();
1961 }
1962 else
1963 -#endif /* XF86DRI */
1964 +#endif /* HAVE_DRI */
1965 {
1966 uint32_t *dst;
1967 uint8_t *s1, *s2, *s3;
1968 @@ -2934,7 +2934,7 @@
1969 break;
1970 }
1971
1972 -#ifdef XF86DRI
1973 +#ifdef HAVE_DRI
1974 if (info->directRenderingEnabled && info->DMAForXv) {
1975 /* The upload blit only supports multiples of 64 bytes */
1976 dstPitch = RADEON_ALIGN(dstPitch, 64);