Annotation of /trunk/kernel-alx/patches-3.4/0109-3.4.10-all-fixes.patch
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Revision 1945 -
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Wed Nov 14 15:23:43 2012 UTC (11 years, 10 months ago) by niro
File size: 64569 byte(s)
Wed Nov 14 15:23:43 2012 UTC (11 years, 10 months ago) by niro
File size: 64569 byte(s)
3.4.18-alx-r1
1 | niro | 1945 | diff --git a/arch/s390/kernel/compat_linux.c b/arch/s390/kernel/compat_linux.c |
2 | index ab64bdb..36e6c30 100644 | ||
3 | --- a/arch/s390/kernel/compat_linux.c | ||
4 | +++ b/arch/s390/kernel/compat_linux.c | ||
5 | @@ -612,7 +612,6 @@ asmlinkage unsigned long old32_mmap(struct mmap_arg_struct_emu31 __user *arg) | ||
6 | return -EFAULT; | ||
7 | if (a.offset & ~PAGE_MASK) | ||
8 | return -EINVAL; | ||
9 | - a.addr = (unsigned long) compat_ptr(a.addr); | ||
10 | return sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd, | ||
11 | a.offset >> PAGE_SHIFT); | ||
12 | } | ||
13 | @@ -623,7 +622,6 @@ asmlinkage long sys32_mmap2(struct mmap_arg_struct_emu31 __user *arg) | ||
14 | |||
15 | if (copy_from_user(&a, arg, sizeof(a))) | ||
16 | return -EFAULT; | ||
17 | - a.addr = (unsigned long) compat_ptr(a.addr); | ||
18 | return sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd, a.offset); | ||
19 | } | ||
20 | |||
21 | diff --git a/arch/s390/kernel/compat_wrapper.S b/arch/s390/kernel/compat_wrapper.S | ||
22 | index ff605a3..cfe3efd 100644 | ||
23 | --- a/arch/s390/kernel/compat_wrapper.S | ||
24 | +++ b/arch/s390/kernel/compat_wrapper.S | ||
25 | @@ -1636,7 +1636,7 @@ ENTRY(compat_sys_process_vm_readv_wrapper) | ||
26 | llgfr %r6,%r6 # unsigned long | ||
27 | llgf %r0,164(%r15) # unsigned long | ||
28 | stg %r0,160(%r15) | ||
29 | - jg sys_process_vm_readv | ||
30 | + jg compat_sys_process_vm_readv | ||
31 | |||
32 | ENTRY(compat_sys_process_vm_writev_wrapper) | ||
33 | lgfr %r2,%r2 # compat_pid_t | ||
34 | @@ -1646,4 +1646,4 @@ ENTRY(compat_sys_process_vm_writev_wrapper) | ||
35 | llgfr %r6,%r6 # unsigned long | ||
36 | llgf %r0,164(%r15) # unsigned long | ||
37 | stg %r0,160(%r15) | ||
38 | - jg sys_process_vm_writev | ||
39 | + jg compat_sys_process_vm_writev | ||
40 | diff --git a/arch/x86/xen/p2m.c b/arch/x86/xen/p2m.c | ||
41 | index 1b267e7..00a0385 100644 | ||
42 | --- a/arch/x86/xen/p2m.c | ||
43 | +++ b/arch/x86/xen/p2m.c | ||
44 | @@ -686,6 +686,7 @@ int m2p_add_override(unsigned long mfn, struct page *page, | ||
45 | unsigned long uninitialized_var(address); | ||
46 | unsigned level; | ||
47 | pte_t *ptep = NULL; | ||
48 | + int ret = 0; | ||
49 | |||
50 | pfn = page_to_pfn(page); | ||
51 | if (!PageHighMem(page)) { | ||
52 | @@ -721,6 +722,24 @@ int m2p_add_override(unsigned long mfn, struct page *page, | ||
53 | list_add(&page->lru, &m2p_overrides[mfn_hash(mfn)]); | ||
54 | spin_unlock_irqrestore(&m2p_override_lock, flags); | ||
55 | |||
56 | + /* p2m(m2p(mfn)) == mfn: the mfn is already present somewhere in | ||
57 | + * this domain. Set the FOREIGN_FRAME_BIT in the p2m for the other | ||
58 | + * pfn so that the following mfn_to_pfn(mfn) calls will return the | ||
59 | + * pfn from the m2p_override (the backend pfn) instead. | ||
60 | + * We need to do this because the pages shared by the frontend | ||
61 | + * (xen-blkfront) can be already locked (lock_page, called by | ||
62 | + * do_read_cache_page); when the userspace backend tries to use them | ||
63 | + * with direct_IO, mfn_to_pfn returns the pfn of the frontend, so | ||
64 | + * do_blockdev_direct_IO is going to try to lock the same pages | ||
65 | + * again resulting in a deadlock. | ||
66 | + * As a side effect get_user_pages_fast might not be safe on the | ||
67 | + * frontend pages while they are being shared with the backend, | ||
68 | + * because mfn_to_pfn (that ends up being called by GUPF) will | ||
69 | + * return the backend pfn rather than the frontend pfn. */ | ||
70 | + ret = __get_user(pfn, &machine_to_phys_mapping[mfn]); | ||
71 | + if (ret == 0 && get_phys_to_machine(pfn) == mfn) | ||
72 | + set_phys_to_machine(pfn, FOREIGN_FRAME(mfn)); | ||
73 | + | ||
74 | return 0; | ||
75 | } | ||
76 | EXPORT_SYMBOL_GPL(m2p_add_override); | ||
77 | @@ -732,6 +751,7 @@ int m2p_remove_override(struct page *page, bool clear_pte) | ||
78 | unsigned long uninitialized_var(address); | ||
79 | unsigned level; | ||
80 | pte_t *ptep = NULL; | ||
81 | + int ret = 0; | ||
82 | |||
83 | pfn = page_to_pfn(page); | ||
84 | mfn = get_phys_to_machine(pfn); | ||
85 | @@ -801,6 +821,22 @@ int m2p_remove_override(struct page *page, bool clear_pte) | ||
86 | } else | ||
87 | set_phys_to_machine(pfn, page->index); | ||
88 | |||
89 | + /* p2m(m2p(mfn)) == FOREIGN_FRAME(mfn): the mfn is already present | ||
90 | + * somewhere in this domain, even before being added to the | ||
91 | + * m2p_override (see comment above in m2p_add_override). | ||
92 | + * If there are no other entries in the m2p_override corresponding | ||
93 | + * to this mfn, then remove the FOREIGN_FRAME_BIT from the p2m for | ||
94 | + * the original pfn (the one shared by the frontend): the backend | ||
95 | + * cannot do any IO on this page anymore because it has been | ||
96 | + * unshared. Removing the FOREIGN_FRAME_BIT from the p2m entry of | ||
97 | + * the original pfn causes mfn_to_pfn(mfn) to return the frontend | ||
98 | + * pfn again. */ | ||
99 | + mfn &= ~FOREIGN_FRAME_BIT; | ||
100 | + ret = __get_user(pfn, &machine_to_phys_mapping[mfn]); | ||
101 | + if (ret == 0 && get_phys_to_machine(pfn) == FOREIGN_FRAME(mfn) && | ||
102 | + m2p_find_override(mfn) == NULL) | ||
103 | + set_phys_to_machine(pfn, mfn); | ||
104 | + | ||
105 | return 0; | ||
106 | } | ||
107 | EXPORT_SYMBOL_GPL(m2p_remove_override); | ||
108 | diff --git a/drivers/dma/imx-dma.c b/drivers/dma/imx-dma.c | ||
109 | index bb787d8..2ca8d3f 100644 | ||
110 | --- a/drivers/dma/imx-dma.c | ||
111 | +++ b/drivers/dma/imx-dma.c | ||
112 | @@ -172,7 +172,8 @@ struct imxdma_engine { | ||
113 | struct device_dma_parameters dma_parms; | ||
114 | struct dma_device dma_device; | ||
115 | void __iomem *base; | ||
116 | - struct clk *dma_clk; | ||
117 | + struct clk *dma_ahb; | ||
118 | + struct clk *dma_ipg; | ||
119 | spinlock_t lock; | ||
120 | struct imx_dma_2d_config slots_2d[IMX_DMA_2D_SLOTS]; | ||
121 | struct imxdma_channel channel[IMX_DMA_CHANNELS]; | ||
122 | @@ -976,10 +977,20 @@ static int __init imxdma_probe(struct platform_device *pdev) | ||
123 | return 0; | ||
124 | } | ||
125 | |||
126 | - imxdma->dma_clk = clk_get(NULL, "dma"); | ||
127 | - if (IS_ERR(imxdma->dma_clk)) | ||
128 | - return PTR_ERR(imxdma->dma_clk); | ||
129 | - clk_enable(imxdma->dma_clk); | ||
130 | + imxdma->dma_ipg = devm_clk_get(&pdev->dev, "ipg"); | ||
131 | + if (IS_ERR(imxdma->dma_ipg)) { | ||
132 | + ret = PTR_ERR(imxdma->dma_ipg); | ||
133 | + goto err_clk; | ||
134 | + } | ||
135 | + | ||
136 | + imxdma->dma_ahb = devm_clk_get(&pdev->dev, "ahb"); | ||
137 | + if (IS_ERR(imxdma->dma_ahb)) { | ||
138 | + ret = PTR_ERR(imxdma->dma_ahb); | ||
139 | + goto err_clk; | ||
140 | + } | ||
141 | + | ||
142 | + clk_prepare_enable(imxdma->dma_ipg); | ||
143 | + clk_prepare_enable(imxdma->dma_ahb); | ||
144 | |||
145 | /* reset DMA module */ | ||
146 | imx_dmav1_writel(imxdma, DCR_DRST, DMA_DCR); | ||
147 | @@ -988,16 +999,14 @@ static int __init imxdma_probe(struct platform_device *pdev) | ||
148 | ret = request_irq(MX1_DMA_INT, dma_irq_handler, 0, "DMA", imxdma); | ||
149 | if (ret) { | ||
150 | dev_warn(imxdma->dev, "Can't register IRQ for DMA\n"); | ||
151 | - kfree(imxdma); | ||
152 | - return ret; | ||
153 | + goto err_enable; | ||
154 | } | ||
155 | |||
156 | ret = request_irq(MX1_DMA_ERR, imxdma_err_handler, 0, "DMA", imxdma); | ||
157 | if (ret) { | ||
158 | dev_warn(imxdma->dev, "Can't register ERRIRQ for DMA\n"); | ||
159 | free_irq(MX1_DMA_INT, NULL); | ||
160 | - kfree(imxdma); | ||
161 | - return ret; | ||
162 | + goto err_enable; | ||
163 | } | ||
164 | } | ||
165 | |||
166 | @@ -1094,7 +1103,10 @@ err_init: | ||
167 | free_irq(MX1_DMA_INT, NULL); | ||
168 | free_irq(MX1_DMA_ERR, NULL); | ||
169 | } | ||
170 | - | ||
171 | +err_enable: | ||
172 | + clk_disable_unprepare(imxdma->dma_ipg); | ||
173 | + clk_disable_unprepare(imxdma->dma_ahb); | ||
174 | +err_clk: | ||
175 | kfree(imxdma); | ||
176 | return ret; | ||
177 | } | ||
178 | @@ -1114,7 +1126,9 @@ static int __exit imxdma_remove(struct platform_device *pdev) | ||
179 | free_irq(MX1_DMA_ERR, NULL); | ||
180 | } | ||
181 | |||
182 | - kfree(imxdma); | ||
183 | + clk_disable_unprepare(imxdma->dma_ipg); | ||
184 | + clk_disable_unprepare(imxdma->dma_ahb); | ||
185 | + kfree(imxdma); | ||
186 | |||
187 | return 0; | ||
188 | } | ||
189 | diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c | ||
190 | index d4d162f..3de3d9b 100644 | ||
191 | --- a/drivers/gpu/drm/i915/intel_display.c | ||
192 | +++ b/drivers/gpu/drm/i915/intel_display.c | ||
193 | @@ -4982,17 +4982,6 @@ static bool intel_choose_pipe_bpp_dither(struct drm_crtc *crtc, | ||
194 | continue; | ||
195 | } | ||
196 | |||
197 | - if (intel_encoder->type == INTEL_OUTPUT_EDP) { | ||
198 | - /* Use VBT settings if we have an eDP panel */ | ||
199 | - unsigned int edp_bpc = dev_priv->edp.bpp / 3; | ||
200 | - | ||
201 | - if (edp_bpc < display_bpc) { | ||
202 | - DRM_DEBUG_KMS("clamping display bpc (was %d) to eDP (%d)\n", display_bpc, edp_bpc); | ||
203 | - display_bpc = edp_bpc; | ||
204 | - } | ||
205 | - continue; | ||
206 | - } | ||
207 | - | ||
208 | /* Not one of the known troublemakers, check the EDID */ | ||
209 | list_for_each_entry(connector, &dev->mode_config.connector_list, | ||
210 | head) { | ||
211 | diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c | ||
212 | index 6862421..069725c 100644 | ||
213 | --- a/drivers/gpu/drm/i915/intel_dp.c | ||
214 | +++ b/drivers/gpu/drm/i915/intel_dp.c | ||
215 | @@ -712,8 +712,8 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode, | ||
216 | |||
217 | bpp = adjusted_mode->private_flags & INTEL_MODE_DP_FORCE_6BPC ? 18 : 24; | ||
218 | |||
219 | - for (lane_count = 1; lane_count <= max_lane_count; lane_count <<= 1) { | ||
220 | - for (clock = 0; clock <= max_clock; clock++) { | ||
221 | + for (clock = 0; clock <= max_clock; clock++) { | ||
222 | + for (lane_count = 1; lane_count <= max_lane_count; lane_count <<= 1) { | ||
223 | int link_avail = intel_dp_max_data_rate(intel_dp_link_clock(bws[clock]), lane_count); | ||
224 | |||
225 | if (intel_dp_link_required(mode->clock, bpp) | ||
226 | @@ -1156,10 +1156,14 @@ static void ironlake_edp_panel_off(struct intel_dp *intel_dp) | ||
227 | WARN(!intel_dp->want_panel_vdd, "Need VDD to turn off panel\n"); | ||
228 | |||
229 | pp = ironlake_get_pp_control(dev_priv); | ||
230 | - pp &= ~(POWER_TARGET_ON | PANEL_POWER_RESET | EDP_BLC_ENABLE); | ||
231 | + /* We need to switch off panel power _and_ force vdd, for otherwise some | ||
232 | + * panels get very unhappy and cease to work. */ | ||
233 | + pp &= ~(POWER_TARGET_ON | EDP_FORCE_VDD | PANEL_POWER_RESET | EDP_BLC_ENABLE); | ||
234 | I915_WRITE(PCH_PP_CONTROL, pp); | ||
235 | POSTING_READ(PCH_PP_CONTROL); | ||
236 | |||
237 | + intel_dp->want_panel_vdd = false; | ||
238 | + | ||
239 | ironlake_wait_panel_off(intel_dp); | ||
240 | } | ||
241 | |||
242 | @@ -1269,11 +1273,9 @@ static void intel_dp_prepare(struct drm_encoder *encoder) | ||
243 | * ensure that we have vdd while we switch off the panel. */ | ||
244 | ironlake_edp_panel_vdd_on(intel_dp); | ||
245 | ironlake_edp_backlight_off(intel_dp); | ||
246 | - ironlake_edp_panel_off(intel_dp); | ||
247 | - | ||
248 | intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); | ||
249 | + ironlake_edp_panel_off(intel_dp); | ||
250 | intel_dp_link_down(intel_dp); | ||
251 | - ironlake_edp_panel_vdd_off(intel_dp, false); | ||
252 | } | ||
253 | |||
254 | static void intel_dp_commit(struct drm_encoder *encoder) | ||
255 | @@ -1308,11 +1310,9 @@ intel_dp_dpms(struct drm_encoder *encoder, int mode) | ||
256 | /* Switching the panel off requires vdd. */ | ||
257 | ironlake_edp_panel_vdd_on(intel_dp); | ||
258 | ironlake_edp_backlight_off(intel_dp); | ||
259 | - ironlake_edp_panel_off(intel_dp); | ||
260 | - | ||
261 | intel_dp_sink_dpms(intel_dp, mode); | ||
262 | + ironlake_edp_panel_off(intel_dp); | ||
263 | intel_dp_link_down(intel_dp); | ||
264 | - ironlake_edp_panel_vdd_off(intel_dp, false); | ||
265 | |||
266 | if (is_cpu_edp(intel_dp)) | ||
267 | ironlake_edp_pll_off(encoder); | ||
268 | diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c | ||
269 | index 302d3d5..12a9e5f 100644 | ||
270 | --- a/drivers/gpu/drm/i915/intel_ringbuffer.c | ||
271 | +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c | ||
272 | @@ -258,8 +258,6 @@ static int init_ring_common(struct intel_ring_buffer *ring) | ||
273 | I915_WRITE_HEAD(ring, 0); | ||
274 | ring->write_tail(ring, 0); | ||
275 | |||
276 | - /* Initialize the ring. */ | ||
277 | - I915_WRITE_START(ring, obj->gtt_offset); | ||
278 | head = I915_READ_HEAD(ring) & HEAD_ADDR; | ||
279 | |||
280 | /* G45 ring initialization fails to reset head to zero */ | ||
281 | @@ -285,6 +283,11 @@ static int init_ring_common(struct intel_ring_buffer *ring) | ||
282 | } | ||
283 | } | ||
284 | |||
285 | + /* Initialize the ring. This must happen _after_ we've cleared the ring | ||
286 | + * registers with the above sequence (the readback of the HEAD registers | ||
287 | + * also enforces ordering), otherwise the hw might lose the new ring | ||
288 | + * register values. */ | ||
289 | + I915_WRITE_START(ring, obj->gtt_offset); | ||
290 | I915_WRITE_CTL(ring, | ||
291 | ((ring->size - PAGE_SIZE) & RING_NR_PAGES) | ||
292 | | RING_VALID); | ||
293 | diff --git a/drivers/gpu/drm/nouveau/nvd0_display.c b/drivers/gpu/drm/nouveau/nvd0_display.c | ||
294 | index 0247250..8a555fb 100644 | ||
295 | --- a/drivers/gpu/drm/nouveau/nvd0_display.c | ||
296 | +++ b/drivers/gpu/drm/nouveau/nvd0_display.c | ||
297 | @@ -790,7 +790,7 @@ nvd0_crtc_cursor_move(struct drm_crtc *crtc, int x, int y) | ||
298 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | ||
299 | int ch = EVO_CURS(nv_crtc->index); | ||
300 | |||
301 | - evo_piow(crtc->dev, ch, 0x0084, (y << 16) | x); | ||
302 | + evo_piow(crtc->dev, ch, 0x0084, (y << 16) | (x & 0xffff)); | ||
303 | evo_piow(crtc->dev, ch, 0x0080, 0x00000000); | ||
304 | return 0; | ||
305 | } | ||
306 | diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c | ||
307 | index af1054f..a53ca30 100644 | ||
308 | --- a/drivers/gpu/drm/radeon/atombios_crtc.c | ||
309 | +++ b/drivers/gpu/drm/radeon/atombios_crtc.c | ||
310 | @@ -259,7 +259,7 @@ void atombios_crtc_dpms(struct drm_crtc *crtc, int mode) | ||
311 | /* adjust pm to dpms changes BEFORE enabling crtcs */ | ||
312 | radeon_pm_compute_clocks(rdev); | ||
313 | /* disable crtc pair power gating before programming */ | ||
314 | - if (ASIC_IS_DCE6(rdev)) | ||
315 | + if (ASIC_IS_DCE6(rdev) && !radeon_crtc->in_mode_set) | ||
316 | atombios_powergate_crtc(crtc, ATOM_DISABLE); | ||
317 | atombios_enable_crtc(crtc, ATOM_ENABLE); | ||
318 | if (ASIC_IS_DCE3(rdev) && !ASIC_IS_DCE6(rdev)) | ||
319 | @@ -279,7 +279,7 @@ void atombios_crtc_dpms(struct drm_crtc *crtc, int mode) | ||
320 | atombios_enable_crtc(crtc, ATOM_DISABLE); | ||
321 | radeon_crtc->enabled = false; | ||
322 | /* power gating is per-pair */ | ||
323 | - if (ASIC_IS_DCE6(rdev)) { | ||
324 | + if (ASIC_IS_DCE6(rdev) && !radeon_crtc->in_mode_set) { | ||
325 | struct drm_crtc *other_crtc; | ||
326 | struct radeon_crtc *other_radeon_crtc; | ||
327 | list_for_each_entry(other_crtc, &rdev->ddev->mode_config.crtc_list, head) { | ||
328 | @@ -1634,18 +1634,28 @@ static bool atombios_crtc_mode_fixup(struct drm_crtc *crtc, | ||
329 | static void atombios_crtc_prepare(struct drm_crtc *crtc) | ||
330 | { | ||
331 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); | ||
332 | + struct drm_device *dev = crtc->dev; | ||
333 | + struct radeon_device *rdev = dev->dev_private; | ||
334 | |||
335 | + radeon_crtc->in_mode_set = true; | ||
336 | /* pick pll */ | ||
337 | radeon_crtc->pll_id = radeon_atom_pick_pll(crtc); | ||
338 | |||
339 | + /* disable crtc pair power gating before programming */ | ||
340 | + if (ASIC_IS_DCE6(rdev)) | ||
341 | + atombios_powergate_crtc(crtc, ATOM_DISABLE); | ||
342 | + | ||
343 | atombios_lock_crtc(crtc, ATOM_ENABLE); | ||
344 | atombios_crtc_dpms(crtc, DRM_MODE_DPMS_OFF); | ||
345 | } | ||
346 | |||
347 | static void atombios_crtc_commit(struct drm_crtc *crtc) | ||
348 | { | ||
349 | + struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); | ||
350 | + | ||
351 | atombios_crtc_dpms(crtc, DRM_MODE_DPMS_ON); | ||
352 | atombios_lock_crtc(crtc, ATOM_DISABLE); | ||
353 | + radeon_crtc->in_mode_set = false; | ||
354 | } | ||
355 | |||
356 | static void atombios_crtc_disable(struct drm_crtc *crtc) | ||
357 | diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c | ||
358 | index e72c03f..e5328da 100644 | ||
359 | --- a/drivers/gpu/drm/radeon/evergreen.c | ||
360 | +++ b/drivers/gpu/drm/radeon/evergreen.c | ||
361 | @@ -1117,24 +1117,8 @@ void evergreen_agp_enable(struct radeon_device *rdev) | ||
362 | |||
363 | void evergreen_mc_stop(struct radeon_device *rdev, struct evergreen_mc_save *save) | ||
364 | { | ||
365 | - save->vga_control[0] = RREG32(D1VGA_CONTROL); | ||
366 | - save->vga_control[1] = RREG32(D2VGA_CONTROL); | ||
367 | save->vga_render_control = RREG32(VGA_RENDER_CONTROL); | ||
368 | save->vga_hdp_control = RREG32(VGA_HDP_CONTROL); | ||
369 | - save->crtc_control[0] = RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET); | ||
370 | - save->crtc_control[1] = RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET); | ||
371 | - if (rdev->num_crtc >= 4) { | ||
372 | - save->vga_control[2] = RREG32(EVERGREEN_D3VGA_CONTROL); | ||
373 | - save->vga_control[3] = RREG32(EVERGREEN_D4VGA_CONTROL); | ||
374 | - save->crtc_control[2] = RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET); | ||
375 | - save->crtc_control[3] = RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET); | ||
376 | - } | ||
377 | - if (rdev->num_crtc >= 6) { | ||
378 | - save->vga_control[4] = RREG32(EVERGREEN_D5VGA_CONTROL); | ||
379 | - save->vga_control[5] = RREG32(EVERGREEN_D6VGA_CONTROL); | ||
380 | - save->crtc_control[4] = RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET); | ||
381 | - save->crtc_control[5] = RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET); | ||
382 | - } | ||
383 | |||
384 | /* Stop all video */ | ||
385 | WREG32(VGA_RENDER_CONTROL, 0); | ||
386 | @@ -1245,47 +1229,6 @@ void evergreen_mc_resume(struct radeon_device *rdev, struct evergreen_mc_save *s | ||
387 | /* Unlock host access */ | ||
388 | WREG32(VGA_HDP_CONTROL, save->vga_hdp_control); | ||
389 | mdelay(1); | ||
390 | - /* Restore video state */ | ||
391 | - WREG32(D1VGA_CONTROL, save->vga_control[0]); | ||
392 | - WREG32(D2VGA_CONTROL, save->vga_control[1]); | ||
393 | - if (rdev->num_crtc >= 4) { | ||
394 | - WREG32(EVERGREEN_D3VGA_CONTROL, save->vga_control[2]); | ||
395 | - WREG32(EVERGREEN_D4VGA_CONTROL, save->vga_control[3]); | ||
396 | - } | ||
397 | - if (rdev->num_crtc >= 6) { | ||
398 | - WREG32(EVERGREEN_D5VGA_CONTROL, save->vga_control[4]); | ||
399 | - WREG32(EVERGREEN_D6VGA_CONTROL, save->vga_control[5]); | ||
400 | - } | ||
401 | - WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC0_REGISTER_OFFSET, 1); | ||
402 | - WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC1_REGISTER_OFFSET, 1); | ||
403 | - if (rdev->num_crtc >= 4) { | ||
404 | - WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC2_REGISTER_OFFSET, 1); | ||
405 | - WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC3_REGISTER_OFFSET, 1); | ||
406 | - } | ||
407 | - if (rdev->num_crtc >= 6) { | ||
408 | - WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC4_REGISTER_OFFSET, 1); | ||
409 | - WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC5_REGISTER_OFFSET, 1); | ||
410 | - } | ||
411 | - WREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET, save->crtc_control[0]); | ||
412 | - WREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET, save->crtc_control[1]); | ||
413 | - if (rdev->num_crtc >= 4) { | ||
414 | - WREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET, save->crtc_control[2]); | ||
415 | - WREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET, save->crtc_control[3]); | ||
416 | - } | ||
417 | - if (rdev->num_crtc >= 6) { | ||
418 | - WREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET, save->crtc_control[4]); | ||
419 | - WREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET, save->crtc_control[5]); | ||
420 | - } | ||
421 | - WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC0_REGISTER_OFFSET, 0); | ||
422 | - WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC1_REGISTER_OFFSET, 0); | ||
423 | - if (rdev->num_crtc >= 4) { | ||
424 | - WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC2_REGISTER_OFFSET, 0); | ||
425 | - WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC3_REGISTER_OFFSET, 0); | ||
426 | - } | ||
427 | - if (rdev->num_crtc >= 6) { | ||
428 | - WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC4_REGISTER_OFFSET, 0); | ||
429 | - WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC5_REGISTER_OFFSET, 0); | ||
430 | - } | ||
431 | WREG32(VGA_RENDER_CONTROL, save->vga_render_control); | ||
432 | } | ||
433 | |||
434 | @@ -2142,10 +2085,18 @@ static void evergreen_gpu_init(struct radeon_device *rdev) | ||
435 | if (rdev->flags & RADEON_IS_IGP) | ||
436 | rdev->config.evergreen.tile_config |= 1 << 4; | ||
437 | else { | ||
438 | - if ((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT) | ||
439 | - rdev->config.evergreen.tile_config |= 1 << 4; | ||
440 | - else | ||
441 | + switch ((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT) { | ||
442 | + case 0: /* four banks */ | ||
443 | rdev->config.evergreen.tile_config |= 0 << 4; | ||
444 | + break; | ||
445 | + case 1: /* eight banks */ | ||
446 | + rdev->config.evergreen.tile_config |= 1 << 4; | ||
447 | + break; | ||
448 | + case 2: /* sixteen banks */ | ||
449 | + default: | ||
450 | + rdev->config.evergreen.tile_config |= 2 << 4; | ||
451 | + break; | ||
452 | + } | ||
453 | } | ||
454 | rdev->config.evergreen.tile_config |= | ||
455 | ((mc_arb_ramcfg & BURSTLENGTH_MASK) >> BURSTLENGTH_SHIFT) << 8; | ||
456 | diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c | ||
457 | index ad0a380..9934c9d 100644 | ||
458 | --- a/drivers/gpu/drm/radeon/ni.c | ||
459 | +++ b/drivers/gpu/drm/radeon/ni.c | ||
460 | @@ -880,10 +880,18 @@ static void cayman_gpu_init(struct radeon_device *rdev) | ||
461 | if (rdev->flags & RADEON_IS_IGP) | ||
462 | rdev->config.cayman.tile_config |= 1 << 4; | ||
463 | else { | ||
464 | - if ((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT) | ||
465 | - rdev->config.cayman.tile_config |= 1 << 4; | ||
466 | - else | ||
467 | + switch ((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT) { | ||
468 | + case 0: /* four banks */ | ||
469 | rdev->config.cayman.tile_config |= 0 << 4; | ||
470 | + break; | ||
471 | + case 1: /* eight banks */ | ||
472 | + rdev->config.cayman.tile_config |= 1 << 4; | ||
473 | + break; | ||
474 | + case 2: /* sixteen banks */ | ||
475 | + default: | ||
476 | + rdev->config.cayman.tile_config |= 2 << 4; | ||
477 | + break; | ||
478 | + } | ||
479 | } | ||
480 | rdev->config.cayman.tile_config |= | ||
481 | ((gb_addr_config & PIPE_INTERLEAVE_SIZE_MASK) >> PIPE_INTERLEAVE_SIZE_SHIFT) << 8; | ||
482 | diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h | ||
483 | index 3d9f9f1..665df87 100644 | ||
484 | --- a/drivers/gpu/drm/radeon/radeon_asic.h | ||
485 | +++ b/drivers/gpu/drm/radeon/radeon_asic.h | ||
486 | @@ -262,13 +262,10 @@ extern int rs690_mc_wait_for_idle(struct radeon_device *rdev); | ||
487 | * rv515 | ||
488 | */ | ||
489 | struct rv515_mc_save { | ||
490 | - u32 d1vga_control; | ||
491 | - u32 d2vga_control; | ||
492 | u32 vga_render_control; | ||
493 | u32 vga_hdp_control; | ||
494 | - u32 d1crtc_control; | ||
495 | - u32 d2crtc_control; | ||
496 | }; | ||
497 | + | ||
498 | int rv515_init(struct radeon_device *rdev); | ||
499 | void rv515_fini(struct radeon_device *rdev); | ||
500 | uint32_t rv515_mc_rreg(struct radeon_device *rdev, uint32_t reg); | ||
501 | @@ -401,11 +398,10 @@ void r700_cp_fini(struct radeon_device *rdev); | ||
502 | * evergreen | ||
503 | */ | ||
504 | struct evergreen_mc_save { | ||
505 | - u32 vga_control[6]; | ||
506 | u32 vga_render_control; | ||
507 | u32 vga_hdp_control; | ||
508 | - u32 crtc_control[6]; | ||
509 | }; | ||
510 | + | ||
511 | void evergreen_pcie_gart_tlb_flush(struct radeon_device *rdev); | ||
512 | int evergreen_init(struct radeon_device *rdev); | ||
513 | void evergreen_fini(struct radeon_device *rdev); | ||
514 | diff --git a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c | ||
515 | index 210317c..9760e5a 100644 | ||
516 | --- a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c | ||
517 | +++ b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c | ||
518 | @@ -1025,9 +1025,11 @@ static int radeon_crtc_mode_set(struct drm_crtc *crtc, | ||
519 | |||
520 | static void radeon_crtc_prepare(struct drm_crtc *crtc) | ||
521 | { | ||
522 | + struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); | ||
523 | struct drm_device *dev = crtc->dev; | ||
524 | struct drm_crtc *crtci; | ||
525 | |||
526 | + radeon_crtc->in_mode_set = true; | ||
527 | /* | ||
528 | * The hardware wedges sometimes if you reconfigure one CRTC | ||
529 | * whilst another is running (see fdo bug #24611). | ||
530 | @@ -1038,6 +1040,7 @@ static void radeon_crtc_prepare(struct drm_crtc *crtc) | ||
531 | |||
532 | static void radeon_crtc_commit(struct drm_crtc *crtc) | ||
533 | { | ||
534 | + struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); | ||
535 | struct drm_device *dev = crtc->dev; | ||
536 | struct drm_crtc *crtci; | ||
537 | |||
538 | @@ -1048,6 +1051,7 @@ static void radeon_crtc_commit(struct drm_crtc *crtc) | ||
539 | if (crtci->enabled) | ||
540 | radeon_crtc_dpms(crtci, DRM_MODE_DPMS_ON); | ||
541 | } | ||
542 | + radeon_crtc->in_mode_set = false; | ||
543 | } | ||
544 | |||
545 | static const struct drm_crtc_helper_funcs legacy_helper_funcs = { | ||
546 | diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h | ||
547 | index f7eb5d8..778c1f0 100644 | ||
548 | --- a/drivers/gpu/drm/radeon/radeon_mode.h | ||
549 | +++ b/drivers/gpu/drm/radeon/radeon_mode.h | ||
550 | @@ -266,6 +266,7 @@ struct radeon_crtc { | ||
551 | u16 lut_r[256], lut_g[256], lut_b[256]; | ||
552 | bool enabled; | ||
553 | bool can_tile; | ||
554 | + bool in_mode_set; | ||
555 | uint32_t crtc_offset; | ||
556 | struct drm_gem_object *cursor_bo; | ||
557 | uint64_t cursor_addr; | ||
558 | diff --git a/drivers/gpu/drm/radeon/rv515.c b/drivers/gpu/drm/radeon/rv515.c | ||
559 | index d8d78fe..43af363 100644 | ||
560 | --- a/drivers/gpu/drm/radeon/rv515.c | ||
561 | +++ b/drivers/gpu/drm/radeon/rv515.c | ||
562 | @@ -281,12 +281,8 @@ int rv515_debugfs_ga_info_init(struct radeon_device *rdev) | ||
563 | |||
564 | void rv515_mc_stop(struct radeon_device *rdev, struct rv515_mc_save *save) | ||
565 | { | ||
566 | - save->d1vga_control = RREG32(R_000330_D1VGA_CONTROL); | ||
567 | - save->d2vga_control = RREG32(R_000338_D2VGA_CONTROL); | ||
568 | save->vga_render_control = RREG32(R_000300_VGA_RENDER_CONTROL); | ||
569 | save->vga_hdp_control = RREG32(R_000328_VGA_HDP_CONTROL); | ||
570 | - save->d1crtc_control = RREG32(R_006080_D1CRTC_CONTROL); | ||
571 | - save->d2crtc_control = RREG32(R_006880_D2CRTC_CONTROL); | ||
572 | |||
573 | /* Stop all video */ | ||
574 | WREG32(R_0068E8_D2CRTC_UPDATE_LOCK, 0); | ||
575 | @@ -311,15 +307,6 @@ void rv515_mc_resume(struct radeon_device *rdev, struct rv515_mc_save *save) | ||
576 | /* Unlock host access */ | ||
577 | WREG32(R_000328_VGA_HDP_CONTROL, save->vga_hdp_control); | ||
578 | mdelay(1); | ||
579 | - /* Restore video state */ | ||
580 | - WREG32(R_000330_D1VGA_CONTROL, save->d1vga_control); | ||
581 | - WREG32(R_000338_D2VGA_CONTROL, save->d2vga_control); | ||
582 | - WREG32(R_0060E8_D1CRTC_UPDATE_LOCK, 1); | ||
583 | - WREG32(R_0068E8_D2CRTC_UPDATE_LOCK, 1); | ||
584 | - WREG32(R_006080_D1CRTC_CONTROL, save->d1crtc_control); | ||
585 | - WREG32(R_006880_D2CRTC_CONTROL, save->d2crtc_control); | ||
586 | - WREG32(R_0060E8_D1CRTC_UPDATE_LOCK, 0); | ||
587 | - WREG32(R_0068E8_D2CRTC_UPDATE_LOCK, 0); | ||
588 | WREG32(R_000300_VGA_RENDER_CONTROL, save->vga_render_control); | ||
589 | } | ||
590 | |||
591 | diff --git a/drivers/infiniband/ulp/srp/ib_srp.c b/drivers/infiniband/ulp/srp/ib_srp.c | ||
592 | index bcbf22e..1b5b0c7 100644 | ||
593 | --- a/drivers/infiniband/ulp/srp/ib_srp.c | ||
594 | +++ b/drivers/infiniband/ulp/srp/ib_srp.c | ||
595 | @@ -586,24 +586,62 @@ static void srp_unmap_data(struct scsi_cmnd *scmnd, | ||
596 | scmnd->sc_data_direction); | ||
597 | } | ||
598 | |||
599 | -static void srp_remove_req(struct srp_target_port *target, | ||
600 | - struct srp_request *req, s32 req_lim_delta) | ||
601 | +/** | ||
602 | + * srp_claim_req - Take ownership of the scmnd associated with a request. | ||
603 | + * @target: SRP target port. | ||
604 | + * @req: SRP request. | ||
605 | + * @scmnd: If NULL, take ownership of @req->scmnd. If not NULL, only take | ||
606 | + * ownership of @req->scmnd if it equals @scmnd. | ||
607 | + * | ||
608 | + * Return value: | ||
609 | + * Either NULL or a pointer to the SCSI command the caller became owner of. | ||
610 | + */ | ||
611 | +static struct scsi_cmnd *srp_claim_req(struct srp_target_port *target, | ||
612 | + struct srp_request *req, | ||
613 | + struct scsi_cmnd *scmnd) | ||
614 | +{ | ||
615 | + unsigned long flags; | ||
616 | + | ||
617 | + spin_lock_irqsave(&target->lock, flags); | ||
618 | + if (!scmnd) { | ||
619 | + scmnd = req->scmnd; | ||
620 | + req->scmnd = NULL; | ||
621 | + } else if (req->scmnd == scmnd) { | ||
622 | + req->scmnd = NULL; | ||
623 | + } else { | ||
624 | + scmnd = NULL; | ||
625 | + } | ||
626 | + spin_unlock_irqrestore(&target->lock, flags); | ||
627 | + | ||
628 | + return scmnd; | ||
629 | +} | ||
630 | + | ||
631 | +/** | ||
632 | + * srp_free_req() - Unmap data and add request to the free request list. | ||
633 | + */ | ||
634 | +static void srp_free_req(struct srp_target_port *target, | ||
635 | + struct srp_request *req, struct scsi_cmnd *scmnd, | ||
636 | + s32 req_lim_delta) | ||
637 | { | ||
638 | unsigned long flags; | ||
639 | |||
640 | - srp_unmap_data(req->scmnd, target, req); | ||
641 | + srp_unmap_data(scmnd, target, req); | ||
642 | + | ||
643 | spin_lock_irqsave(&target->lock, flags); | ||
644 | target->req_lim += req_lim_delta; | ||
645 | - req->scmnd = NULL; | ||
646 | list_add_tail(&req->list, &target->free_reqs); | ||
647 | spin_unlock_irqrestore(&target->lock, flags); | ||
648 | } | ||
649 | |||
650 | static void srp_reset_req(struct srp_target_port *target, struct srp_request *req) | ||
651 | { | ||
652 | - req->scmnd->result = DID_RESET << 16; | ||
653 | - req->scmnd->scsi_done(req->scmnd); | ||
654 | - srp_remove_req(target, req, 0); | ||
655 | + struct scsi_cmnd *scmnd = srp_claim_req(target, req, NULL); | ||
656 | + | ||
657 | + if (scmnd) { | ||
658 | + scmnd->result = DID_RESET << 16; | ||
659 | + scmnd->scsi_done(scmnd); | ||
660 | + srp_free_req(target, req, scmnd, 0); | ||
661 | + } | ||
662 | } | ||
663 | |||
664 | static int srp_reconnect_target(struct srp_target_port *target) | ||
665 | @@ -1073,11 +1111,18 @@ static void srp_process_rsp(struct srp_target_port *target, struct srp_rsp *rsp) | ||
666 | complete(&target->tsk_mgmt_done); | ||
667 | } else { | ||
668 | req = &target->req_ring[rsp->tag]; | ||
669 | - scmnd = req->scmnd; | ||
670 | - if (!scmnd) | ||
671 | + scmnd = srp_claim_req(target, req, NULL); | ||
672 | + if (!scmnd) { | ||
673 | shost_printk(KERN_ERR, target->scsi_host, | ||
674 | "Null scmnd for RSP w/tag %016llx\n", | ||
675 | (unsigned long long) rsp->tag); | ||
676 | + | ||
677 | + spin_lock_irqsave(&target->lock, flags); | ||
678 | + target->req_lim += be32_to_cpu(rsp->req_lim_delta); | ||
679 | + spin_unlock_irqrestore(&target->lock, flags); | ||
680 | + | ||
681 | + return; | ||
682 | + } | ||
683 | scmnd->result = rsp->status; | ||
684 | |||
685 | if (rsp->flags & SRP_RSP_FLAG_SNSVALID) { | ||
686 | @@ -1092,7 +1137,9 @@ static void srp_process_rsp(struct srp_target_port *target, struct srp_rsp *rsp) | ||
687 | else if (rsp->flags & (SRP_RSP_FLAG_DIOVER | SRP_RSP_FLAG_DIUNDER)) | ||
688 | scsi_set_resid(scmnd, be32_to_cpu(rsp->data_in_res_cnt)); | ||
689 | |||
690 | - srp_remove_req(target, req, be32_to_cpu(rsp->req_lim_delta)); | ||
691 | + srp_free_req(target, req, scmnd, | ||
692 | + be32_to_cpu(rsp->req_lim_delta)); | ||
693 | + | ||
694 | scmnd->host_scribble = NULL; | ||
695 | scmnd->scsi_done(scmnd); | ||
696 | } | ||
697 | @@ -1631,25 +1678,17 @@ static int srp_abort(struct scsi_cmnd *scmnd) | ||
698 | { | ||
699 | struct srp_target_port *target = host_to_target(scmnd->device->host); | ||
700 | struct srp_request *req = (struct srp_request *) scmnd->host_scribble; | ||
701 | - int ret = SUCCESS; | ||
702 | |||
703 | shost_printk(KERN_ERR, target->scsi_host, "SRP abort called\n"); | ||
704 | |||
705 | - if (!req || target->qp_in_error) | ||
706 | + if (!req || target->qp_in_error || !srp_claim_req(target, req, scmnd)) | ||
707 | return FAILED; | ||
708 | - if (srp_send_tsk_mgmt(target, req->index, scmnd->device->lun, | ||
709 | - SRP_TSK_ABORT_TASK)) | ||
710 | - return FAILED; | ||
711 | - | ||
712 | - if (req->scmnd) { | ||
713 | - if (!target->tsk_mgmt_status) { | ||
714 | - srp_remove_req(target, req, 0); | ||
715 | - scmnd->result = DID_ABORT << 16; | ||
716 | - } else | ||
717 | - ret = FAILED; | ||
718 | - } | ||
719 | + srp_send_tsk_mgmt(target, req->index, scmnd->device->lun, | ||
720 | + SRP_TSK_ABORT_TASK); | ||
721 | + srp_free_req(target, req, scmnd, 0); | ||
722 | + scmnd->result = DID_ABORT << 16; | ||
723 | |||
724 | - return ret; | ||
725 | + return SUCCESS; | ||
726 | } | ||
727 | |||
728 | static int srp_reset_device(struct scsi_cmnd *scmnd) | ||
729 | diff --git a/drivers/net/wireless/rt2x00/rt2800usb.c b/drivers/net/wireless/rt2x00/rt2800usb.c | ||
730 | index f388b65..7e1a492 100644 | ||
731 | --- a/drivers/net/wireless/rt2x00/rt2800usb.c | ||
732 | +++ b/drivers/net/wireless/rt2x00/rt2800usb.c | ||
733 | @@ -971,6 +971,7 @@ static struct usb_device_id rt2800usb_device_table[] = { | ||
734 | { USB_DEVICE(0x0411, 0x015d) }, | ||
735 | { USB_DEVICE(0x0411, 0x016f) }, | ||
736 | { USB_DEVICE(0x0411, 0x01a2) }, | ||
737 | + { USB_DEVICE(0x0411, 0x01ee) }, | ||
738 | /* Corega */ | ||
739 | { USB_DEVICE(0x07aa, 0x002f) }, | ||
740 | { USB_DEVICE(0x07aa, 0x003c) }, | ||
741 | diff --git a/drivers/tty/serial/pmac_zilog.c b/drivers/tty/serial/pmac_zilog.c | ||
742 | index 654755a..333c8d0 100644 | ||
743 | --- a/drivers/tty/serial/pmac_zilog.c | ||
744 | +++ b/drivers/tty/serial/pmac_zilog.c | ||
745 | @@ -1348,10 +1348,16 @@ static int pmz_verify_port(struct uart_port *port, struct serial_struct *ser) | ||
746 | static int pmz_poll_get_char(struct uart_port *port) | ||
747 | { | ||
748 | struct uart_pmac_port *uap = (struct uart_pmac_port *)port; | ||
749 | + int tries = 2; | ||
750 | |||
751 | - while ((read_zsreg(uap, R0) & Rx_CH_AV) == 0) | ||
752 | - udelay(5); | ||
753 | - return read_zsdata(uap); | ||
754 | + while (tries) { | ||
755 | + if ((read_zsreg(uap, R0) & Rx_CH_AV) != 0) | ||
756 | + return read_zsdata(uap); | ||
757 | + if (tries--) | ||
758 | + udelay(5); | ||
759 | + } | ||
760 | + | ||
761 | + return NO_POLL_CHAR; | ||
762 | } | ||
763 | |||
764 | static void pmz_poll_put_char(struct uart_port *port, unsigned char c) | ||
765 | diff --git a/drivers/usb/gadget/u_ether.c b/drivers/usb/gadget/u_ether.c | ||
766 | index 4e1f0aa..9a2a1ae 100644 | ||
767 | --- a/drivers/usb/gadget/u_ether.c | ||
768 | +++ b/drivers/usb/gadget/u_ether.c | ||
769 | @@ -669,6 +669,8 @@ static int eth_stop(struct net_device *net) | ||
770 | spin_lock_irqsave(&dev->lock, flags); | ||
771 | if (dev->port_usb) { | ||
772 | struct gether *link = dev->port_usb; | ||
773 | + const struct usb_endpoint_descriptor *in; | ||
774 | + const struct usb_endpoint_descriptor *out; | ||
775 | |||
776 | if (link->close) | ||
777 | link->close(link); | ||
778 | @@ -682,10 +684,14 @@ static int eth_stop(struct net_device *net) | ||
779 | * their own pace; the network stack can handle old packets. | ||
780 | * For the moment we leave this here, since it works. | ||
781 | */ | ||
782 | + in = link->in_ep->desc; | ||
783 | + out = link->out_ep->desc; | ||
784 | usb_ep_disable(link->in_ep); | ||
785 | usb_ep_disable(link->out_ep); | ||
786 | if (netif_carrier_ok(net)) { | ||
787 | DBG(dev, "host still using in/out endpoints\n"); | ||
788 | + link->in_ep->desc = in; | ||
789 | + link->out_ep->desc = out; | ||
790 | usb_ep_enable(link->in_ep); | ||
791 | usb_ep_enable(link->out_ep); | ||
792 | } | ||
793 | diff --git a/drivers/usb/host/pci-quirks.c b/drivers/usb/host/pci-quirks.c | ||
794 | index df0828c..c5e9e4a 100644 | ||
795 | --- a/drivers/usb/host/pci-quirks.c | ||
796 | +++ b/drivers/usb/host/pci-quirks.c | ||
797 | @@ -800,6 +800,13 @@ void usb_enable_xhci_ports(struct pci_dev *xhci_pdev) | ||
798 | } | ||
799 | EXPORT_SYMBOL_GPL(usb_enable_xhci_ports); | ||
800 | |||
801 | +void usb_disable_xhci_ports(struct pci_dev *xhci_pdev) | ||
802 | +{ | ||
803 | + pci_write_config_dword(xhci_pdev, USB_INTEL_USB3_PSSEN, 0x0); | ||
804 | + pci_write_config_dword(xhci_pdev, USB_INTEL_XUSB2PR, 0x0); | ||
805 | +} | ||
806 | +EXPORT_SYMBOL_GPL(usb_disable_xhci_ports); | ||
807 | + | ||
808 | /** | ||
809 | * PCI Quirks for xHCI. | ||
810 | * | ||
811 | diff --git a/drivers/usb/host/pci-quirks.h b/drivers/usb/host/pci-quirks.h | ||
812 | index b1002a8..ef004a5 100644 | ||
813 | --- a/drivers/usb/host/pci-quirks.h | ||
814 | +++ b/drivers/usb/host/pci-quirks.h | ||
815 | @@ -10,6 +10,7 @@ void usb_amd_quirk_pll_disable(void); | ||
816 | void usb_amd_quirk_pll_enable(void); | ||
817 | bool usb_is_intel_switchable_xhci(struct pci_dev *pdev); | ||
818 | void usb_enable_xhci_ports(struct pci_dev *xhci_pdev); | ||
819 | +void usb_disable_xhci_ports(struct pci_dev *xhci_pdev); | ||
820 | #else | ||
821 | static inline void usb_amd_quirk_pll_disable(void) {} | ||
822 | static inline void usb_amd_quirk_pll_enable(void) {} | ||
823 | diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c | ||
824 | index 19e8921..f152740 100644 | ||
825 | --- a/drivers/usb/host/xhci-pci.c | ||
826 | +++ b/drivers/usb/host/xhci-pci.c | ||
827 | @@ -90,11 +90,21 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci) | ||
828 | xhci->quirks |= XHCI_EP_LIMIT_QUIRK; | ||
829 | xhci->limit_active_eps = 64; | ||
830 | xhci->quirks |= XHCI_SW_BW_CHECKING; | ||
831 | + /* | ||
832 | + * PPT desktop boards DH77EB and DH77DF will power back on after | ||
833 | + * a few seconds of being shutdown. The fix for this is to | ||
834 | + * switch the ports from xHCI to EHCI on shutdown. We can't use | ||
835 | + * DMI information to find those particular boards (since each | ||
836 | + * vendor will change the board name), so we have to key off all | ||
837 | + * PPT chipsets. | ||
838 | + */ | ||
839 | + xhci->quirks |= XHCI_SPURIOUS_REBOOT; | ||
840 | } | ||
841 | if (pdev->vendor == PCI_VENDOR_ID_ETRON && | ||
842 | pdev->device == PCI_DEVICE_ID_ASROCK_P67) { | ||
843 | xhci->quirks |= XHCI_RESET_ON_RESUME; | ||
844 | xhci_dbg(xhci, "QUIRK: Resetting on resume\n"); | ||
845 | + xhci->quirks |= XHCI_TRUST_TX_LENGTH; | ||
846 | } | ||
847 | if (pdev->vendor == PCI_VENDOR_ID_VIA) | ||
848 | xhci->quirks |= XHCI_RESET_ON_RESUME; | ||
849 | diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c | ||
850 | index 158175bf..203ba31 100644 | ||
851 | --- a/drivers/usb/host/xhci-ring.c | ||
852 | +++ b/drivers/usb/host/xhci-ring.c | ||
853 | @@ -145,29 +145,37 @@ static void next_trb(struct xhci_hcd *xhci, | ||
854 | */ | ||
855 | static void inc_deq(struct xhci_hcd *xhci, struct xhci_ring *ring) | ||
856 | { | ||
857 | - union xhci_trb *next; | ||
858 | unsigned long long addr; | ||
859 | |||
860 | ring->deq_updates++; | ||
861 | |||
862 | - /* If this is not event ring, there is one more usable TRB */ | ||
863 | + /* | ||
864 | + * If this is not event ring, and the dequeue pointer | ||
865 | + * is not on a link TRB, there is one more usable TRB | ||
866 | + */ | ||
867 | if (ring->type != TYPE_EVENT && | ||
868 | !last_trb(xhci, ring, ring->deq_seg, ring->dequeue)) | ||
869 | ring->num_trbs_free++; | ||
870 | - next = ++(ring->dequeue); | ||
871 | |||
872 | - /* Update the dequeue pointer further if that was a link TRB or we're at | ||
873 | - * the end of an event ring segment (which doesn't have link TRBS) | ||
874 | - */ | ||
875 | - while (last_trb(xhci, ring, ring->deq_seg, next)) { | ||
876 | - if (ring->type == TYPE_EVENT && last_trb_on_last_seg(xhci, | ||
877 | - ring, ring->deq_seg, next)) { | ||
878 | - ring->cycle_state = (ring->cycle_state ? 0 : 1); | ||
879 | + do { | ||
880 | + /* | ||
881 | + * Update the dequeue pointer further if that was a link TRB or | ||
882 | + * we're at the end of an event ring segment (which doesn't have | ||
883 | + * link TRBS) | ||
884 | + */ | ||
885 | + if (last_trb(xhci, ring, ring->deq_seg, ring->dequeue)) { | ||
886 | + if (ring->type == TYPE_EVENT && | ||
887 | + last_trb_on_last_seg(xhci, ring, | ||
888 | + ring->deq_seg, ring->dequeue)) { | ||
889 | + ring->cycle_state = (ring->cycle_state ? 0 : 1); | ||
890 | + } | ||
891 | + ring->deq_seg = ring->deq_seg->next; | ||
892 | + ring->dequeue = ring->deq_seg->trbs; | ||
893 | + } else { | ||
894 | + ring->dequeue++; | ||
895 | } | ||
896 | - ring->deq_seg = ring->deq_seg->next; | ||
897 | - ring->dequeue = ring->deq_seg->trbs; | ||
898 | - next = ring->dequeue; | ||
899 | - } | ||
900 | + } while (last_trb(xhci, ring, ring->deq_seg, ring->dequeue)); | ||
901 | + | ||
902 | addr = (unsigned long long) xhci_trb_virt_to_dma(ring->deq_seg, ring->dequeue); | ||
903 | } | ||
904 | |||
905 | diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c | ||
906 | index 9248d49..7beed53 100644 | ||
907 | --- a/drivers/usb/host/xhci.c | ||
908 | +++ b/drivers/usb/host/xhci.c | ||
909 | @@ -166,7 +166,7 @@ int xhci_reset(struct xhci_hcd *xhci) | ||
910 | xhci_writel(xhci, command, &xhci->op_regs->command); | ||
911 | |||
912 | ret = handshake(xhci, &xhci->op_regs->command, | ||
913 | - CMD_RESET, 0, 250 * 1000); | ||
914 | + CMD_RESET, 0, 10 * 1000 * 1000); | ||
915 | if (ret) | ||
916 | return ret; | ||
917 | |||
918 | @@ -175,7 +175,8 @@ int xhci_reset(struct xhci_hcd *xhci) | ||
919 | * xHCI cannot write to any doorbells or operational registers other | ||
920 | * than status until the "Controller Not Ready" flag is cleared. | ||
921 | */ | ||
922 | - ret = handshake(xhci, &xhci->op_regs->status, STS_CNR, 0, 250 * 1000); | ||
923 | + ret = handshake(xhci, &xhci->op_regs->status, | ||
924 | + STS_CNR, 0, 10 * 1000 * 1000); | ||
925 | |||
926 | for (i = 0; i < 2; ++i) { | ||
927 | xhci->bus_state[i].port_c_suspend = 0; | ||
928 | @@ -658,6 +659,9 @@ void xhci_shutdown(struct usb_hcd *hcd) | ||
929 | { | ||
930 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); | ||
931 | |||
932 | + if (xhci->quirks && XHCI_SPURIOUS_REBOOT) | ||
933 | + usb_disable_xhci_ports(to_pci_dev(hcd->self.controller)); | ||
934 | + | ||
935 | spin_lock_irq(&xhci->lock); | ||
936 | xhci_halt(xhci); | ||
937 | spin_unlock_irq(&xhci->lock); | ||
938 | diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h | ||
939 | index 59434fe..19ae30f 100644 | ||
940 | --- a/drivers/usb/host/xhci.h | ||
941 | +++ b/drivers/usb/host/xhci.h | ||
942 | @@ -1486,6 +1486,7 @@ struct xhci_hcd { | ||
943 | #define XHCI_SW_BW_CHECKING (1 << 8) | ||
944 | #define XHCI_AMD_0x96_HOST (1 << 9) | ||
945 | #define XHCI_TRUST_TX_LENGTH (1 << 10) | ||
946 | +#define XHCI_SPURIOUS_REBOOT (1 << 13) | ||
947 | unsigned int num_active_eps; | ||
948 | unsigned int limit_active_eps; | ||
949 | /* There are two roothubs to keep track of bus suspend info for */ | ||
950 | diff --git a/drivers/usb/serial/ftdi_sio.c b/drivers/usb/serial/ftdi_sio.c | ||
951 | index 53e3e2c..f5819cb 100644 | ||
952 | --- a/drivers/usb/serial/ftdi_sio.c | ||
953 | +++ b/drivers/usb/serial/ftdi_sio.c | ||
954 | @@ -811,6 +811,7 @@ static struct usb_device_id id_table_combined [] = { | ||
955 | { USB_DEVICE(LARSENBRUSGAARD_VID, LB_ALTITRACK_PID) }, | ||
956 | { USB_DEVICE(GN_OTOMETRICS_VID, AURICAL_USB_PID) }, | ||
957 | { USB_DEVICE(PI_VID, PI_E861_PID) }, | ||
958 | + { USB_DEVICE(KONDO_VID, KONDO_USB_SERIAL_PID) }, | ||
959 | { USB_DEVICE(BAYER_VID, BAYER_CONTOUR_CABLE_PID) }, | ||
960 | { USB_DEVICE(FTDI_VID, MARVELL_OPENRD_PID), | ||
961 | .driver_info = (kernel_ulong_t)&ftdi_jtag_quirk }, | ||
962 | diff --git a/drivers/usb/serial/ftdi_sio_ids.h b/drivers/usb/serial/ftdi_sio_ids.h | ||
963 | index 5661c7e..5dd96ca 100644 | ||
964 | --- a/drivers/usb/serial/ftdi_sio_ids.h | ||
965 | +++ b/drivers/usb/serial/ftdi_sio_ids.h | ||
966 | @@ -795,6 +795,13 @@ | ||
967 | #define PI_E861_PID 0x1008 /* E-861 piezo controller USB connection */ | ||
968 | |||
969 | /* | ||
970 | + * Kondo Kagaku Co.Ltd. | ||
971 | + * http://www.kondo-robot.com/EN | ||
972 | + */ | ||
973 | +#define KONDO_VID 0x165c | ||
974 | +#define KONDO_USB_SERIAL_PID 0x0002 | ||
975 | + | ||
976 | +/* | ||
977 | * Bayer Ascensia Contour blood glucose meter USB-converter cable. | ||
978 | * http://winglucofacts.com/cables/ | ||
979 | */ | ||
980 | diff --git a/drivers/usb/serial/mos7840.c b/drivers/usb/serial/mos7840.c | ||
981 | index 62739ff..c1505c3 100644 | ||
982 | --- a/drivers/usb/serial/mos7840.c | ||
983 | +++ b/drivers/usb/serial/mos7840.c | ||
984 | @@ -1189,9 +1189,12 @@ static int mos7840_chars_in_buffer(struct tty_struct *tty) | ||
985 | } | ||
986 | |||
987 | spin_lock_irqsave(&mos7840_port->pool_lock, flags); | ||
988 | - for (i = 0; i < NUM_URBS; ++i) | ||
989 | - if (mos7840_port->busy[i]) | ||
990 | - chars += URB_TRANSFER_BUFFER_SIZE; | ||
991 | + for (i = 0; i < NUM_URBS; ++i) { | ||
992 | + if (mos7840_port->busy[i]) { | ||
993 | + struct urb *urb = mos7840_port->write_urb_pool[i]; | ||
994 | + chars += urb->transfer_buffer_length; | ||
995 | + } | ||
996 | + } | ||
997 | spin_unlock_irqrestore(&mos7840_port->pool_lock, flags); | ||
998 | dbg("%s - returns %d", __func__, chars); | ||
999 | return chars; | ||
1000 | diff --git a/drivers/usb/serial/option.c b/drivers/usb/serial/option.c | ||
1001 | index ae1a4b8..ee693cc 100644 | ||
1002 | --- a/drivers/usb/serial/option.c | ||
1003 | +++ b/drivers/usb/serial/option.c | ||
1004 | @@ -80,85 +80,9 @@ static void option_instat_callback(struct urb *urb); | ||
1005 | #define OPTION_PRODUCT_GTM380_MODEM 0x7201 | ||
1006 | |||
1007 | #define HUAWEI_VENDOR_ID 0x12D1 | ||
1008 | -#define HUAWEI_PRODUCT_E600 0x1001 | ||
1009 | -#define HUAWEI_PRODUCT_E220 0x1003 | ||
1010 | -#define HUAWEI_PRODUCT_E220BIS 0x1004 | ||
1011 | -#define HUAWEI_PRODUCT_E1401 0x1401 | ||
1012 | -#define HUAWEI_PRODUCT_E1402 0x1402 | ||
1013 | -#define HUAWEI_PRODUCT_E1403 0x1403 | ||
1014 | -#define HUAWEI_PRODUCT_E1404 0x1404 | ||
1015 | -#define HUAWEI_PRODUCT_E1405 0x1405 | ||
1016 | -#define HUAWEI_PRODUCT_E1406 0x1406 | ||
1017 | -#define HUAWEI_PRODUCT_E1407 0x1407 | ||
1018 | -#define HUAWEI_PRODUCT_E1408 0x1408 | ||
1019 | -#define HUAWEI_PRODUCT_E1409 0x1409 | ||
1020 | -#define HUAWEI_PRODUCT_E140A 0x140A | ||
1021 | -#define HUAWEI_PRODUCT_E140B 0x140B | ||
1022 | -#define HUAWEI_PRODUCT_E140C 0x140C | ||
1023 | -#define HUAWEI_PRODUCT_E140D 0x140D | ||
1024 | -#define HUAWEI_PRODUCT_E140E 0x140E | ||
1025 | -#define HUAWEI_PRODUCT_E140F 0x140F | ||
1026 | -#define HUAWEI_PRODUCT_E1410 0x1410 | ||
1027 | -#define HUAWEI_PRODUCT_E1411 0x1411 | ||
1028 | -#define HUAWEI_PRODUCT_E1412 0x1412 | ||
1029 | -#define HUAWEI_PRODUCT_E1413 0x1413 | ||
1030 | -#define HUAWEI_PRODUCT_E1414 0x1414 | ||
1031 | -#define HUAWEI_PRODUCT_E1415 0x1415 | ||
1032 | -#define HUAWEI_PRODUCT_E1416 0x1416 | ||
1033 | -#define HUAWEI_PRODUCT_E1417 0x1417 | ||
1034 | -#define HUAWEI_PRODUCT_E1418 0x1418 | ||
1035 | -#define HUAWEI_PRODUCT_E1419 0x1419 | ||
1036 | -#define HUAWEI_PRODUCT_E141A 0x141A | ||
1037 | -#define HUAWEI_PRODUCT_E141B 0x141B | ||
1038 | -#define HUAWEI_PRODUCT_E141C 0x141C | ||
1039 | -#define HUAWEI_PRODUCT_E141D 0x141D | ||
1040 | -#define HUAWEI_PRODUCT_E141E 0x141E | ||
1041 | -#define HUAWEI_PRODUCT_E141F 0x141F | ||
1042 | -#define HUAWEI_PRODUCT_E1420 0x1420 | ||
1043 | -#define HUAWEI_PRODUCT_E1421 0x1421 | ||
1044 | -#define HUAWEI_PRODUCT_E1422 0x1422 | ||
1045 | -#define HUAWEI_PRODUCT_E1423 0x1423 | ||
1046 | -#define HUAWEI_PRODUCT_E1424 0x1424 | ||
1047 | -#define HUAWEI_PRODUCT_E1425 0x1425 | ||
1048 | -#define HUAWEI_PRODUCT_E1426 0x1426 | ||
1049 | -#define HUAWEI_PRODUCT_E1427 0x1427 | ||
1050 | -#define HUAWEI_PRODUCT_E1428 0x1428 | ||
1051 | -#define HUAWEI_PRODUCT_E1429 0x1429 | ||
1052 | -#define HUAWEI_PRODUCT_E142A 0x142A | ||
1053 | -#define HUAWEI_PRODUCT_E142B 0x142B | ||
1054 | -#define HUAWEI_PRODUCT_E142C 0x142C | ||
1055 | -#define HUAWEI_PRODUCT_E142D 0x142D | ||
1056 | -#define HUAWEI_PRODUCT_E142E 0x142E | ||
1057 | -#define HUAWEI_PRODUCT_E142F 0x142F | ||
1058 | -#define HUAWEI_PRODUCT_E1430 0x1430 | ||
1059 | -#define HUAWEI_PRODUCT_E1431 0x1431 | ||
1060 | -#define HUAWEI_PRODUCT_E1432 0x1432 | ||
1061 | -#define HUAWEI_PRODUCT_E1433 0x1433 | ||
1062 | -#define HUAWEI_PRODUCT_E1434 0x1434 | ||
1063 | -#define HUAWEI_PRODUCT_E1435 0x1435 | ||
1064 | -#define HUAWEI_PRODUCT_E1436 0x1436 | ||
1065 | -#define HUAWEI_PRODUCT_E1437 0x1437 | ||
1066 | -#define HUAWEI_PRODUCT_E1438 0x1438 | ||
1067 | -#define HUAWEI_PRODUCT_E1439 0x1439 | ||
1068 | -#define HUAWEI_PRODUCT_E143A 0x143A | ||
1069 | -#define HUAWEI_PRODUCT_E143B 0x143B | ||
1070 | -#define HUAWEI_PRODUCT_E143C 0x143C | ||
1071 | -#define HUAWEI_PRODUCT_E143D 0x143D | ||
1072 | -#define HUAWEI_PRODUCT_E143E 0x143E | ||
1073 | -#define HUAWEI_PRODUCT_E143F 0x143F | ||
1074 | #define HUAWEI_PRODUCT_K4505 0x1464 | ||
1075 | #define HUAWEI_PRODUCT_K3765 0x1465 | ||
1076 | -#define HUAWEI_PRODUCT_E14AC 0x14AC | ||
1077 | -#define HUAWEI_PRODUCT_K3806 0x14AE | ||
1078 | #define HUAWEI_PRODUCT_K4605 0x14C6 | ||
1079 | -#define HUAWEI_PRODUCT_K5005 0x14C8 | ||
1080 | -#define HUAWEI_PRODUCT_K3770 0x14C9 | ||
1081 | -#define HUAWEI_PRODUCT_K3771 0x14CA | ||
1082 | -#define HUAWEI_PRODUCT_K4510 0x14CB | ||
1083 | -#define HUAWEI_PRODUCT_K4511 0x14CC | ||
1084 | -#define HUAWEI_PRODUCT_ETS1220 0x1803 | ||
1085 | -#define HUAWEI_PRODUCT_E353 0x1506 | ||
1086 | -#define HUAWEI_PRODUCT_E173S 0x1C05 | ||
1087 | |||
1088 | #define QUANTA_VENDOR_ID 0x0408 | ||
1089 | #define QUANTA_PRODUCT_Q101 0xEA02 | ||
1090 | @@ -615,104 +539,123 @@ static const struct usb_device_id option_ids[] = { | ||
1091 | { USB_DEVICE(QUANTA_VENDOR_ID, QUANTA_PRODUCT_GLX) }, | ||
1092 | { USB_DEVICE(QUANTA_VENDOR_ID, QUANTA_PRODUCT_GKE) }, | ||
1093 | { USB_DEVICE(QUANTA_VENDOR_ID, QUANTA_PRODUCT_GLE) }, | ||
1094 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E600, 0xff, 0xff, 0xff) }, | ||
1095 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E220, 0xff, 0xff, 0xff) }, | ||
1096 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E220BIS, 0xff, 0xff, 0xff) }, | ||
1097 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E1401, 0xff, 0xff, 0xff) }, | ||
1098 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E1402, 0xff, 0xff, 0xff) }, | ||
1099 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E1403, 0xff, 0xff, 0xff) }, | ||
1100 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E1404, 0xff, 0xff, 0xff) }, | ||
1101 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E1405, 0xff, 0xff, 0xff) }, | ||
1102 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E1406, 0xff, 0xff, 0xff) }, | ||
1103 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E1407, 0xff, 0xff, 0xff) }, | ||
1104 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E1408, 0xff, 0xff, 0xff) }, | ||
1105 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E1409, 0xff, 0xff, 0xff) }, | ||
1106 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E140A, 0xff, 0xff, 0xff) }, | ||
1107 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E140B, 0xff, 0xff, 0xff) }, | ||
1108 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E140C, 0xff, 0xff, 0xff) }, | ||
1109 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E140D, 0xff, 0xff, 0xff) }, | ||
1110 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E140E, 0xff, 0xff, 0xff) }, | ||
1111 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E140F, 0xff, 0xff, 0xff) }, | ||
1112 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E1410, 0xff, 0xff, 0xff) }, | ||
1113 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E1411, 0xff, 0xff, 0xff) }, | ||
1114 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E1412, 0xff, 0xff, 0xff) }, | ||
1115 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E1413, 0xff, 0xff, 0xff) }, | ||
1116 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E1414, 0xff, 0xff, 0xff) }, | ||
1117 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E1415, 0xff, 0xff, 0xff) }, | ||
1118 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E1416, 0xff, 0xff, 0xff) }, | ||
1119 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E1417, 0xff, 0xff, 0xff) }, | ||
1120 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E1418, 0xff, 0xff, 0xff) }, | ||
1121 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E1419, 0xff, 0xff, 0xff) }, | ||
1122 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E141A, 0xff, 0xff, 0xff) }, | ||
1123 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E141B, 0xff, 0xff, 0xff) }, | ||
1124 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E141C, 0xff, 0xff, 0xff) }, | ||
1125 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E141D, 0xff, 0xff, 0xff) }, | ||
1126 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E141E, 0xff, 0xff, 0xff) }, | ||
1127 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E141F, 0xff, 0xff, 0xff) }, | ||
1128 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E1420, 0xff, 0xff, 0xff) }, | ||
1129 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E1421, 0xff, 0xff, 0xff) }, | ||
1130 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E1422, 0xff, 0xff, 0xff) }, | ||
1131 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E1423, 0xff, 0xff, 0xff) }, | ||
1132 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E1424, 0xff, 0xff, 0xff) }, | ||
1133 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E1425, 0xff, 0xff, 0xff) }, | ||
1134 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E1426, 0xff, 0xff, 0xff) }, | ||
1135 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E1427, 0xff, 0xff, 0xff) }, | ||
1136 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E1428, 0xff, 0xff, 0xff) }, | ||
1137 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E1429, 0xff, 0xff, 0xff) }, | ||
1138 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E142A, 0xff, 0xff, 0xff) }, | ||
1139 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E142B, 0xff, 0xff, 0xff) }, | ||
1140 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E142C, 0xff, 0xff, 0xff) }, | ||
1141 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E142D, 0xff, 0xff, 0xff) }, | ||
1142 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E142E, 0xff, 0xff, 0xff) }, | ||
1143 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E142F, 0xff, 0xff, 0xff) }, | ||
1144 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E1430, 0xff, 0xff, 0xff) }, | ||
1145 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E1431, 0xff, 0xff, 0xff) }, | ||
1146 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E1432, 0xff, 0xff, 0xff) }, | ||
1147 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E1433, 0xff, 0xff, 0xff) }, | ||
1148 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E1434, 0xff, 0xff, 0xff) }, | ||
1149 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E1435, 0xff, 0xff, 0xff) }, | ||
1150 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E1436, 0xff, 0xff, 0xff) }, | ||
1151 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E1437, 0xff, 0xff, 0xff) }, | ||
1152 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E1438, 0xff, 0xff, 0xff) }, | ||
1153 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E1439, 0xff, 0xff, 0xff) }, | ||
1154 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E143A, 0xff, 0xff, 0xff) }, | ||
1155 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E143B, 0xff, 0xff, 0xff) }, | ||
1156 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E143C, 0xff, 0xff, 0xff) }, | ||
1157 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E143D, 0xff, 0xff, 0xff) }, | ||
1158 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E143E, 0xff, 0xff, 0xff) }, | ||
1159 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E143F, 0xff, 0xff, 0xff) }, | ||
1160 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E173S, 0xff, 0xff, 0xff) }, | ||
1161 | { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_K4505, 0xff, 0xff, 0xff), | ||
1162 | .driver_info = (kernel_ulong_t) &huawei_cdc12_blacklist }, | ||
1163 | { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_K3765, 0xff, 0xff, 0xff), | ||
1164 | .driver_info = (kernel_ulong_t) &huawei_cdc12_blacklist }, | ||
1165 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_ETS1220, 0xff, 0xff, 0xff) }, | ||
1166 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E14AC, 0xff, 0xff, 0xff) }, | ||
1167 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_K3806, 0xff, 0xff, 0xff) }, | ||
1168 | { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_K4605, 0xff, 0xff, 0xff), | ||
1169 | .driver_info = (kernel_ulong_t) &huawei_cdc12_blacklist }, | ||
1170 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_K4605, 0xff, 0x01, 0x31) }, | ||
1171 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_K4605, 0xff, 0x01, 0x32) }, | ||
1172 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_K5005, 0xff, 0x01, 0x31) }, | ||
1173 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_K5005, 0xff, 0x01, 0x32) }, | ||
1174 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_K5005, 0xff, 0x01, 0x33) }, | ||
1175 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_K3770, 0xff, 0x02, 0x31) }, | ||
1176 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_K3770, 0xff, 0x02, 0x32) }, | ||
1177 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_K3771, 0xff, 0x02, 0x31) }, | ||
1178 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_K3771, 0xff, 0x02, 0x32) }, | ||
1179 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_K4510, 0xff, 0x01, 0x31) }, | ||
1180 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_K4510, 0xff, 0x01, 0x32) }, | ||
1181 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_K4511, 0xff, 0x01, 0x31) }, | ||
1182 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_K4511, 0xff, 0x01, 0x32) }, | ||
1183 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E353, 0xff, 0x01, 0x01) }, | ||
1184 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E353, 0xff, 0x01, 0x02) }, | ||
1185 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E353, 0xff, 0x01, 0x03) }, | ||
1186 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E353, 0xff, 0x01, 0x10) }, | ||
1187 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E353, 0xff, 0x01, 0x12) }, | ||
1188 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E353, 0xff, 0x01, 0x13) }, | ||
1189 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E353, 0xff, 0x02, 0x01) }, /* E398 3G Modem */ | ||
1190 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E353, 0xff, 0x02, 0x02) }, /* E398 3G PC UI Interface */ | ||
1191 | - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E353, 0xff, 0x02, 0x03) }, /* E398 3G Application Interface */ | ||
1192 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0xff, 0xff) }, | ||
1193 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x01) }, | ||
1194 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x02) }, | ||
1195 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x03) }, | ||
1196 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x04) }, | ||
1197 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x05) }, | ||
1198 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x06) }, | ||
1199 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x0A) }, | ||
1200 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x0B) }, | ||
1201 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x0D) }, | ||
1202 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x0E) }, | ||
1203 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x0F) }, | ||
1204 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x10) }, | ||
1205 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x12) }, | ||
1206 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x13) }, | ||
1207 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x14) }, | ||
1208 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x15) }, | ||
1209 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x17) }, | ||
1210 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x18) }, | ||
1211 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x19) }, | ||
1212 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x1A) }, | ||
1213 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x1B) }, | ||
1214 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x1C) }, | ||
1215 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x31) }, | ||
1216 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x32) }, | ||
1217 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x33) }, | ||
1218 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x34) }, | ||
1219 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x35) }, | ||
1220 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x36) }, | ||
1221 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x3A) }, | ||
1222 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x3B) }, | ||
1223 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x3D) }, | ||
1224 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x3E) }, | ||
1225 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x3F) }, | ||
1226 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x48) }, | ||
1227 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x49) }, | ||
1228 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x4A) }, | ||
1229 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x4B) }, | ||
1230 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x4C) }, | ||
1231 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x61) }, | ||
1232 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x62) }, | ||
1233 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x63) }, | ||
1234 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x64) }, | ||
1235 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x65) }, | ||
1236 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x66) }, | ||
1237 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x6A) }, | ||
1238 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x6B) }, | ||
1239 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x6D) }, | ||
1240 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x6E) }, | ||
1241 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x6F) }, | ||
1242 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x78) }, | ||
1243 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x79) }, | ||
1244 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x7A) }, | ||
1245 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x7B) }, | ||
1246 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x7C) }, | ||
1247 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x01) }, | ||
1248 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x02) }, | ||
1249 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x03) }, | ||
1250 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x04) }, | ||
1251 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x05) }, | ||
1252 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x06) }, | ||
1253 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x0A) }, | ||
1254 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x0B) }, | ||
1255 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x0D) }, | ||
1256 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x0E) }, | ||
1257 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x0F) }, | ||
1258 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x10) }, | ||
1259 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x12) }, | ||
1260 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x13) }, | ||
1261 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x14) }, | ||
1262 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x15) }, | ||
1263 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x17) }, | ||
1264 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x18) }, | ||
1265 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x19) }, | ||
1266 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x1A) }, | ||
1267 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x1B) }, | ||
1268 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x1C) }, | ||
1269 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x31) }, | ||
1270 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x32) }, | ||
1271 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x33) }, | ||
1272 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x34) }, | ||
1273 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x35) }, | ||
1274 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x36) }, | ||
1275 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x3A) }, | ||
1276 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x3B) }, | ||
1277 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x3D) }, | ||
1278 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x3E) }, | ||
1279 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x3F) }, | ||
1280 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x48) }, | ||
1281 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x49) }, | ||
1282 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x4A) }, | ||
1283 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x4B) }, | ||
1284 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x4C) }, | ||
1285 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x61) }, | ||
1286 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x62) }, | ||
1287 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x63) }, | ||
1288 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x64) }, | ||
1289 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x65) }, | ||
1290 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x66) }, | ||
1291 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x6A) }, | ||
1292 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x6B) }, | ||
1293 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x6D) }, | ||
1294 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x6E) }, | ||
1295 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x6F) }, | ||
1296 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x78) }, | ||
1297 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x79) }, | ||
1298 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x7A) }, | ||
1299 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x7B) }, | ||
1300 | + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x7C) }, | ||
1301 | + | ||
1302 | + | ||
1303 | { USB_DEVICE(NOVATELWIRELESS_VENDOR_ID, NOVATELWIRELESS_PRODUCT_V640) }, | ||
1304 | { USB_DEVICE(NOVATELWIRELESS_VENDOR_ID, NOVATELWIRELESS_PRODUCT_V620) }, | ||
1305 | { USB_DEVICE(NOVATELWIRELESS_VENDOR_ID, NOVATELWIRELESS_PRODUCT_V740) }, | ||
1306 | @@ -943,6 +886,8 @@ static const struct usb_device_id option_ids[] = { | ||
1307 | { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1010, 0xff, 0xff, 0xff), | ||
1308 | .driver_info = (kernel_ulong_t)&net_intf4_blacklist }, | ||
1309 | { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1012, 0xff, 0xff, 0xff) }, | ||
1310 | + { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1018, 0xff, 0xff, 0xff), | ||
1311 | + .driver_info = (kernel_ulong_t)&net_intf3_blacklist }, | ||
1312 | { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1057, 0xff, 0xff, 0xff) }, | ||
1313 | { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1058, 0xff, 0xff, 0xff) }, | ||
1314 | { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1059, 0xff, 0xff, 0xff) }, | ||
1315 | diff --git a/fs/ext4/extents.c b/fs/ext4/extents.c | ||
1316 | index 6b7daa4..8b384cc 100644 | ||
1317 | --- a/fs/ext4/extents.c | ||
1318 | +++ b/fs/ext4/extents.c | ||
1319 | @@ -2596,6 +2596,7 @@ cont: | ||
1320 | } | ||
1321 | path[0].p_depth = depth; | ||
1322 | path[0].p_hdr = ext_inode_hdr(inode); | ||
1323 | + i = 0; | ||
1324 | |||
1325 | if (ext4_ext_check(inode, path[0].p_hdr, depth)) { | ||
1326 | err = -EIO; | ||
1327 | diff --git a/fs/ext4/super.c b/fs/ext4/super.c | ||
1328 | index 7fe3869..12a278f 100644 | ||
1329 | --- a/fs/ext4/super.c | ||
1330 | +++ b/fs/ext4/super.c | ||
1331 | @@ -932,6 +932,7 @@ static struct inode *ext4_alloc_inode(struct super_block *sb) | ||
1332 | ei->i_reserved_meta_blocks = 0; | ||
1333 | ei->i_allocated_meta_blocks = 0; | ||
1334 | ei->i_da_metadata_calc_len = 0; | ||
1335 | + ei->i_da_metadata_calc_last_lblock = 0; | ||
1336 | spin_lock_init(&(ei->i_block_reservation_lock)); | ||
1337 | #ifdef CONFIG_QUOTA | ||
1338 | ei->i_reserved_quota = 0; | ||
1339 | @@ -2968,6 +2969,10 @@ static int count_overhead(struct super_block *sb, ext4_group_t grp, | ||
1340 | ext4_group_t i, ngroups = ext4_get_groups_count(sb); | ||
1341 | int s, j, count = 0; | ||
1342 | |||
1343 | + if (!EXT4_HAS_RO_COMPAT_FEATURE(sb, EXT4_FEATURE_RO_COMPAT_BIGALLOC)) | ||
1344 | + return (ext4_bg_has_super(sb, grp) + ext4_bg_num_gdb(sb, grp) + | ||
1345 | + sbi->s_itb_per_group + 2); | ||
1346 | + | ||
1347 | first_block = le32_to_cpu(sbi->s_es->s_first_data_block) + | ||
1348 | (grp * EXT4_BLOCKS_PER_GROUP(sb)); | ||
1349 | last_block = first_block + EXT4_BLOCKS_PER_GROUP(sb) - 1; | ||
1350 | @@ -4227,6 +4232,7 @@ static void ext4_clear_journal_err(struct super_block *sb, | ||
1351 | ext4_commit_super(sb, 1); | ||
1352 | |||
1353 | jbd2_journal_clear_err(journal); | ||
1354 | + jbd2_journal_update_sb_errno(journal); | ||
1355 | } | ||
1356 | } | ||
1357 | |||
1358 | diff --git a/fs/fuse/file.c b/fs/fuse/file.c | ||
1359 | index 504e61b..8e6381a 100644 | ||
1360 | --- a/fs/fuse/file.c | ||
1361 | +++ b/fs/fuse/file.c | ||
1362 | @@ -1698,7 +1698,7 @@ static int fuse_verify_ioctl_iov(struct iovec *iov, size_t count) | ||
1363 | size_t n; | ||
1364 | u32 max = FUSE_MAX_PAGES_PER_REQ << PAGE_SHIFT; | ||
1365 | |||
1366 | - for (n = 0; n < count; n++) { | ||
1367 | + for (n = 0; n < count; n++, iov++) { | ||
1368 | if (iov->iov_len > (size_t) max) | ||
1369 | return -ENOMEM; | ||
1370 | max -= iov->iov_len; | ||
1371 | diff --git a/fs/jbd2/journal.c b/fs/jbd2/journal.c | ||
1372 | index 1afb701..9956ac6 100644 | ||
1373 | --- a/fs/jbd2/journal.c | ||
1374 | +++ b/fs/jbd2/journal.c | ||
1375 | @@ -1340,7 +1340,7 @@ static void jbd2_mark_journal_empty(journal_t *journal) | ||
1376 | * Update a journal's errno. Write updated superblock to disk waiting for IO | ||
1377 | * to complete. | ||
1378 | */ | ||
1379 | -static void jbd2_journal_update_sb_errno(journal_t *journal) | ||
1380 | +void jbd2_journal_update_sb_errno(journal_t *journal) | ||
1381 | { | ||
1382 | journal_superblock_t *sb = journal->j_superblock; | ||
1383 | |||
1384 | @@ -1352,6 +1352,7 @@ static void jbd2_journal_update_sb_errno(journal_t *journal) | ||
1385 | |||
1386 | jbd2_write_superblock(journal, WRITE_SYNC); | ||
1387 | } | ||
1388 | +EXPORT_SYMBOL(jbd2_journal_update_sb_errno); | ||
1389 | |||
1390 | /* | ||
1391 | * Read the superblock for a given journal, performing initial | ||
1392 | diff --git a/include/drm/drm_pciids.h b/include/drm/drm_pciids.h | ||
1393 | index 81368ab..53392e8 100644 | ||
1394 | --- a/include/drm/drm_pciids.h | ||
1395 | +++ b/include/drm/drm_pciids.h | ||
1396 | @@ -217,9 +217,12 @@ | ||
1397 | {0x1002, 0x6800, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ | ||
1398 | {0x1002, 0x6801, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ | ||
1399 | {0x1002, 0x6802, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ | ||
1400 | + {0x1002, 0x6806, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN|RADEON_NEW_MEMMAP}, \ | ||
1401 | {0x1002, 0x6808, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN|RADEON_NEW_MEMMAP}, \ | ||
1402 | {0x1002, 0x6809, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN|RADEON_NEW_MEMMAP}, \ | ||
1403 | {0x1002, 0x6810, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN|RADEON_NEW_MEMMAP}, \ | ||
1404 | + {0x1002, 0x6816, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN|RADEON_NEW_MEMMAP}, \ | ||
1405 | + {0x1002, 0x6817, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN|RADEON_NEW_MEMMAP}, \ | ||
1406 | {0x1002, 0x6818, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN|RADEON_NEW_MEMMAP}, \ | ||
1407 | {0x1002, 0x6819, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN|RADEON_NEW_MEMMAP}, \ | ||
1408 | {0x1002, 0x6820, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ | ||
1409 | diff --git a/include/linux/jbd2.h b/include/linux/jbd2.h | ||
1410 | index 912c30a..2ed66ef 100644 | ||
1411 | --- a/include/linux/jbd2.h | ||
1412 | +++ b/include/linux/jbd2.h | ||
1413 | @@ -1091,6 +1091,7 @@ extern int jbd2_journal_destroy (journal_t *); | ||
1414 | extern int jbd2_journal_recover (journal_t *journal); | ||
1415 | extern int jbd2_journal_wipe (journal_t *, int); | ||
1416 | extern int jbd2_journal_skip_recovery (journal_t *); | ||
1417 | +extern void jbd2_journal_update_sb_errno(journal_t *); | ||
1418 | extern void jbd2_journal_update_sb_log_tail (journal_t *, tid_t, | ||
1419 | unsigned long, int); | ||
1420 | extern void __jbd2_journal_abort_hard (journal_t *); | ||
1421 | diff --git a/include/linux/usb.h b/include/linux/usb.h | ||
1422 | index 26229fd..4e8e668 100644 | ||
1423 | --- a/include/linux/usb.h | ||
1424 | +++ b/include/linux/usb.h | ||
1425 | @@ -783,6 +783,27 @@ static inline int usb_make_path(struct usb_device *dev, char *buf, size_t size) | ||
1426 | .bInterfaceSubClass = (sc), \ | ||
1427 | .bInterfaceProtocol = (pr) | ||
1428 | |||
1429 | +/** | ||
1430 | + * USB_VENDOR_AND_INTERFACE_INFO - describe a specific usb vendor with a class of usb interfaces | ||
1431 | + * @vend: the 16 bit USB Vendor ID | ||
1432 | + * @cl: bInterfaceClass value | ||
1433 | + * @sc: bInterfaceSubClass value | ||
1434 | + * @pr: bInterfaceProtocol value | ||
1435 | + * | ||
1436 | + * This macro is used to create a struct usb_device_id that matches a | ||
1437 | + * specific vendor with a specific class of interfaces. | ||
1438 | + * | ||
1439 | + * This is especially useful when explicitly matching devices that have | ||
1440 | + * vendor specific bDeviceClass values, but standards-compliant interfaces. | ||
1441 | + */ | ||
1442 | +#define USB_VENDOR_AND_INTERFACE_INFO(vend, cl, sc, pr) \ | ||
1443 | + .match_flags = USB_DEVICE_ID_MATCH_INT_INFO \ | ||
1444 | + | USB_DEVICE_ID_MATCH_VENDOR, \ | ||
1445 | + .idVendor = (vend), \ | ||
1446 | + .bInterfaceClass = (cl), \ | ||
1447 | + .bInterfaceSubClass = (sc), \ | ||
1448 | + .bInterfaceProtocol = (pr) | ||
1449 | + | ||
1450 | /* ----------------------------------------------------------------------- */ | ||
1451 | |||
1452 | /* Stuff for dynamic usb ids */ |