Magellan Linux

Contents of /trunk/kernel-alx/patches-4.9/0121-4.9.22-all-fixes.patch

Parent Directory Parent Directory | Revision Log Revision Log


Revision 2956 - (show annotations) (download)
Mon Jul 24 12:03:46 2017 UTC (6 years, 9 months ago) by niro
File size: 207889 byte(s)
-added patches-4.9
1 diff --git a/Documentation/devicetree/bindings/arm/arch_timer.txt b/Documentation/devicetree/bindings/arm/arch_timer.txt
2 index ef5fbe9a77c7..ad440a2b8051 100644
3 --- a/Documentation/devicetree/bindings/arm/arch_timer.txt
4 +++ b/Documentation/devicetree/bindings/arm/arch_timer.txt
5 @@ -38,6 +38,11 @@ to deliver its interrupts via SPIs.
6 architecturally-defined reset values. Only supported for 32-bit
7 systems which follow the ARMv7 architected reset values.
8
9 +- arm,no-tick-in-suspend : The main counter does not tick when the system is in
10 + low-power system suspend on some SoCs. This behavior does not match the
11 + Architecture Reference Manual's specification that the system counter "must
12 + be implemented in an always-on power domain."
13 +
14
15 Example:
16
17 diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
18 index b95696d748c7..4f7ae7555758 100644
19 --- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
20 +++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
21 @@ -28,6 +28,8 @@ The TCON acts as a timing controller for RGB, LVDS and TV interfaces.
22 Required properties:
23 - compatible: value must be either:
24 * allwinner,sun5i-a13-tcon
25 + * allwinner,sun6i-a31-tcon
26 + * allwinner,sun6i-a31s-tcon
27 * allwinner,sun8i-a33-tcon
28 - reg: base address and size of memory-mapped region
29 - interrupts: interrupt associated to this IP
30 @@ -50,7 +52,7 @@ Required properties:
31 second the block connected to the TCON channel 1 (usually the TV
32 encoder)
33
34 -On the A13, there is one more clock required:
35 +On SoCs other than the A33, there is one more clock required:
36 - 'tcon-ch1': The clock driving the TCON channel 1
37
38 DRC
39 @@ -87,6 +89,7 @@ system.
40 Required properties:
41 - compatible: value must be one of:
42 * allwinner,sun5i-a13-display-backend
43 + * allwinner,sun6i-a31-display-backend
44 * allwinner,sun8i-a33-display-backend
45 - reg: base address and size of the memory-mapped region.
46 - clocks: phandles to the clocks feeding the frontend and backend
47 @@ -117,6 +120,7 @@ deinterlacing and color space conversion.
48 Required properties:
49 - compatible: value must be one of:
50 * allwinner,sun5i-a13-display-frontend
51 + * allwinner,sun6i-a31-display-frontend
52 * allwinner,sun8i-a33-display-frontend
53 - reg: base address and size of the memory-mapped region.
54 - interrupts: interrupt associated to this IP
55 @@ -142,6 +146,8 @@ extra node.
56 Required properties:
57 - compatible: value must be one of:
58 * allwinner,sun5i-a13-display-engine
59 + * allwinner,sun6i-a31-display-engine
60 + * allwinner,sun6i-a31s-display-engine
61 * allwinner,sun8i-a33-display-engine
62
63 - allwinner,pipelines: list of phandle to the display engine
64 diff --git a/Documentation/devicetree/bindings/usb/usb-xhci.txt b/Documentation/devicetree/bindings/usb/usb-xhci.txt
65 index 966885c636d0..7790c819859a 100644
66 --- a/Documentation/devicetree/bindings/usb/usb-xhci.txt
67 +++ b/Documentation/devicetree/bindings/usb/usb-xhci.txt
68 @@ -26,6 +26,7 @@ Required properties:
69 Optional properties:
70 - clocks: reference to a clock
71 - usb3-lpm-capable: determines if platform is USB3 LPM capable
72 + - quirk-broken-port-ped: set if the controller has broken port disable mechanism
73
74 Example:
75 usb@f0931000 {
76 diff --git a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
77 index 8f3d96af81d7..1f6e101e299a 100644
78 --- a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
79 +++ b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
80 @@ -6,10 +6,11 @@ occurred.
81
82 Required properties:
83 - compatible : should be one among the following
84 - (a) "samsung,s3c2410-wdt" for Exynos4 and previous SoCs
85 - (b) "samsung,exynos5250-wdt" for Exynos5250
86 - (c) "samsung,exynos5420-wdt" for Exynos5420
87 - (c) "samsung,exynos7-wdt" for Exynos7
88 + - "samsung,s3c2410-wdt" for S3C2410
89 + - "samsung,s3c6410-wdt" for S3C6410, S5PV210 and Exynos4
90 + - "samsung,exynos5250-wdt" for Exynos5250
91 + - "samsung,exynos5420-wdt" for Exynos5420
92 + - "samsung,exynos7-wdt" for Exynos7
93
94 - reg : base physical address of the controller and length of memory mapped
95 region.
96 diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
97 index 65b05ba6ef98..a6fadef92d6d 100644
98 --- a/Documentation/kernel-parameters.txt
99 +++ b/Documentation/kernel-parameters.txt
100 @@ -305,6 +305,16 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
101 use by PCI
102 Format: <irq>,<irq>...
103
104 + acpi_mask_gpe= [HW,ACPI]
105 + Due to the existence of _Lxx/_Exx, some GPEs triggered
106 + by unsupported hardware/firmware features can result in
107 + GPE floodings that cannot be automatically disabled by
108 + the GPE dispatcher.
109 + This facility can be used to prevent such uncontrolled
110 + GPE floodings.
111 + Format: <int>
112 + Support masking of GPEs numbered from 0x00 to 0x7f.
113 +
114 acpi_no_auto_serialize [HW,ACPI]
115 Disable auto-serialization of AML methods
116 AML control methods that contain the opcodes to create
117 diff --git a/Documentation/stable_kernel_rules.txt b/Documentation/stable_kernel_rules.txt
118 index 4d82e31b7958..501af5d5feba 100644
119 --- a/Documentation/stable_kernel_rules.txt
120 +++ b/Documentation/stable_kernel_rules.txt
121 @@ -124,7 +124,7 @@ specified in the following format in the sign-off area:
122
123 .. code-block:: none
124
125 - Cc: <stable@vger.kernel.org> # 3.3.x-
126 + Cc: <stable@vger.kernel.org> # 3.3.x
127
128 The tag has the meaning of:
129
130 diff --git a/Makefile b/Makefile
131 index 1523557bd61f..4bf4648d97db 100644
132 --- a/Makefile
133 +++ b/Makefile
134 @@ -1,6 +1,6 @@
135 VERSION = 4
136 PATCHLEVEL = 9
137 -SUBLEVEL = 21
138 +SUBLEVEL = 22
139 EXTRAVERSION =
140 NAME = Roaring Lionus
141
142 @@ -370,7 +370,7 @@ LDFLAGS_MODULE =
143 CFLAGS_KERNEL =
144 AFLAGS_KERNEL =
145 LDFLAGS_vmlinux =
146 -CFLAGS_GCOV = -fprofile-arcs -ftest-coverage -fno-tree-loop-im -Wno-maybe-uninitialized
147 +CFLAGS_GCOV := -fprofile-arcs -ftest-coverage -fno-tree-loop-im $(call cc-disable-warning,maybe-uninitialized,)
148 CFLAGS_KCOV := $(call cc-option,-fsanitize-coverage=trace-pc,)
149
150
151 diff --git a/arch/arm/boot/dts/stih407-family.dtsi b/arch/arm/boot/dts/stih407-family.dtsi
152 index 8f79b4147bba..acdcbf99a22f 100644
153 --- a/arch/arm/boot/dts/stih407-family.dtsi
154 +++ b/arch/arm/boot/dts/stih407-family.dtsi
155 @@ -680,6 +680,7 @@
156 phy-names = "usb2-phy", "usb3-phy";
157 phys = <&usb2_picophy0>,
158 <&phy_port2 PHY_TYPE_USB3>;
159 + snps,dis_u3_susphy_quirk;
160 };
161 };
162
163 diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c
164 index 7e45f69a0ddc..8e8d20cdbce7 100644
165 --- a/arch/arm/kernel/armksyms.c
166 +++ b/arch/arm/kernel/armksyms.c
167 @@ -178,6 +178,6 @@ EXPORT_SYMBOL(__pv_offset);
168 #endif
169
170 #ifdef CONFIG_HAVE_ARM_SMCCC
171 -EXPORT_SYMBOL(arm_smccc_smc);
172 -EXPORT_SYMBOL(arm_smccc_hvc);
173 +EXPORT_SYMBOL(__arm_smccc_smc);
174 +EXPORT_SYMBOL(__arm_smccc_hvc);
175 #endif
176 diff --git a/arch/arm/kernel/smccc-call.S b/arch/arm/kernel/smccc-call.S
177 index 2e48b674aab1..e5d43066b889 100644
178 --- a/arch/arm/kernel/smccc-call.S
179 +++ b/arch/arm/kernel/smccc-call.S
180 @@ -46,17 +46,19 @@ UNWIND( .fnend)
181 /*
182 * void smccc_smc(unsigned long a0, unsigned long a1, unsigned long a2,
183 * unsigned long a3, unsigned long a4, unsigned long a5,
184 - * unsigned long a6, unsigned long a7, struct arm_smccc_res *res)
185 + * unsigned long a6, unsigned long a7, struct arm_smccc_res *res,
186 + * struct arm_smccc_quirk *quirk)
187 */
188 -ENTRY(arm_smccc_smc)
189 +ENTRY(__arm_smccc_smc)
190 SMCCC SMCCC_SMC
191 -ENDPROC(arm_smccc_smc)
192 +ENDPROC(__arm_smccc_smc)
193
194 /*
195 * void smccc_hvc(unsigned long a0, unsigned long a1, unsigned long a2,
196 * unsigned long a3, unsigned long a4, unsigned long a5,
197 - * unsigned long a6, unsigned long a7, struct arm_smccc_res *res)
198 + * unsigned long a6, unsigned long a7, struct arm_smccc_res *res,
199 + * struct arm_smccc_quirk *quirk)
200 */
201 -ENTRY(arm_smccc_hvc)
202 +ENTRY(__arm_smccc_hvc)
203 SMCCC SMCCC_HVC
204 -ENDPROC(arm_smccc_hvc)
205 +ENDPROC(__arm_smccc_hvc)
206 diff --git a/arch/arm/kvm/mmu.c b/arch/arm/kvm/mmu.c
207 index a5265edbeeab..2fd5c135e8a4 100644
208 --- a/arch/arm/kvm/mmu.c
209 +++ b/arch/arm/kvm/mmu.c
210 @@ -292,11 +292,18 @@ static void unmap_stage2_range(struct kvm *kvm, phys_addr_t start, u64 size)
211 phys_addr_t addr = start, end = start + size;
212 phys_addr_t next;
213
214 + assert_spin_locked(&kvm->mmu_lock);
215 pgd = kvm->arch.pgd + stage2_pgd_index(addr);
216 do {
217 next = stage2_pgd_addr_end(addr, end);
218 if (!stage2_pgd_none(*pgd))
219 unmap_stage2_puds(kvm, pgd, addr, next);
220 + /*
221 + * If the range is too large, release the kvm->mmu_lock
222 + * to prevent starvation and lockup detector warnings.
223 + */
224 + if (next != end)
225 + cond_resched_lock(&kvm->mmu_lock);
226 } while (pgd++, addr = next, addr != end);
227 }
228
229 @@ -803,6 +810,7 @@ void stage2_unmap_vm(struct kvm *kvm)
230 int idx;
231
232 idx = srcu_read_lock(&kvm->srcu);
233 + down_read(&current->mm->mmap_sem);
234 spin_lock(&kvm->mmu_lock);
235
236 slots = kvm_memslots(kvm);
237 @@ -810,6 +818,7 @@ void stage2_unmap_vm(struct kvm *kvm)
238 stage2_unmap_memslot(kvm, memslot);
239
240 spin_unlock(&kvm->mmu_lock);
241 + up_read(&current->mm->mmap_sem);
242 srcu_read_unlock(&kvm->srcu, idx);
243 }
244
245 @@ -829,7 +838,10 @@ void kvm_free_stage2_pgd(struct kvm *kvm)
246 if (kvm->arch.pgd == NULL)
247 return;
248
249 + spin_lock(&kvm->mmu_lock);
250 unmap_stage2_range(kvm, 0, KVM_PHYS_SIZE);
251 + spin_unlock(&kvm->mmu_lock);
252 +
253 /* Free the HW pgd, one page at a time */
254 free_pages_exact(kvm->arch.pgd, S2_PGD_SIZE);
255 kvm->arch.pgd = NULL;
256 @@ -1804,6 +1816,7 @@ int kvm_arch_prepare_memory_region(struct kvm *kvm,
257 (KVM_PHYS_SIZE >> PAGE_SHIFT))
258 return -EFAULT;
259
260 + down_read(&current->mm->mmap_sem);
261 /*
262 * A memory region could potentially cover multiple VMAs, and any holes
263 * between them, so iterate over all of them to find out if we can map
264 @@ -1847,8 +1860,10 @@ int kvm_arch_prepare_memory_region(struct kvm *kvm,
265 pa += vm_start - vma->vm_start;
266
267 /* IO region dirty page logging not allowed */
268 - if (memslot->flags & KVM_MEM_LOG_DIRTY_PAGES)
269 - return -EINVAL;
270 + if (memslot->flags & KVM_MEM_LOG_DIRTY_PAGES) {
271 + ret = -EINVAL;
272 + goto out;
273 + }
274
275 ret = kvm_phys_addr_ioremap(kvm, gpa, pa,
276 vm_end - vm_start,
277 @@ -1860,7 +1875,7 @@ int kvm_arch_prepare_memory_region(struct kvm *kvm,
278 } while (hva < reg_end);
279
280 if (change == KVM_MR_FLAGS_ONLY)
281 - return ret;
282 + goto out;
283
284 spin_lock(&kvm->mmu_lock);
285 if (ret)
286 @@ -1868,6 +1883,8 @@ int kvm_arch_prepare_memory_region(struct kvm *kvm,
287 else
288 stage2_flush_memslot(kvm, memslot);
289 spin_unlock(&kvm->mmu_lock);
290 +out:
291 + up_read(&current->mm->mmap_sem);
292 return ret;
293 }
294
295 diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c
296 index c9f7e9274aa8..aed44dcdfd30 100644
297 --- a/arch/arm/mach-davinci/da8xx-dt.c
298 +++ b/arch/arm/mach-davinci/da8xx-dt.c
299 @@ -46,6 +46,7 @@ static struct of_dev_auxdata da850_auxdata_lookup[] __initdata = {
300 static void __init da850_init_machine(void)
301 {
302 of_platform_default_populate(NULL, da850_auxdata_lookup, NULL);
303 + davinci_pm_init();
304 }
305
306 static const char *const da850_boards_compat[] __initconst = {
307 diff --git a/arch/arm64/boot/dts/hisilicon/hip06.dtsi b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
308 index af450413b9dd..f2eb12c6ed83 100644
309 --- a/arch/arm64/boot/dts/hisilicon/hip06.dtsi
310 +++ b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
311 @@ -590,7 +590,7 @@
312 reg = <0 0xa2000000 0 0x10000>;
313 sas-addr = [50 01 88 20 16 00 00 00];
314 hisilicon,sas-syscon = <&pcie_subctl>;
315 - am-max-trans;
316 + hip06-sas-v2-quirk-amt;
317 ctrl-reset-reg = <0xa18>;
318 ctrl-reset-sts-reg = <0x5a0c>;
319 ctrl-clock-ena-reg = <0x318>;
320 diff --git a/arch/arm64/kernel/arm64ksyms.c b/arch/arm64/kernel/arm64ksyms.c
321 index 78f368039c79..e9c4dc9e0ada 100644
322 --- a/arch/arm64/kernel/arm64ksyms.c
323 +++ b/arch/arm64/kernel/arm64ksyms.c
324 @@ -73,5 +73,5 @@ NOKPROBE_SYMBOL(_mcount);
325 #endif
326
327 /* arm-smccc */
328 -EXPORT_SYMBOL(arm_smccc_smc);
329 -EXPORT_SYMBOL(arm_smccc_hvc);
330 +EXPORT_SYMBOL(__arm_smccc_smc);
331 +EXPORT_SYMBOL(__arm_smccc_hvc);
332 diff --git a/arch/arm64/kernel/asm-offsets.c b/arch/arm64/kernel/asm-offsets.c
333 index 4a2f0f0fef32..c58ddf8c4062 100644
334 --- a/arch/arm64/kernel/asm-offsets.c
335 +++ b/arch/arm64/kernel/asm-offsets.c
336 @@ -140,8 +140,11 @@ int main(void)
337 DEFINE(SLEEP_STACK_DATA_SYSTEM_REGS, offsetof(struct sleep_stack_data, system_regs));
338 DEFINE(SLEEP_STACK_DATA_CALLEE_REGS, offsetof(struct sleep_stack_data, callee_saved_regs));
339 #endif
340 - DEFINE(ARM_SMCCC_RES_X0_OFFS, offsetof(struct arm_smccc_res, a0));
341 - DEFINE(ARM_SMCCC_RES_X2_OFFS, offsetof(struct arm_smccc_res, a2));
342 + DEFINE(ARM_SMCCC_RES_X0_OFFS, offsetof(struct arm_smccc_res, a0));
343 + DEFINE(ARM_SMCCC_RES_X2_OFFS, offsetof(struct arm_smccc_res, a2));
344 + DEFINE(ARM_SMCCC_QUIRK_ID_OFFS, offsetof(struct arm_smccc_quirk, id));
345 + DEFINE(ARM_SMCCC_QUIRK_STATE_OFFS, offsetof(struct arm_smccc_quirk, state));
346 +
347 BLANK();
348 DEFINE(HIBERN_PBE_ORIG, offsetof(struct pbe, orig_address));
349 DEFINE(HIBERN_PBE_ADDR, offsetof(struct pbe, address));
350 diff --git a/arch/arm64/kernel/pci.c b/arch/arm64/kernel/pci.c
351 index acf38722457b..409abc45bdb6 100644
352 --- a/arch/arm64/kernel/pci.c
353 +++ b/arch/arm64/kernel/pci.c
354 @@ -121,6 +121,7 @@ int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge)
355 static struct pci_config_window *
356 pci_acpi_setup_ecam_mapping(struct acpi_pci_root *root)
357 {
358 + struct device *dev = &root->device->dev;
359 struct resource *bus_res = &root->secondary;
360 u16 seg = root->segment;
361 struct pci_config_window *cfg;
362 @@ -132,8 +133,7 @@ pci_acpi_setup_ecam_mapping(struct acpi_pci_root *root)
363 root->mcfg_addr = pci_mcfg_lookup(seg, bus_res);
364
365 if (!root->mcfg_addr) {
366 - dev_err(&root->device->dev, "%04x:%pR ECAM region not found\n",
367 - seg, bus_res);
368 + dev_err(dev, "%04x:%pR ECAM region not found\n", seg, bus_res);
369 return NULL;
370 }
371
372 @@ -141,11 +141,10 @@ pci_acpi_setup_ecam_mapping(struct acpi_pci_root *root)
373 cfgres.start = root->mcfg_addr + bus_res->start * bsz;
374 cfgres.end = cfgres.start + resource_size(bus_res) * bsz - 1;
375 cfgres.flags = IORESOURCE_MEM;
376 - cfg = pci_ecam_create(&root->device->dev, &cfgres, bus_res,
377 - &pci_generic_ecam_ops);
378 + cfg = pci_ecam_create(dev, &cfgres, bus_res, &pci_generic_ecam_ops);
379 if (IS_ERR(cfg)) {
380 - dev_err(&root->device->dev, "%04x:%pR error %ld mapping ECAM\n",
381 - seg, bus_res, PTR_ERR(cfg));
382 + dev_err(dev, "%04x:%pR error %ld mapping ECAM\n", seg, bus_res,
383 + PTR_ERR(cfg));
384 return NULL;
385 }
386
387 @@ -159,33 +158,36 @@ static void pci_acpi_generic_release_info(struct acpi_pci_root_info *ci)
388
389 ri = container_of(ci, struct acpi_pci_generic_root_info, common);
390 pci_ecam_free(ri->cfg);
391 + kfree(ci->ops);
392 kfree(ri);
393 }
394
395 -static struct acpi_pci_root_ops acpi_pci_root_ops = {
396 - .release_info = pci_acpi_generic_release_info,
397 -};
398 -
399 /* Interface called from ACPI code to setup PCI host controller */
400 struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root)
401 {
402 int node = acpi_get_node(root->device->handle);
403 struct acpi_pci_generic_root_info *ri;
404 struct pci_bus *bus, *child;
405 + struct acpi_pci_root_ops *root_ops;
406
407 ri = kzalloc_node(sizeof(*ri), GFP_KERNEL, node);
408 if (!ri)
409 return NULL;
410
411 + root_ops = kzalloc_node(sizeof(*root_ops), GFP_KERNEL, node);
412 + if (!root_ops)
413 + return NULL;
414 +
415 ri->cfg = pci_acpi_setup_ecam_mapping(root);
416 if (!ri->cfg) {
417 kfree(ri);
418 + kfree(root_ops);
419 return NULL;
420 }
421
422 - acpi_pci_root_ops.pci_ops = &ri->cfg->ops->pci_ops;
423 - bus = acpi_pci_root_create(root, &acpi_pci_root_ops, &ri->common,
424 - ri->cfg);
425 + root_ops->release_info = pci_acpi_generic_release_info;
426 + root_ops->pci_ops = &ri->cfg->ops->pci_ops;
427 + bus = acpi_pci_root_create(root, root_ops, &ri->common, ri->cfg);
428 if (!bus)
429 return NULL;
430
431 diff --git a/arch/arm64/kernel/smccc-call.S b/arch/arm64/kernel/smccc-call.S
432 index ae0496fa4235..62522342e1e4 100644
433 --- a/arch/arm64/kernel/smccc-call.S
434 +++ b/arch/arm64/kernel/smccc-call.S
435 @@ -12,6 +12,7 @@
436 *
437 */
438 #include <linux/linkage.h>
439 +#include <linux/arm-smccc.h>
440 #include <asm/asm-offsets.h>
441
442 .macro SMCCC instr
443 @@ -20,24 +21,32 @@
444 ldr x4, [sp]
445 stp x0, x1, [x4, #ARM_SMCCC_RES_X0_OFFS]
446 stp x2, x3, [x4, #ARM_SMCCC_RES_X2_OFFS]
447 - ret
448 + ldr x4, [sp, #8]
449 + cbz x4, 1f /* no quirk structure */
450 + ldr x9, [x4, #ARM_SMCCC_QUIRK_ID_OFFS]
451 + cmp x9, #ARM_SMCCC_QUIRK_QCOM_A6
452 + b.ne 1f
453 + str x6, [x4, ARM_SMCCC_QUIRK_STATE_OFFS]
454 +1: ret
455 .cfi_endproc
456 .endm
457
458 /*
459 * void arm_smccc_smc(unsigned long a0, unsigned long a1, unsigned long a2,
460 * unsigned long a3, unsigned long a4, unsigned long a5,
461 - * unsigned long a6, unsigned long a7, struct arm_smccc_res *res)
462 + * unsigned long a6, unsigned long a7, struct arm_smccc_res *res,
463 + * struct arm_smccc_quirk *quirk)
464 */
465 -ENTRY(arm_smccc_smc)
466 +ENTRY(__arm_smccc_smc)
467 SMCCC smc
468 -ENDPROC(arm_smccc_smc)
469 +ENDPROC(__arm_smccc_smc)
470
471 /*
472 * void arm_smccc_hvc(unsigned long a0, unsigned long a1, unsigned long a2,
473 * unsigned long a3, unsigned long a4, unsigned long a5,
474 - * unsigned long a6, unsigned long a7, struct arm_smccc_res *res)
475 + * unsigned long a6, unsigned long a7, struct arm_smccc_res *res,
476 + * struct arm_smccc_quirk *quirk)
477 */
478 -ENTRY(arm_smccc_hvc)
479 +ENTRY(__arm_smccc_hvc)
480 SMCCC hvc
481 -ENDPROC(arm_smccc_hvc)
482 +ENDPROC(__arm_smccc_hvc)
483 diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm/fault.c
484 index 0f8788374815..8b8ac3db4092 100644
485 --- a/arch/arm64/mm/fault.c
486 +++ b/arch/arm64/mm/fault.c
487 @@ -41,7 +41,20 @@
488 #include <asm/pgtable.h>
489 #include <asm/tlbflush.h>
490
491 -static const char *fault_name(unsigned int esr);
492 +struct fault_info {
493 + int (*fn)(unsigned long addr, unsigned int esr,
494 + struct pt_regs *regs);
495 + int sig;
496 + int code;
497 + const char *name;
498 +};
499 +
500 +static const struct fault_info fault_info[];
501 +
502 +static inline const struct fault_info *esr_to_fault_info(unsigned int esr)
503 +{
504 + return fault_info + (esr & 63);
505 +}
506
507 #ifdef CONFIG_KPROBES
508 static inline int notify_page_fault(struct pt_regs *regs, unsigned int esr)
509 @@ -196,10 +209,12 @@ static void __do_user_fault(struct task_struct *tsk, unsigned long addr,
510 struct pt_regs *regs)
511 {
512 struct siginfo si;
513 + const struct fault_info *inf;
514
515 if (unhandled_signal(tsk, sig) && show_unhandled_signals_ratelimited()) {
516 + inf = esr_to_fault_info(esr);
517 pr_info("%s[%d]: unhandled %s (%d) at 0x%08lx, esr 0x%03x\n",
518 - tsk->comm, task_pid_nr(tsk), fault_name(esr), sig,
519 + tsk->comm, task_pid_nr(tsk), inf->name, sig,
520 addr, esr);
521 show_pte(tsk->mm, addr);
522 show_regs(regs);
523 @@ -218,14 +233,16 @@ static void do_bad_area(unsigned long addr, unsigned int esr, struct pt_regs *re
524 {
525 struct task_struct *tsk = current;
526 struct mm_struct *mm = tsk->active_mm;
527 + const struct fault_info *inf;
528
529 /*
530 * If we are in kernel mode at this point, we have no context to
531 * handle this fault with.
532 */
533 - if (user_mode(regs))
534 - __do_user_fault(tsk, addr, esr, SIGSEGV, SEGV_MAPERR, regs);
535 - else
536 + if (user_mode(regs)) {
537 + inf = esr_to_fault_info(esr);
538 + __do_user_fault(tsk, addr, esr, inf->sig, inf->code, regs);
539 + } else
540 __do_kernel_fault(mm, addr, esr, regs);
541 }
542
543 @@ -481,12 +498,7 @@ static int do_bad(unsigned long addr, unsigned int esr, struct pt_regs *regs)
544 return 1;
545 }
546
547 -static const struct fault_info {
548 - int (*fn)(unsigned long addr, unsigned int esr, struct pt_regs *regs);
549 - int sig;
550 - int code;
551 - const char *name;
552 -} fault_info[] = {
553 +static const struct fault_info fault_info[] = {
554 { do_bad, SIGBUS, 0, "ttbr address size fault" },
555 { do_bad, SIGBUS, 0, "level 1 address size fault" },
556 { do_bad, SIGBUS, 0, "level 2 address size fault" },
557 @@ -553,19 +565,13 @@ static const struct fault_info {
558 { do_bad, SIGBUS, 0, "unknown 63" },
559 };
560
561 -static const char *fault_name(unsigned int esr)
562 -{
563 - const struct fault_info *inf = fault_info + (esr & 63);
564 - return inf->name;
565 -}
566 -
567 /*
568 * Dispatch a data abort to the relevant handler.
569 */
570 asmlinkage void __exception do_mem_abort(unsigned long addr, unsigned int esr,
571 struct pt_regs *regs)
572 {
573 - const struct fault_info *inf = fault_info + (esr & 63);
574 + const struct fault_info *inf = esr_to_fault_info(esr);
575 struct siginfo info;
576
577 if (!inf->fn(addr, esr, regs))
578 diff --git a/arch/metag/include/asm/uaccess.h b/arch/metag/include/asm/uaccess.h
579 index 273e61225c27..07238b39638c 100644
580 --- a/arch/metag/include/asm/uaccess.h
581 +++ b/arch/metag/include/asm/uaccess.h
582 @@ -197,20 +197,21 @@ extern long __must_check strnlen_user(const char __user *src, long count);
583
584 #define strlen_user(str) strnlen_user(str, 32767)
585
586 -extern unsigned long __must_check __copy_user_zeroing(void *to,
587 - const void __user *from,
588 - unsigned long n);
589 +extern unsigned long raw_copy_from_user(void *to, const void __user *from,
590 + unsigned long n);
591
592 static inline unsigned long
593 copy_from_user(void *to, const void __user *from, unsigned long n)
594 {
595 + unsigned long res = n;
596 if (likely(access_ok(VERIFY_READ, from, n)))
597 - return __copy_user_zeroing(to, from, n);
598 - memset(to, 0, n);
599 - return n;
600 + res = raw_copy_from_user(to, from, n);
601 + if (unlikely(res))
602 + memset(to + (n - res), 0, res);
603 + return res;
604 }
605
606 -#define __copy_from_user(to, from, n) __copy_user_zeroing(to, from, n)
607 +#define __copy_from_user(to, from, n) raw_copy_from_user(to, from, n)
608 #define __copy_from_user_inatomic __copy_from_user
609
610 extern unsigned long __must_check __copy_user(void __user *to,
611 diff --git a/arch/metag/lib/usercopy.c b/arch/metag/lib/usercopy.c
612 index b3ebfe9c8e88..2792fc621088 100644
613 --- a/arch/metag/lib/usercopy.c
614 +++ b/arch/metag/lib/usercopy.c
615 @@ -29,7 +29,6 @@
616 COPY \
617 "1:\n" \
618 " .section .fixup,\"ax\"\n" \
619 - " MOV D1Ar1,#0\n" \
620 FIXUP \
621 " MOVT D1Ar1,#HI(1b)\n" \
622 " JUMP D1Ar1,#LO(1b)\n" \
623 @@ -260,27 +259,31 @@
624 "MGETL D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \
625 "22:\n" \
626 "MSETL [%0++], D0FrT, D0.5, D0.6, D0.7\n" \
627 - "SUB %3, %3, #32\n" \
628 "23:\n" \
629 - "MGETL D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \
630 + "SUB %3, %3, #32\n" \
631 "24:\n" \
632 + "MGETL D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \
633 + "25:\n" \
634 "MSETL [%0++], D0FrT, D0.5, D0.6, D0.7\n" \
635 + "26:\n" \
636 "SUB %3, %3, #32\n" \
637 "DCACHE [%1+#-64], D0Ar6\n" \
638 "BR $Lloop"id"\n" \
639 \
640 "MOV RAPF, %1\n" \
641 - "25:\n" \
642 + "27:\n" \
643 "MGETL D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \
644 - "26:\n" \
645 + "28:\n" \
646 "MSETL [%0++], D0FrT, D0.5, D0.6, D0.7\n" \
647 + "29:\n" \
648 "SUB %3, %3, #32\n" \
649 - "27:\n" \
650 + "30:\n" \
651 "MGETL D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \
652 - "28:\n" \
653 + "31:\n" \
654 "MSETL [%0++], D0FrT, D0.5, D0.6, D0.7\n" \
655 + "32:\n" \
656 "SUB %0, %0, #8\n" \
657 - "29:\n" \
658 + "33:\n" \
659 "SETL [%0++], D0.7, D1.7\n" \
660 "SUB %3, %3, #32\n" \
661 "1:" \
662 @@ -312,11 +315,15 @@
663 " .long 26b,3b\n" \
664 " .long 27b,3b\n" \
665 " .long 28b,3b\n" \
666 - " .long 29b,4b\n" \
667 + " .long 29b,3b\n" \
668 + " .long 30b,3b\n" \
669 + " .long 31b,3b\n" \
670 + " .long 32b,3b\n" \
671 + " .long 33b,4b\n" \
672 " .previous\n" \
673 : "=r" (to), "=r" (from), "=r" (ret), "=d" (n) \
674 : "0" (to), "1" (from), "2" (ret), "3" (n) \
675 - : "D1Ar1", "D0Ar2", "memory")
676 + : "D1Ar1", "D0Ar2", "cc", "memory")
677
678 /* rewind 'to' and 'from' pointers when a fault occurs
679 *
680 @@ -342,7 +349,7 @@
681 #define __asm_copy_to_user_64bit_rapf_loop(to, from, ret, n, id)\
682 __asm_copy_user_64bit_rapf_loop(to, from, ret, n, id, \
683 "LSR D0Ar2, D0Ar2, #8\n" \
684 - "AND D0Ar2, D0Ar2, #0x7\n" \
685 + "ANDS D0Ar2, D0Ar2, #0x7\n" \
686 "ADDZ D0Ar2, D0Ar2, #4\n" \
687 "SUB D0Ar2, D0Ar2, #1\n" \
688 "MOV D1Ar1, #4\n" \
689 @@ -403,47 +410,55 @@
690 "MGETD D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \
691 "22:\n" \
692 "MSETD [%0++], D0FrT, D0.5, D0.6, D0.7\n" \
693 - "SUB %3, %3, #16\n" \
694 "23:\n" \
695 - "MGETD D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \
696 - "24:\n" \
697 - "MSETD [%0++], D0FrT, D0.5, D0.6, D0.7\n" \
698 "SUB %3, %3, #16\n" \
699 - "25:\n" \
700 + "24:\n" \
701 "MGETD D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \
702 - "26:\n" \
703 + "25:\n" \
704 "MSETD [%0++], D0FrT, D0.5, D0.6, D0.7\n" \
705 + "26:\n" \
706 "SUB %3, %3, #16\n" \
707 "27:\n" \
708 "MGETD D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \
709 "28:\n" \
710 "MSETD [%0++], D0FrT, D0.5, D0.6, D0.7\n" \
711 + "29:\n" \
712 + "SUB %3, %3, #16\n" \
713 + "30:\n" \
714 + "MGETD D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \
715 + "31:\n" \
716 + "MSETD [%0++], D0FrT, D0.5, D0.6, D0.7\n" \
717 + "32:\n" \
718 "SUB %3, %3, #16\n" \
719 "DCACHE [%1+#-64], D0Ar6\n" \
720 "BR $Lloop"id"\n" \
721 \
722 "MOV RAPF, %1\n" \
723 - "29:\n" \
724 + "33:\n" \
725 "MGETD D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \
726 - "30:\n" \
727 + "34:\n" \
728 "MSETD [%0++], D0FrT, D0.5, D0.6, D0.7\n" \
729 + "35:\n" \
730 "SUB %3, %3, #16\n" \
731 - "31:\n" \
732 + "36:\n" \
733 "MGETD D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \
734 - "32:\n" \
735 + "37:\n" \
736 "MSETD [%0++], D0FrT, D0.5, D0.6, D0.7\n" \
737 + "38:\n" \
738 "SUB %3, %3, #16\n" \
739 - "33:\n" \
740 + "39:\n" \
741 "MGETD D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \
742 - "34:\n" \
743 + "40:\n" \
744 "MSETD [%0++], D0FrT, D0.5, D0.6, D0.7\n" \
745 + "41:\n" \
746 "SUB %3, %3, #16\n" \
747 - "35:\n" \
748 + "42:\n" \
749 "MGETD D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \
750 - "36:\n" \
751 + "43:\n" \
752 "MSETD [%0++], D0FrT, D0.5, D0.6, D0.7\n" \
753 + "44:\n" \
754 "SUB %0, %0, #4\n" \
755 - "37:\n" \
756 + "45:\n" \
757 "SETD [%0++], D0.7\n" \
758 "SUB %3, %3, #16\n" \
759 "1:" \
760 @@ -483,11 +498,19 @@
761 " .long 34b,3b\n" \
762 " .long 35b,3b\n" \
763 " .long 36b,3b\n" \
764 - " .long 37b,4b\n" \
765 + " .long 37b,3b\n" \
766 + " .long 38b,3b\n" \
767 + " .long 39b,3b\n" \
768 + " .long 40b,3b\n" \
769 + " .long 41b,3b\n" \
770 + " .long 42b,3b\n" \
771 + " .long 43b,3b\n" \
772 + " .long 44b,3b\n" \
773 + " .long 45b,4b\n" \
774 " .previous\n" \
775 : "=r" (to), "=r" (from), "=r" (ret), "=d" (n) \
776 : "0" (to), "1" (from), "2" (ret), "3" (n) \
777 - : "D1Ar1", "D0Ar2", "memory")
778 + : "D1Ar1", "D0Ar2", "cc", "memory")
779
780 /* rewind 'to' and 'from' pointers when a fault occurs
781 *
782 @@ -513,7 +536,7 @@
783 #define __asm_copy_to_user_32bit_rapf_loop(to, from, ret, n, id)\
784 __asm_copy_user_32bit_rapf_loop(to, from, ret, n, id, \
785 "LSR D0Ar2, D0Ar2, #8\n" \
786 - "AND D0Ar2, D0Ar2, #0x7\n" \
787 + "ANDS D0Ar2, D0Ar2, #0x7\n" \
788 "ADDZ D0Ar2, D0Ar2, #4\n" \
789 "SUB D0Ar2, D0Ar2, #1\n" \
790 "MOV D1Ar1, #4\n" \
791 @@ -538,23 +561,31 @@ unsigned long __copy_user(void __user *pdst, const void *psrc,
792 if ((unsigned long) src & 1) {
793 __asm_copy_to_user_1(dst, src, retn);
794 n--;
795 + if (retn)
796 + return retn + n;
797 }
798 if ((unsigned long) dst & 1) {
799 /* Worst case - byte copy */
800 while (n > 0) {
801 __asm_copy_to_user_1(dst, src, retn);
802 n--;
803 + if (retn)
804 + return retn + n;
805 }
806 }
807 if (((unsigned long) src & 2) && n >= 2) {
808 __asm_copy_to_user_2(dst, src, retn);
809 n -= 2;
810 + if (retn)
811 + return retn + n;
812 }
813 if ((unsigned long) dst & 2) {
814 /* Second worst case - word copy */
815 while (n >= 2) {
816 __asm_copy_to_user_2(dst, src, retn);
817 n -= 2;
818 + if (retn)
819 + return retn + n;
820 }
821 }
822
823 @@ -569,6 +600,8 @@ unsigned long __copy_user(void __user *pdst, const void *psrc,
824 while (n >= 8) {
825 __asm_copy_to_user_8x64(dst, src, retn);
826 n -= 8;
827 + if (retn)
828 + return retn + n;
829 }
830 }
831 if (n >= RAPF_MIN_BUF_SIZE) {
832 @@ -581,6 +614,8 @@ unsigned long __copy_user(void __user *pdst, const void *psrc,
833 while (n >= 8) {
834 __asm_copy_to_user_8x64(dst, src, retn);
835 n -= 8;
836 + if (retn)
837 + return retn + n;
838 }
839 }
840 #endif
841 @@ -588,11 +623,15 @@ unsigned long __copy_user(void __user *pdst, const void *psrc,
842 while (n >= 16) {
843 __asm_copy_to_user_16(dst, src, retn);
844 n -= 16;
845 + if (retn)
846 + return retn + n;
847 }
848
849 while (n >= 4) {
850 __asm_copy_to_user_4(dst, src, retn);
851 n -= 4;
852 + if (retn)
853 + return retn + n;
854 }
855
856 switch (n) {
857 @@ -609,6 +648,10 @@ unsigned long __copy_user(void __user *pdst, const void *psrc,
858 break;
859 }
860
861 + /*
862 + * If we get here, retn correctly reflects the number of failing
863 + * bytes.
864 + */
865 return retn;
866 }
867 EXPORT_SYMBOL(__copy_user);
868 @@ -617,16 +660,14 @@ EXPORT_SYMBOL(__copy_user);
869 __asm_copy_user_cont(to, from, ret, \
870 " GETB D1Ar1,[%1++]\n" \
871 "2: SETB [%0++],D1Ar1\n", \
872 - "3: ADD %2,%2,#1\n" \
873 - " SETB [%0++],D1Ar1\n", \
874 + "3: ADD %2,%2,#1\n", \
875 " .long 2b,3b\n")
876
877 #define __asm_copy_from_user_2x_cont(to, from, ret, COPY, FIXUP, TENTRY) \
878 __asm_copy_user_cont(to, from, ret, \
879 " GETW D1Ar1,[%1++]\n" \
880 "2: SETW [%0++],D1Ar1\n" COPY, \
881 - "3: ADD %2,%2,#2\n" \
882 - " SETW [%0++],D1Ar1\n" FIXUP, \
883 + "3: ADD %2,%2,#2\n" FIXUP, \
884 " .long 2b,3b\n" TENTRY)
885
886 #define __asm_copy_from_user_2(to, from, ret) \
887 @@ -636,145 +677,26 @@ EXPORT_SYMBOL(__copy_user);
888 __asm_copy_from_user_2x_cont(to, from, ret, \
889 " GETB D1Ar1,[%1++]\n" \
890 "4: SETB [%0++],D1Ar1\n", \
891 - "5: ADD %2,%2,#1\n" \
892 - " SETB [%0++],D1Ar1\n", \
893 + "5: ADD %2,%2,#1\n", \
894 " .long 4b,5b\n")
895
896 #define __asm_copy_from_user_4x_cont(to, from, ret, COPY, FIXUP, TENTRY) \
897 __asm_copy_user_cont(to, from, ret, \
898 " GETD D1Ar1,[%1++]\n" \
899 "2: SETD [%0++],D1Ar1\n" COPY, \
900 - "3: ADD %2,%2,#4\n" \
901 - " SETD [%0++],D1Ar1\n" FIXUP, \
902 + "3: ADD %2,%2,#4\n" FIXUP, \
903 " .long 2b,3b\n" TENTRY)
904
905 #define __asm_copy_from_user_4(to, from, ret) \
906 __asm_copy_from_user_4x_cont(to, from, ret, "", "", "")
907
908 -#define __asm_copy_from_user_5(to, from, ret) \
909 - __asm_copy_from_user_4x_cont(to, from, ret, \
910 - " GETB D1Ar1,[%1++]\n" \
911 - "4: SETB [%0++],D1Ar1\n", \
912 - "5: ADD %2,%2,#1\n" \
913 - " SETB [%0++],D1Ar1\n", \
914 - " .long 4b,5b\n")
915 -
916 -#define __asm_copy_from_user_6x_cont(to, from, ret, COPY, FIXUP, TENTRY) \
917 - __asm_copy_from_user_4x_cont(to, from, ret, \
918 - " GETW D1Ar1,[%1++]\n" \
919 - "4: SETW [%0++],D1Ar1\n" COPY, \
920 - "5: ADD %2,%2,#2\n" \
921 - " SETW [%0++],D1Ar1\n" FIXUP, \
922 - " .long 4b,5b\n" TENTRY)
923 -
924 -#define __asm_copy_from_user_6(to, from, ret) \
925 - __asm_copy_from_user_6x_cont(to, from, ret, "", "", "")
926 -
927 -#define __asm_copy_from_user_7(to, from, ret) \
928 - __asm_copy_from_user_6x_cont(to, from, ret, \
929 - " GETB D1Ar1,[%1++]\n" \
930 - "6: SETB [%0++],D1Ar1\n", \
931 - "7: ADD %2,%2,#1\n" \
932 - " SETB [%0++],D1Ar1\n", \
933 - " .long 6b,7b\n")
934 -
935 -#define __asm_copy_from_user_8x_cont(to, from, ret, COPY, FIXUP, TENTRY) \
936 - __asm_copy_from_user_4x_cont(to, from, ret, \
937 - " GETD D1Ar1,[%1++]\n" \
938 - "4: SETD [%0++],D1Ar1\n" COPY, \
939 - "5: ADD %2,%2,#4\n" \
940 - " SETD [%0++],D1Ar1\n" FIXUP, \
941 - " .long 4b,5b\n" TENTRY)
942 -
943 -#define __asm_copy_from_user_8(to, from, ret) \
944 - __asm_copy_from_user_8x_cont(to, from, ret, "", "", "")
945 -
946 -#define __asm_copy_from_user_9(to, from, ret) \
947 - __asm_copy_from_user_8x_cont(to, from, ret, \
948 - " GETB D1Ar1,[%1++]\n" \
949 - "6: SETB [%0++],D1Ar1\n", \
950 - "7: ADD %2,%2,#1\n" \
951 - " SETB [%0++],D1Ar1\n", \
952 - " .long 6b,7b\n")
953 -
954 -#define __asm_copy_from_user_10x_cont(to, from, ret, COPY, FIXUP, TENTRY) \
955 - __asm_copy_from_user_8x_cont(to, from, ret, \
956 - " GETW D1Ar1,[%1++]\n" \
957 - "6: SETW [%0++],D1Ar1\n" COPY, \
958 - "7: ADD %2,%2,#2\n" \
959 - " SETW [%0++],D1Ar1\n" FIXUP, \
960 - " .long 6b,7b\n" TENTRY)
961 -
962 -#define __asm_copy_from_user_10(to, from, ret) \
963 - __asm_copy_from_user_10x_cont(to, from, ret, "", "", "")
964 -
965 -#define __asm_copy_from_user_11(to, from, ret) \
966 - __asm_copy_from_user_10x_cont(to, from, ret, \
967 - " GETB D1Ar1,[%1++]\n" \
968 - "8: SETB [%0++],D1Ar1\n", \
969 - "9: ADD %2,%2,#1\n" \
970 - " SETB [%0++],D1Ar1\n", \
971 - " .long 8b,9b\n")
972 -
973 -#define __asm_copy_from_user_12x_cont(to, from, ret, COPY, FIXUP, TENTRY) \
974 - __asm_copy_from_user_8x_cont(to, from, ret, \
975 - " GETD D1Ar1,[%1++]\n" \
976 - "6: SETD [%0++],D1Ar1\n" COPY, \
977 - "7: ADD %2,%2,#4\n" \
978 - " SETD [%0++],D1Ar1\n" FIXUP, \
979 - " .long 6b,7b\n" TENTRY)
980 -
981 -#define __asm_copy_from_user_12(to, from, ret) \
982 - __asm_copy_from_user_12x_cont(to, from, ret, "", "", "")
983 -
984 -#define __asm_copy_from_user_13(to, from, ret) \
985 - __asm_copy_from_user_12x_cont(to, from, ret, \
986 - " GETB D1Ar1,[%1++]\n" \
987 - "8: SETB [%0++],D1Ar1\n", \
988 - "9: ADD %2,%2,#1\n" \
989 - " SETB [%0++],D1Ar1\n", \
990 - " .long 8b,9b\n")
991 -
992 -#define __asm_copy_from_user_14x_cont(to, from, ret, COPY, FIXUP, TENTRY) \
993 - __asm_copy_from_user_12x_cont(to, from, ret, \
994 - " GETW D1Ar1,[%1++]\n" \
995 - "8: SETW [%0++],D1Ar1\n" COPY, \
996 - "9: ADD %2,%2,#2\n" \
997 - " SETW [%0++],D1Ar1\n" FIXUP, \
998 - " .long 8b,9b\n" TENTRY)
999 -
1000 -#define __asm_copy_from_user_14(to, from, ret) \
1001 - __asm_copy_from_user_14x_cont(to, from, ret, "", "", "")
1002 -
1003 -#define __asm_copy_from_user_15(to, from, ret) \
1004 - __asm_copy_from_user_14x_cont(to, from, ret, \
1005 - " GETB D1Ar1,[%1++]\n" \
1006 - "10: SETB [%0++],D1Ar1\n", \
1007 - "11: ADD %2,%2,#1\n" \
1008 - " SETB [%0++],D1Ar1\n", \
1009 - " .long 10b,11b\n")
1010 -
1011 -#define __asm_copy_from_user_16x_cont(to, from, ret, COPY, FIXUP, TENTRY) \
1012 - __asm_copy_from_user_12x_cont(to, from, ret, \
1013 - " GETD D1Ar1,[%1++]\n" \
1014 - "8: SETD [%0++],D1Ar1\n" COPY, \
1015 - "9: ADD %2,%2,#4\n" \
1016 - " SETD [%0++],D1Ar1\n" FIXUP, \
1017 - " .long 8b,9b\n" TENTRY)
1018 -
1019 -#define __asm_copy_from_user_16(to, from, ret) \
1020 - __asm_copy_from_user_16x_cont(to, from, ret, "", "", "")
1021 -
1022 #define __asm_copy_from_user_8x64(to, from, ret) \
1023 asm volatile ( \
1024 " GETL D0Ar2,D1Ar1,[%1++]\n" \
1025 "2: SETL [%0++],D0Ar2,D1Ar1\n" \
1026 "1:\n" \
1027 " .section .fixup,\"ax\"\n" \
1028 - " MOV D1Ar1,#0\n" \
1029 - " MOV D0Ar2,#0\n" \
1030 "3: ADD %2,%2,#8\n" \
1031 - " SETL [%0++],D0Ar2,D1Ar1\n" \
1032 " MOVT D0Ar2,#HI(1b)\n" \
1033 " JUMP D0Ar2,#LO(1b)\n" \
1034 " .previous\n" \
1035 @@ -789,36 +711,57 @@ EXPORT_SYMBOL(__copy_user);
1036 *
1037 * Rationale:
1038 * A fault occurs while reading from user buffer, which is the
1039 - * source. Since the fault is at a single address, we only
1040 - * need to rewind by 8 bytes.
1041 + * source.
1042 * Since we don't write to kernel buffer until we read first,
1043 * the kernel buffer is at the right state and needn't be
1044 - * corrected.
1045 + * corrected, but the source must be rewound to the beginning of
1046 + * the block, which is LSM_STEP*8 bytes.
1047 + * LSM_STEP is bits 10:8 in TXSTATUS which is already read
1048 + * and stored in D0Ar2
1049 + *
1050 + * NOTE: If a fault occurs at the last operation in M{G,S}ETL
1051 + * LSM_STEP will be 0. ie: we do 4 writes in our case, if
1052 + * a fault happens at the 4th write, LSM_STEP will be 0
1053 + * instead of 4. The code copes with that.
1054 */
1055 #define __asm_copy_from_user_64bit_rapf_loop(to, from, ret, n, id) \
1056 __asm_copy_user_64bit_rapf_loop(to, from, ret, n, id, \
1057 - "SUB %1, %1, #8\n")
1058 + "LSR D0Ar2, D0Ar2, #5\n" \
1059 + "ANDS D0Ar2, D0Ar2, #0x38\n" \
1060 + "ADDZ D0Ar2, D0Ar2, #32\n" \
1061 + "SUB %1, %1, D0Ar2\n")
1062
1063 /* rewind 'from' pointer when a fault occurs
1064 *
1065 * Rationale:
1066 * A fault occurs while reading from user buffer, which is the
1067 - * source. Since the fault is at a single address, we only
1068 - * need to rewind by 4 bytes.
1069 + * source.
1070 * Since we don't write to kernel buffer until we read first,
1071 * the kernel buffer is at the right state and needn't be
1072 - * corrected.
1073 + * corrected, but the source must be rewound to the beginning of
1074 + * the block, which is LSM_STEP*4 bytes.
1075 + * LSM_STEP is bits 10:8 in TXSTATUS which is already read
1076 + * and stored in D0Ar2
1077 + *
1078 + * NOTE: If a fault occurs at the last operation in M{G,S}ETL
1079 + * LSM_STEP will be 0. ie: we do 4 writes in our case, if
1080 + * a fault happens at the 4th write, LSM_STEP will be 0
1081 + * instead of 4. The code copes with that.
1082 */
1083 #define __asm_copy_from_user_32bit_rapf_loop(to, from, ret, n, id) \
1084 __asm_copy_user_32bit_rapf_loop(to, from, ret, n, id, \
1085 - "SUB %1, %1, #4\n")
1086 + "LSR D0Ar2, D0Ar2, #6\n" \
1087 + "ANDS D0Ar2, D0Ar2, #0x1c\n" \
1088 + "ADDZ D0Ar2, D0Ar2, #16\n" \
1089 + "SUB %1, %1, D0Ar2\n")
1090
1091
1092 -/* Copy from user to kernel, zeroing the bytes that were inaccessible in
1093 - userland. The return-value is the number of bytes that were
1094 - inaccessible. */
1095 -unsigned long __copy_user_zeroing(void *pdst, const void __user *psrc,
1096 - unsigned long n)
1097 +/*
1098 + * Copy from user to kernel. The return-value is the number of bytes that were
1099 + * inaccessible.
1100 + */
1101 +unsigned long raw_copy_from_user(void *pdst, const void __user *psrc,
1102 + unsigned long n)
1103 {
1104 register char *dst asm ("A0.2") = pdst;
1105 register const char __user *src asm ("A1.2") = psrc;
1106 @@ -830,6 +773,8 @@ unsigned long __copy_user_zeroing(void *pdst, const void __user *psrc,
1107 if ((unsigned long) src & 1) {
1108 __asm_copy_from_user_1(dst, src, retn);
1109 n--;
1110 + if (retn)
1111 + return retn + n;
1112 }
1113 if ((unsigned long) dst & 1) {
1114 /* Worst case - byte copy */
1115 @@ -837,12 +782,14 @@ unsigned long __copy_user_zeroing(void *pdst, const void __user *psrc,
1116 __asm_copy_from_user_1(dst, src, retn);
1117 n--;
1118 if (retn)
1119 - goto copy_exception_bytes;
1120 + return retn + n;
1121 }
1122 }
1123 if (((unsigned long) src & 2) && n >= 2) {
1124 __asm_copy_from_user_2(dst, src, retn);
1125 n -= 2;
1126 + if (retn)
1127 + return retn + n;
1128 }
1129 if ((unsigned long) dst & 2) {
1130 /* Second worst case - word copy */
1131 @@ -850,16 +797,10 @@ unsigned long __copy_user_zeroing(void *pdst, const void __user *psrc,
1132 __asm_copy_from_user_2(dst, src, retn);
1133 n -= 2;
1134 if (retn)
1135 - goto copy_exception_bytes;
1136 + return retn + n;
1137 }
1138 }
1139
1140 - /* We only need one check after the unalignment-adjustments,
1141 - because if both adjustments were done, either both or
1142 - neither reference had an exception. */
1143 - if (retn != 0)
1144 - goto copy_exception_bytes;
1145 -
1146 #ifdef USE_RAPF
1147 /* 64 bit copy loop */
1148 if (!(((unsigned long) src | (unsigned long) dst) & 7)) {
1149 @@ -872,7 +813,7 @@ unsigned long __copy_user_zeroing(void *pdst, const void __user *psrc,
1150 __asm_copy_from_user_8x64(dst, src, retn);
1151 n -= 8;
1152 if (retn)
1153 - goto copy_exception_bytes;
1154 + return retn + n;
1155 }
1156 }
1157
1158 @@ -888,7 +829,7 @@ unsigned long __copy_user_zeroing(void *pdst, const void __user *psrc,
1159 __asm_copy_from_user_8x64(dst, src, retn);
1160 n -= 8;
1161 if (retn)
1162 - goto copy_exception_bytes;
1163 + return retn + n;
1164 }
1165 }
1166 #endif
1167 @@ -898,7 +839,7 @@ unsigned long __copy_user_zeroing(void *pdst, const void __user *psrc,
1168 n -= 4;
1169
1170 if (retn)
1171 - goto copy_exception_bytes;
1172 + return retn + n;
1173 }
1174
1175 /* If we get here, there were no memory read faults. */
1176 @@ -924,21 +865,8 @@ unsigned long __copy_user_zeroing(void *pdst, const void __user *psrc,
1177 /* If we get here, retn correctly reflects the number of failing
1178 bytes. */
1179 return retn;
1180 -
1181 - copy_exception_bytes:
1182 - /* We already have "retn" bytes cleared, and need to clear the
1183 - remaining "n" bytes. A non-optimized simple byte-for-byte in-line
1184 - memset is preferred here, since this isn't speed-critical code and
1185 - we'd rather have this a leaf-function than calling memset. */
1186 - {
1187 - char *endp;
1188 - for (endp = dst + n; dst < endp; dst++)
1189 - *dst = 0;
1190 - }
1191 -
1192 - return retn + n;
1193 }
1194 -EXPORT_SYMBOL(__copy_user_zeroing);
1195 +EXPORT_SYMBOL(raw_copy_from_user);
1196
1197 #define __asm_clear_8x64(to, ret) \
1198 asm volatile ( \
1199 diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
1200 index b3c5bde43d34..9a6e11b6f457 100644
1201 --- a/arch/mips/Kconfig
1202 +++ b/arch/mips/Kconfig
1203 @@ -1526,7 +1526,7 @@ config CPU_MIPS64_R6
1204 select CPU_SUPPORTS_HIGHMEM
1205 select CPU_SUPPORTS_MSA
1206 select GENERIC_CSUM
1207 - select MIPS_O32_FP64_SUPPORT if MIPS32_O32
1208 + select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1209 select HAVE_KVM
1210 help
1211 Choose this option to build a kernel for release 6 or later of the
1212 diff --git a/arch/mips/include/asm/spinlock.h b/arch/mips/include/asm/spinlock.h
1213 index f485afe51514..a8df44d60607 100644
1214 --- a/arch/mips/include/asm/spinlock.h
1215 +++ b/arch/mips/include/asm/spinlock.h
1216 @@ -127,7 +127,7 @@ static inline void arch_spin_lock(arch_spinlock_t *lock)
1217 " andi %[ticket], %[ticket], 0xffff \n"
1218 " bne %[ticket], %[my_ticket], 4f \n"
1219 " subu %[ticket], %[my_ticket], %[ticket] \n"
1220 - "2: \n"
1221 + "2: .insn \n"
1222 " .subsection 2 \n"
1223 "4: andi %[ticket], %[ticket], 0xffff \n"
1224 " sll %[ticket], 5 \n"
1225 @@ -202,7 +202,7 @@ static inline unsigned int arch_spin_trylock(arch_spinlock_t *lock)
1226 " sc %[ticket], %[ticket_ptr] \n"
1227 " beqz %[ticket], 1b \n"
1228 " li %[ticket], 1 \n"
1229 - "2: \n"
1230 + "2: .insn \n"
1231 " .subsection 2 \n"
1232 "3: b 2b \n"
1233 " li %[ticket], 0 \n"
1234 @@ -382,7 +382,7 @@ static inline int arch_read_trylock(arch_rwlock_t *rw)
1235 " .set reorder \n"
1236 __WEAK_LLSC_MB
1237 " li %2, 1 \n"
1238 - "2: \n"
1239 + "2: .insn \n"
1240 : "=" GCC_OFF_SMALL_ASM() (rw->lock), "=&r" (tmp), "=&r" (ret)
1241 : GCC_OFF_SMALL_ASM() (rw->lock)
1242 : "memory");
1243 @@ -422,7 +422,7 @@ static inline int arch_write_trylock(arch_rwlock_t *rw)
1244 " lui %1, 0x8000 \n"
1245 " sc %1, %0 \n"
1246 " li %2, 1 \n"
1247 - "2: \n"
1248 + "2: .insn \n"
1249 : "=" GCC_OFF_SMALL_ASM() (rw->lock), "=&r" (tmp),
1250 "=&r" (ret)
1251 : GCC_OFF_SMALL_ASM() (rw->lock)
1252 diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
1253 index dd3175442c9e..921211bcd2ba 100644
1254 --- a/arch/mips/kernel/cpu-probe.c
1255 +++ b/arch/mips/kernel/cpu-probe.c
1256 @@ -1824,7 +1824,7 @@ static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu)
1257 }
1258
1259 decode_configs(c);
1260 - c->options |= MIPS_CPU_TLBINV | MIPS_CPU_LDPTE;
1261 + c->options |= MIPS_CPU_FTLB | MIPS_CPU_TLBINV | MIPS_CPU_LDPTE;
1262 c->writecombine = _CACHE_UNCACHED_ACCELERATED;
1263 break;
1264 default:
1265 diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
1266 index dc0b29612891..52a4fdfc8513 100644
1267 --- a/arch/mips/kernel/genex.S
1268 +++ b/arch/mips/kernel/genex.S
1269 @@ -448,7 +448,7 @@ NESTED(nmi_handler, PT_SIZE, sp)
1270 BUILD_HANDLER reserved reserved sti verbose /* others */
1271
1272 .align 5
1273 - LEAF(handle_ri_rdhwr_vivt)
1274 + LEAF(handle_ri_rdhwr_tlbp)
1275 .set push
1276 .set noat
1277 .set noreorder
1278 @@ -467,7 +467,7 @@ NESTED(nmi_handler, PT_SIZE, sp)
1279 .set pop
1280 bltz k1, handle_ri /* slow path */
1281 /* fall thru */
1282 - END(handle_ri_rdhwr_vivt)
1283 + END(handle_ri_rdhwr_tlbp)
1284
1285 LEAF(handle_ri_rdhwr)
1286 .set push
1287 diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
1288 index 3905003dfe2b..ec87ef93267b 100644
1289 --- a/arch/mips/kernel/traps.c
1290 +++ b/arch/mips/kernel/traps.c
1291 @@ -81,7 +81,7 @@ extern asmlinkage void handle_dbe(void);
1292 extern asmlinkage void handle_sys(void);
1293 extern asmlinkage void handle_bp(void);
1294 extern asmlinkage void handle_ri(void);
1295 -extern asmlinkage void handle_ri_rdhwr_vivt(void);
1296 +extern asmlinkage void handle_ri_rdhwr_tlbp(void);
1297 extern asmlinkage void handle_ri_rdhwr(void);
1298 extern asmlinkage void handle_cpu(void);
1299 extern asmlinkage void handle_ov(void);
1300 @@ -2352,9 +2352,18 @@ void __init trap_init(void)
1301
1302 set_except_vector(EXCCODE_SYS, handle_sys);
1303 set_except_vector(EXCCODE_BP, handle_bp);
1304 - set_except_vector(EXCCODE_RI, rdhwr_noopt ? handle_ri :
1305 - (cpu_has_vtag_icache ?
1306 - handle_ri_rdhwr_vivt : handle_ri_rdhwr));
1307 +
1308 + if (rdhwr_noopt)
1309 + set_except_vector(EXCCODE_RI, handle_ri);
1310 + else {
1311 + if (cpu_has_vtag_icache)
1312 + set_except_vector(EXCCODE_RI, handle_ri_rdhwr_tlbp);
1313 + else if (current_cpu_type() == CPU_LOONGSON3)
1314 + set_except_vector(EXCCODE_RI, handle_ri_rdhwr_tlbp);
1315 + else
1316 + set_except_vector(EXCCODE_RI, handle_ri_rdhwr);
1317 + }
1318 +
1319 set_except_vector(EXCCODE_CPU, handle_cpu);
1320 set_except_vector(EXCCODE_OV, handle_ov);
1321 set_except_vector(EXCCODE_TR, handle_tr);
1322 diff --git a/arch/mips/lantiq/xway/sysctrl.c b/arch/mips/lantiq/xway/sysctrl.c
1323 index 9a61671c00a7..90565477dfbd 100644
1324 --- a/arch/mips/lantiq/xway/sysctrl.c
1325 +++ b/arch/mips/lantiq/xway/sysctrl.c
1326 @@ -467,7 +467,7 @@ void __init ltq_soc_init(void)
1327
1328 if (!np_xbar)
1329 panic("Failed to load xbar nodes from devicetree");
1330 - if (of_address_to_resource(np_pmu, 0, &res_xbar))
1331 + if (of_address_to_resource(np_xbar, 0, &res_xbar))
1332 panic("Failed to get xbar resources");
1333 if (request_mem_region(res_xbar.start, resource_size(&res_xbar),
1334 res_xbar.name) < 0)
1335 diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
1336 index 88cfaf81c958..9d0107fbb169 100644
1337 --- a/arch/mips/mm/c-r4k.c
1338 +++ b/arch/mips/mm/c-r4k.c
1339 @@ -1558,6 +1558,7 @@ static void probe_vcache(void)
1340 vcache_size = c->vcache.sets * c->vcache.ways * c->vcache.linesz;
1341
1342 c->vcache.waybit = 0;
1343 + c->vcache.waysize = vcache_size / c->vcache.ways;
1344
1345 pr_info("Unified victim cache %ldkB %s, linesize %d bytes.\n",
1346 vcache_size >> 10, way_string[c->vcache.ways], c->vcache.linesz);
1347 @@ -1660,6 +1661,7 @@ static void __init loongson3_sc_init(void)
1348 /* Loongson-3 has 4 cores, 1MB scache for each. scaches are shared */
1349 scache_size *= 4;
1350 c->scache.waybit = 0;
1351 + c->scache.waysize = scache_size / c->scache.ways;
1352 pr_info("Unified secondary cache %ldkB %s, linesize %d bytes.\n",
1353 scache_size >> 10, way_string[c->scache.ways], c->scache.linesz);
1354 if (scache_size)
1355 diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
1356 index 55ce39606cb8..2da5649fc545 100644
1357 --- a/arch/mips/mm/tlbex.c
1358 +++ b/arch/mips/mm/tlbex.c
1359 @@ -762,7 +762,8 @@ static void build_huge_update_entries(u32 **p, unsigned int pte,
1360 static void build_huge_handler_tail(u32 **p, struct uasm_reloc **r,
1361 struct uasm_label **l,
1362 unsigned int pte,
1363 - unsigned int ptr)
1364 + unsigned int ptr,
1365 + unsigned int flush)
1366 {
1367 #ifdef CONFIG_SMP
1368 UASM_i_SC(p, pte, 0, ptr);
1369 @@ -771,6 +772,22 @@ static void build_huge_handler_tail(u32 **p, struct uasm_reloc **r,
1370 #else
1371 UASM_i_SW(p, pte, 0, ptr);
1372 #endif
1373 + if (cpu_has_ftlb && flush) {
1374 + BUG_ON(!cpu_has_tlbinv);
1375 +
1376 + UASM_i_MFC0(p, ptr, C0_ENTRYHI);
1377 + uasm_i_ori(p, ptr, ptr, MIPS_ENTRYHI_EHINV);
1378 + UASM_i_MTC0(p, ptr, C0_ENTRYHI);
1379 + build_tlb_write_entry(p, l, r, tlb_indexed);
1380 +
1381 + uasm_i_xori(p, ptr, ptr, MIPS_ENTRYHI_EHINV);
1382 + UASM_i_MTC0(p, ptr, C0_ENTRYHI);
1383 + build_huge_update_entries(p, pte, ptr);
1384 + build_huge_tlb_write_entry(p, l, r, pte, tlb_random, 0);
1385 +
1386 + return;
1387 + }
1388 +
1389 build_huge_update_entries(p, pte, ptr);
1390 build_huge_tlb_write_entry(p, l, r, pte, tlb_indexed, 0);
1391 }
1392 @@ -2197,7 +2214,7 @@ static void build_r4000_tlb_load_handler(void)
1393 uasm_l_tlbl_goaround2(&l, p);
1394 }
1395 uasm_i_ori(&p, wr.r1, wr.r1, (_PAGE_ACCESSED | _PAGE_VALID));
1396 - build_huge_handler_tail(&p, &r, &l, wr.r1, wr.r2);
1397 + build_huge_handler_tail(&p, &r, &l, wr.r1, wr.r2, 1);
1398 #endif
1399
1400 uasm_l_nopage_tlbl(&l, p);
1401 @@ -2252,7 +2269,7 @@ static void build_r4000_tlb_store_handler(void)
1402 build_tlb_probe_entry(&p);
1403 uasm_i_ori(&p, wr.r1, wr.r1,
1404 _PAGE_ACCESSED | _PAGE_MODIFIED | _PAGE_VALID | _PAGE_DIRTY);
1405 - build_huge_handler_tail(&p, &r, &l, wr.r1, wr.r2);
1406 + build_huge_handler_tail(&p, &r, &l, wr.r1, wr.r2, 1);
1407 #endif
1408
1409 uasm_l_nopage_tlbs(&l, p);
1410 @@ -2308,7 +2325,7 @@ static void build_r4000_tlb_modify_handler(void)
1411 build_tlb_probe_entry(&p);
1412 uasm_i_ori(&p, wr.r1, wr.r1,
1413 _PAGE_ACCESSED | _PAGE_MODIFIED | _PAGE_VALID | _PAGE_DIRTY);
1414 - build_huge_handler_tail(&p, &r, &l, wr.r1, wr.r2);
1415 + build_huge_handler_tail(&p, &r, &l, wr.r1, wr.r2, 0);
1416 #endif
1417
1418 uasm_l_nopage_tlbm(&l, p);
1419 diff --git a/arch/mips/ralink/rt3883.c b/arch/mips/ralink/rt3883.c
1420 index 3e0aa09c6b55..9e4631acfcb5 100644
1421 --- a/arch/mips/ralink/rt3883.c
1422 +++ b/arch/mips/ralink/rt3883.c
1423 @@ -36,7 +36,7 @@ static struct rt2880_pmx_func uartlite_func[] = { FUNC("uartlite", 0, 15, 2) };
1424 static struct rt2880_pmx_func jtag_func[] = { FUNC("jtag", 0, 17, 5) };
1425 static struct rt2880_pmx_func mdio_func[] = { FUNC("mdio", 0, 22, 2) };
1426 static struct rt2880_pmx_func lna_a_func[] = { FUNC("lna a", 0, 32, 3) };
1427 -static struct rt2880_pmx_func lna_g_func[] = { FUNC("lna a", 0, 35, 3) };
1428 +static struct rt2880_pmx_func lna_g_func[] = { FUNC("lna g", 0, 35, 3) };
1429 static struct rt2880_pmx_func pci_func[] = {
1430 FUNC("pci-dev", 0, 40, 32),
1431 FUNC("pci-host2", 1, 40, 32),
1432 @@ -44,7 +44,7 @@ static struct rt2880_pmx_func pci_func[] = {
1433 FUNC("pci-fnc", 3, 40, 32)
1434 };
1435 static struct rt2880_pmx_func ge1_func[] = { FUNC("ge1", 0, 72, 12) };
1436 -static struct rt2880_pmx_func ge2_func[] = { FUNC("ge1", 0, 84, 12) };
1437 +static struct rt2880_pmx_func ge2_func[] = { FUNC("ge2", 0, 84, 12) };
1438
1439 static struct rt2880_pmx_group rt3883_pinmux_data[] = {
1440 GRP("i2c", i2c_func, 1, RT3883_GPIO_MODE_I2C),
1441 diff --git a/arch/nios2/kernel/prom.c b/arch/nios2/kernel/prom.c
1442 index 367c5426157b..3901b80d4420 100644
1443 --- a/arch/nios2/kernel/prom.c
1444 +++ b/arch/nios2/kernel/prom.c
1445 @@ -48,6 +48,13 @@ void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
1446 return alloc_bootmem_align(size, align);
1447 }
1448
1449 +int __init early_init_dt_reserve_memory_arch(phys_addr_t base, phys_addr_t size,
1450 + bool nomap)
1451 +{
1452 + reserve_bootmem(base, size, BOOTMEM_DEFAULT);
1453 + return 0;
1454 +}
1455 +
1456 void __init early_init_devtree(void *params)
1457 {
1458 __be32 *dtb = (u32 *)__dtb_start;
1459 diff --git a/arch/nios2/kernel/setup.c b/arch/nios2/kernel/setup.c
1460 index a4ff86d58d5c..6c4e351a7930 100644
1461 --- a/arch/nios2/kernel/setup.c
1462 +++ b/arch/nios2/kernel/setup.c
1463 @@ -195,6 +195,9 @@ void __init setup_arch(char **cmdline_p)
1464 }
1465 #endif /* CONFIG_BLK_DEV_INITRD */
1466
1467 + early_init_fdt_reserve_self();
1468 + early_init_fdt_scan_reserved_mem();
1469 +
1470 unflatten_and_copy_device_tree();
1471
1472 setup_cpuinfo();
1473 diff --git a/arch/powerpc/crypto/crc32c-vpmsum_glue.c b/arch/powerpc/crypto/crc32c-vpmsum_glue.c
1474 index 411994551afc..f058e0c3e4d4 100644
1475 --- a/arch/powerpc/crypto/crc32c-vpmsum_glue.c
1476 +++ b/arch/powerpc/crypto/crc32c-vpmsum_glue.c
1477 @@ -33,10 +33,13 @@ static u32 crc32c_vpmsum(u32 crc, unsigned char const *p, size_t len)
1478 }
1479
1480 if (len & ~VMX_ALIGN_MASK) {
1481 + preempt_disable();
1482 pagefault_disable();
1483 enable_kernel_altivec();
1484 crc = __crc32c_vpmsum(crc, p, len & ~VMX_ALIGN_MASK);
1485 + disable_kernel_altivec();
1486 pagefault_enable();
1487 + preempt_enable();
1488 }
1489
1490 tail = len & VMX_ALIGN_MASK;
1491 diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c
1492 index 033f3385fa49..b2da7c8baed7 100644
1493 --- a/arch/powerpc/kernel/align.c
1494 +++ b/arch/powerpc/kernel/align.c
1495 @@ -807,14 +807,25 @@ int fix_alignment(struct pt_regs *regs)
1496 nb = aligninfo[instr].len;
1497 flags = aligninfo[instr].flags;
1498
1499 - /* ldbrx/stdbrx overlap lfs/stfs in the DSISR unfortunately */
1500 - if (IS_XFORM(instruction) && ((instruction >> 1) & 0x3ff) == 532) {
1501 - nb = 8;
1502 - flags = LD+SW;
1503 - } else if (IS_XFORM(instruction) &&
1504 - ((instruction >> 1) & 0x3ff) == 660) {
1505 - nb = 8;
1506 - flags = ST+SW;
1507 + /*
1508 + * Handle some cases which give overlaps in the DSISR values.
1509 + */
1510 + if (IS_XFORM(instruction)) {
1511 + switch (get_xop(instruction)) {
1512 + case 532: /* ldbrx */
1513 + nb = 8;
1514 + flags = LD+SW;
1515 + break;
1516 + case 660: /* stdbrx */
1517 + nb = 8;
1518 + flags = ST+SW;
1519 + break;
1520 + case 20: /* lwarx */
1521 + case 84: /* ldarx */
1522 + case 116: /* lharx */
1523 + case 276: /* lqarx */
1524 + return 0; /* not emulated ever */
1525 + }
1526 }
1527
1528 /* Byteswap little endian loads and stores */
1529 diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S
1530 index 4f178671f230..4cefe6888b18 100644
1531 --- a/arch/powerpc/kernel/misc_64.S
1532 +++ b/arch/powerpc/kernel/misc_64.S
1533 @@ -67,7 +67,7 @@ PPC64_CACHES:
1534 * flush all bytes from start through stop-1 inclusive
1535 */
1536
1537 -_GLOBAL(flush_icache_range)
1538 +_GLOBAL_TOC(flush_icache_range)
1539 BEGIN_FTR_SECTION
1540 PURGE_PREFETCHED_INS
1541 blr
1542 @@ -120,7 +120,7 @@ EXPORT_SYMBOL(flush_icache_range)
1543 *
1544 * flush all bytes from start to stop-1 inclusive
1545 */
1546 -_GLOBAL(flush_dcache_range)
1547 +_GLOBAL_TOC(flush_dcache_range)
1548
1549 /*
1550 * Flush the data cache to memory
1551 diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
1552 index 8d586cff8a41..a12be60181bf 100644
1553 --- a/arch/powerpc/kernel/setup_64.c
1554 +++ b/arch/powerpc/kernel/setup_64.c
1555 @@ -245,6 +245,15 @@ static void cpu_ready_for_interrupts(void)
1556 mtspr(SPRN_LPCR, lpcr | LPCR_AIL_3);
1557 }
1558
1559 + /*
1560 + * Fixup HFSCR:TM based on CPU features. The bit is set by our
1561 + * early asm init because at that point we haven't updated our
1562 + * CPU features from firmware and device-tree. Here we have,
1563 + * so let's do it.
1564 + */
1565 + if (cpu_has_feature(CPU_FTR_HVMODE) && !cpu_has_feature(CPU_FTR_TM_COMP))
1566 + mtspr(SPRN_HFSCR, mfspr(SPRN_HFSCR) & ~HFSCR_TM);
1567 +
1568 /* Set IR and DR in PACA MSR */
1569 get_paca()->kernel_msr = MSR_KERNEL;
1570 }
1571 diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c
1572 index ad9fd5245be2..197f0a60334a 100644
1573 --- a/arch/powerpc/mm/hash_native_64.c
1574 +++ b/arch/powerpc/mm/hash_native_64.c
1575 @@ -636,6 +636,10 @@ static void native_flush_hash_range(unsigned long number, int local)
1576 unsigned long psize = batch->psize;
1577 int ssize = batch->ssize;
1578 int i;
1579 + unsigned int use_local;
1580 +
1581 + use_local = local && mmu_has_feature(MMU_FTR_TLBIEL) &&
1582 + mmu_psize_defs[psize].tlbiel && !cxl_ctx_in_use();
1583
1584 local_irq_save(flags);
1585
1586 @@ -665,8 +669,7 @@ static void native_flush_hash_range(unsigned long number, int local)
1587 } pte_iterate_hashed_end();
1588 }
1589
1590 - if (mmu_has_feature(MMU_FTR_TLBIEL) &&
1591 - mmu_psize_defs[psize].tlbiel && local) {
1592 + if (use_local) {
1593 asm volatile("ptesync":::"memory");
1594 for (i = 0; i < number; i++) {
1595 vpn = batch->vpn[i];
1596 diff --git a/arch/s390/boot/compressed/misc.c b/arch/s390/boot/compressed/misc.c
1597 index 4da604ebf6fd..ca15613eaaa4 100644
1598 --- a/arch/s390/boot/compressed/misc.c
1599 +++ b/arch/s390/boot/compressed/misc.c
1600 @@ -141,31 +141,34 @@ static void check_ipl_parmblock(void *start, unsigned long size)
1601
1602 unsigned long decompress_kernel(void)
1603 {
1604 - unsigned long output_addr;
1605 - unsigned char *output;
1606 + void *output, *kernel_end;
1607
1608 - output_addr = ((unsigned long) &_end + HEAP_SIZE + 4095UL) & -4096UL;
1609 - check_ipl_parmblock((void *) 0, output_addr + SZ__bss_start);
1610 - memset(&_bss, 0, &_ebss - &_bss);
1611 - free_mem_ptr = (unsigned long)&_end;
1612 - free_mem_end_ptr = free_mem_ptr + HEAP_SIZE;
1613 - output = (unsigned char *) output_addr;
1614 + output = (void *) ALIGN((unsigned long) &_end + HEAP_SIZE, PAGE_SIZE);
1615 + kernel_end = output + SZ__bss_start;
1616 + check_ipl_parmblock((void *) 0, (unsigned long) kernel_end);
1617
1618 #ifdef CONFIG_BLK_DEV_INITRD
1619 /*
1620 * Move the initrd right behind the end of the decompressed
1621 - * kernel image.
1622 + * kernel image. This also prevents initrd corruption caused by
1623 + * bss clearing since kernel_end will always be located behind the
1624 + * current bss section..
1625 */
1626 - if (INITRD_START && INITRD_SIZE &&
1627 - INITRD_START < (unsigned long) output + SZ__bss_start) {
1628 - check_ipl_parmblock(output + SZ__bss_start,
1629 - INITRD_START + INITRD_SIZE);
1630 - memmove(output + SZ__bss_start,
1631 - (void *) INITRD_START, INITRD_SIZE);
1632 - INITRD_START = (unsigned long) output + SZ__bss_start;
1633 + if (INITRD_START && INITRD_SIZE && kernel_end > (void *) INITRD_START) {
1634 + check_ipl_parmblock(kernel_end, INITRD_SIZE);
1635 + memmove(kernel_end, (void *) INITRD_START, INITRD_SIZE);
1636 + INITRD_START = (unsigned long) kernel_end;
1637 }
1638 #endif
1639
1640 + /*
1641 + * Clear bss section. free_mem_ptr and free_mem_end_ptr need to be
1642 + * initialized afterwards since they reside in bss.
1643 + */
1644 + memset(&_bss, 0, &_ebss - &_bss);
1645 + free_mem_ptr = (unsigned long) &_end;
1646 + free_mem_end_ptr = free_mem_ptr + HEAP_SIZE;
1647 +
1648 puts("Uncompressing Linux... ");
1649 __decompress(input_data, input_len, NULL, NULL, output, 0, NULL, error);
1650 puts("Ok, booting the kernel.\n");
1651 diff --git a/arch/s390/include/asm/uaccess.h b/arch/s390/include/asm/uaccess.h
1652 index 52d7c8709279..a7ef70220126 100644
1653 --- a/arch/s390/include/asm/uaccess.h
1654 +++ b/arch/s390/include/asm/uaccess.h
1655 @@ -144,7 +144,7 @@ unsigned long __must_check __copy_to_user(void __user *to, const void *from,
1656 " jg 2b\n" \
1657 ".popsection\n" \
1658 EX_TABLE(0b,3b) EX_TABLE(1b,3b) \
1659 - : "=d" (__rc), "=Q" (*(to)) \
1660 + : "=d" (__rc), "+Q" (*(to)) \
1661 : "d" (size), "Q" (*(from)), \
1662 "d" (__reg0), "K" (-EFAULT) \
1663 : "cc"); \
1664 diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c
1665 index e244c19a2451..067f9813fd2c 100644
1666 --- a/arch/x86/kernel/reboot.c
1667 +++ b/arch/x86/kernel/reboot.c
1668 @@ -223,6 +223,22 @@ static struct dmi_system_id __initdata reboot_dmi_table[] = {
1669 DMI_MATCH(DMI_BOARD_NAME, "P4S800"),
1670 },
1671 },
1672 + { /* Handle problems with rebooting on ASUS EeeBook X205TA */
1673 + .callback = set_acpi_reboot,
1674 + .ident = "ASUS EeeBook X205TA",
1675 + .matches = {
1676 + DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
1677 + DMI_MATCH(DMI_PRODUCT_NAME, "X205TA"),
1678 + },
1679 + },
1680 + { /* Handle problems with rebooting on ASUS EeeBook X205TAW */
1681 + .callback = set_acpi_reboot,
1682 + .ident = "ASUS EeeBook X205TAW",
1683 + .matches = {
1684 + DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
1685 + DMI_MATCH(DMI_PRODUCT_NAME, "X205TAW"),
1686 + },
1687 + },
1688
1689 /* Certec */
1690 { /* Handle problems with rebooting on Certec BPC600 */
1691 diff --git a/arch/xtensa/include/asm/page.h b/arch/xtensa/include/asm/page.h
1692 index 976b1d70edbc..4ddbfd57a7c8 100644
1693 --- a/arch/xtensa/include/asm/page.h
1694 +++ b/arch/xtensa/include/asm/page.h
1695 @@ -164,8 +164,21 @@ void copy_user_highpage(struct page *to, struct page *from,
1696
1697 #define ARCH_PFN_OFFSET (PHYS_OFFSET >> PAGE_SHIFT)
1698
1699 +#ifdef CONFIG_MMU
1700 +static inline unsigned long ___pa(unsigned long va)
1701 +{
1702 + unsigned long off = va - PAGE_OFFSET;
1703 +
1704 + if (off >= XCHAL_KSEG_SIZE)
1705 + off -= XCHAL_KSEG_SIZE;
1706 +
1707 + return off + PHYS_OFFSET;
1708 +}
1709 +#define __pa(x) ___pa((unsigned long)(x))
1710 +#else
1711 #define __pa(x) \
1712 ((unsigned long) (x) - PAGE_OFFSET + PHYS_OFFSET)
1713 +#endif
1714 #define __va(x) \
1715 ((void *)((unsigned long) (x) - PHYS_OFFSET + PAGE_OFFSET))
1716 #define pfn_valid(pfn) \
1717 diff --git a/drivers/acpi/button.c b/drivers/acpi/button.c
1718 index e19f530f1083..6d5a8c1d3132 100644
1719 --- a/drivers/acpi/button.c
1720 +++ b/drivers/acpi/button.c
1721 @@ -113,7 +113,7 @@ struct acpi_button {
1722
1723 static BLOCKING_NOTIFIER_HEAD(acpi_lid_notifier);
1724 static struct acpi_device *lid_device;
1725 -static u8 lid_init_state = ACPI_BUTTON_LID_INIT_METHOD;
1726 +static u8 lid_init_state = ACPI_BUTTON_LID_INIT_OPEN;
1727
1728 static unsigned long lid_report_interval __read_mostly = 500;
1729 module_param(lid_report_interval, ulong, 0644);
1730 diff --git a/drivers/acpi/internal.h b/drivers/acpi/internal.h
1731 index 1b41a2739dac..0c452265c111 100644
1732 --- a/drivers/acpi/internal.h
1733 +++ b/drivers/acpi/internal.h
1734 @@ -37,6 +37,7 @@ void acpi_amba_init(void);
1735 static inline void acpi_amba_init(void) {}
1736 #endif
1737 int acpi_sysfs_init(void);
1738 +void acpi_gpe_apply_masked_gpes(void);
1739 void acpi_container_init(void);
1740 void acpi_memory_hotplug_init(void);
1741 #ifdef CONFIG_ACPI_HOTPLUG_IOAPIC
1742 diff --git a/drivers/acpi/scan.c b/drivers/acpi/scan.c
1743 index 3d1856f1f4d0..5a2fdf156ec9 100644
1744 --- a/drivers/acpi/scan.c
1745 +++ b/drivers/acpi/scan.c
1746 @@ -2044,6 +2044,7 @@ int __init acpi_scan_init(void)
1747 }
1748 }
1749
1750 + acpi_gpe_apply_masked_gpes();
1751 acpi_update_all_gpes();
1752 acpi_ec_ecdt_start();
1753
1754 diff --git a/drivers/acpi/sleep.c b/drivers/acpi/sleep.c
1755 index 54abb26b7366..a4327af676fe 100644
1756 --- a/drivers/acpi/sleep.c
1757 +++ b/drivers/acpi/sleep.c
1758 @@ -130,6 +130,12 @@ void __init acpi_nvs_nosave_s3(void)
1759 nvs_nosave_s3 = true;
1760 }
1761
1762 +static int __init init_nvs_save_s3(const struct dmi_system_id *d)
1763 +{
1764 + nvs_nosave_s3 = false;
1765 + return 0;
1766 +}
1767 +
1768 /*
1769 * ACPI 1.0 wants us to execute _PTS before suspending devices, so we allow the
1770 * user to request that behavior by using the 'acpi_old_suspend_ordering'
1771 @@ -324,6 +330,19 @@ static struct dmi_system_id acpisleep_dmi_table[] __initdata = {
1772 DMI_MATCH(DMI_PRODUCT_NAME, "K54HR"),
1773 },
1774 },
1775 + /*
1776 + * https://bugzilla.kernel.org/show_bug.cgi?id=189431
1777 + * Lenovo G50-45 is a platform later than 2012, but needs nvs memory
1778 + * saving during S3.
1779 + */
1780 + {
1781 + .callback = init_nvs_save_s3,
1782 + .ident = "Lenovo G50-45",
1783 + .matches = {
1784 + DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
1785 + DMI_MATCH(DMI_PRODUCT_NAME, "80E3"),
1786 + },
1787 + },
1788 {},
1789 };
1790
1791 diff --git a/drivers/acpi/sysfs.c b/drivers/acpi/sysfs.c
1792 index 703c26e7022c..cf05ae973381 100644
1793 --- a/drivers/acpi/sysfs.c
1794 +++ b/drivers/acpi/sysfs.c
1795 @@ -708,6 +708,62 @@ static ssize_t counter_set(struct kobject *kobj,
1796 return result ? result : size;
1797 }
1798
1799 +/*
1800 + * A Quirk Mechanism for GPE Flooding Prevention:
1801 + *
1802 + * Quirks may be needed to prevent GPE flooding on a specific GPE. The
1803 + * flooding typically cannot be detected and automatically prevented by
1804 + * ACPI_GPE_DISPATCH_NONE check because there is a _Lxx/_Exx prepared in
1805 + * the AML tables. This normally indicates a feature gap in Linux, thus
1806 + * instead of providing endless quirk tables, we provide a boot parameter
1807 + * for those who want this quirk. For example, if the users want to prevent
1808 + * the GPE flooding for GPE 00, they need to specify the following boot
1809 + * parameter:
1810 + * acpi_mask_gpe=0x00
1811 + * The masking status can be modified by the following runtime controlling
1812 + * interface:
1813 + * echo unmask > /sys/firmware/acpi/interrupts/gpe00
1814 + */
1815 +
1816 +/*
1817 + * Currently, the GPE flooding prevention only supports to mask the GPEs
1818 + * numbered from 00 to 7f.
1819 + */
1820 +#define ACPI_MASKABLE_GPE_MAX 0x80
1821 +
1822 +static u64 __initdata acpi_masked_gpes;
1823 +
1824 +static int __init acpi_gpe_set_masked_gpes(char *val)
1825 +{
1826 + u8 gpe;
1827 +
1828 + if (kstrtou8(val, 0, &gpe) || gpe > ACPI_MASKABLE_GPE_MAX)
1829 + return -EINVAL;
1830 + acpi_masked_gpes |= ((u64)1<<gpe);
1831 +
1832 + return 1;
1833 +}
1834 +__setup("acpi_mask_gpe=", acpi_gpe_set_masked_gpes);
1835 +
1836 +void __init acpi_gpe_apply_masked_gpes(void)
1837 +{
1838 + acpi_handle handle;
1839 + acpi_status status;
1840 + u8 gpe;
1841 +
1842 + for (gpe = 0;
1843 + gpe < min_t(u8, ACPI_MASKABLE_GPE_MAX, acpi_current_gpe_count);
1844 + gpe++) {
1845 + if (acpi_masked_gpes & ((u64)1<<gpe)) {
1846 + status = acpi_get_gpe_device(gpe, &handle);
1847 + if (ACPI_SUCCESS(status)) {
1848 + pr_info("Masking GPE 0x%x.\n", gpe);
1849 + (void)acpi_mask_gpe(handle, gpe, TRUE);
1850 + }
1851 + }
1852 + }
1853 +}
1854 +
1855 void acpi_irq_stats_init(void)
1856 {
1857 acpi_status status;
1858 diff --git a/drivers/ata/ahci_da850.c b/drivers/ata/ahci_da850.c
1859 index 267a3d3e79f4..52f2674d5e89 100644
1860 --- a/drivers/ata/ahci_da850.c
1861 +++ b/drivers/ata/ahci_da850.c
1862 @@ -54,11 +54,42 @@ static void da850_sata_init(struct device *dev, void __iomem *pwrdn_reg,
1863 writel(val, ahci_base + SATA_P0PHYCR_REG);
1864 }
1865
1866 +static int ahci_da850_softreset(struct ata_link *link,
1867 + unsigned int *class, unsigned long deadline)
1868 +{
1869 + int pmp, ret;
1870 +
1871 + pmp = sata_srst_pmp(link);
1872 +
1873 + /*
1874 + * There's an issue with the SATA controller on da850 SoCs: if we
1875 + * enable Port Multiplier support, but the drive is connected directly
1876 + * to the board, it can't be detected. As a workaround: if PMP is
1877 + * enabled, we first call ahci_do_softreset() and pass it the result of
1878 + * sata_srst_pmp(). If this call fails, we retry with pmp = 0.
1879 + */
1880 + ret = ahci_do_softreset(link, class, pmp, deadline, ahci_check_ready);
1881 + if (pmp && ret == -EBUSY)
1882 + return ahci_do_softreset(link, class, 0,
1883 + deadline, ahci_check_ready);
1884 +
1885 + return ret;
1886 +}
1887 +
1888 +static struct ata_port_operations ahci_da850_port_ops = {
1889 + .inherits = &ahci_platform_ops,
1890 + .softreset = ahci_da850_softreset,
1891 + /*
1892 + * No need to override .pmp_softreset - it's only used for actual
1893 + * PMP-enabled ports.
1894 + */
1895 +};
1896 +
1897 static const struct ata_port_info ahci_da850_port_info = {
1898 .flags = AHCI_FLAG_COMMON,
1899 .pio_mask = ATA_PIO4,
1900 .udma_mask = ATA_UDMA6,
1901 - .port_ops = &ahci_platform_ops,
1902 + .port_ops = &ahci_da850_port_ops,
1903 };
1904
1905 static struct scsi_host_template ahci_platform_sht = {
1906 diff --git a/drivers/char/ppdev.c b/drivers/char/ppdev.c
1907 index 6af1ce04b3da..336d02a488cc 100644
1908 --- a/drivers/char/ppdev.c
1909 +++ b/drivers/char/ppdev.c
1910 @@ -84,8 +84,14 @@ struct pp_struct {
1911 struct ieee1284_info state;
1912 struct ieee1284_info saved_state;
1913 long default_inactivity;
1914 + int index;
1915 };
1916
1917 +/* should we use PARDEVICE_MAX here? */
1918 +static struct device *devices[PARPORT_MAX];
1919 +
1920 +static DEFINE_IDA(ida_index);
1921 +
1922 /* pp_struct.flags bitfields */
1923 #define PP_CLAIMED (1<<0)
1924 #define PP_EXCL (1<<1)
1925 @@ -287,6 +293,7 @@ static int register_device(int minor, struct pp_struct *pp)
1926 struct pardevice *pdev = NULL;
1927 char *name;
1928 struct pardev_cb ppdev_cb;
1929 + int index;
1930
1931 name = kasprintf(GFP_KERNEL, CHRDEV "%x", minor);
1932 if (name == NULL)
1933 @@ -299,20 +306,23 @@ static int register_device(int minor, struct pp_struct *pp)
1934 return -ENXIO;
1935 }
1936
1937 + index = ida_simple_get(&ida_index, 0, 0, GFP_KERNEL);
1938 memset(&ppdev_cb, 0, sizeof(ppdev_cb));
1939 ppdev_cb.irq_func = pp_irq;
1940 ppdev_cb.flags = (pp->flags & PP_EXCL) ? PARPORT_FLAG_EXCL : 0;
1941 ppdev_cb.private = pp;
1942 - pdev = parport_register_dev_model(port, name, &ppdev_cb, minor);
1943 + pdev = parport_register_dev_model(port, name, &ppdev_cb, index);
1944 parport_put_port(port);
1945
1946 if (!pdev) {
1947 printk(KERN_WARNING "%s: failed to register device!\n", name);
1948 + ida_simple_remove(&ida_index, index);
1949 kfree(name);
1950 return -ENXIO;
1951 }
1952
1953 pp->pdev = pdev;
1954 + pp->index = index;
1955 dev_dbg(&pdev->dev, "registered pardevice\n");
1956 return 0;
1957 }
1958 @@ -749,6 +759,7 @@ static int pp_release(struct inode *inode, struct file *file)
1959
1960 if (pp->pdev) {
1961 parport_unregister_device(pp->pdev);
1962 + ida_simple_remove(&ida_index, pp->index);
1963 pp->pdev = NULL;
1964 pr_debug(CHRDEV "%x: unregistered pardevice\n", minor);
1965 }
1966 @@ -789,13 +800,29 @@ static const struct file_operations pp_fops = {
1967
1968 static void pp_attach(struct parport *port)
1969 {
1970 - device_create(ppdev_class, port->dev, MKDEV(PP_MAJOR, port->number),
1971 - NULL, "parport%d", port->number);
1972 + struct device *ret;
1973 +
1974 + if (devices[port->number])
1975 + return;
1976 +
1977 + ret = device_create(ppdev_class, port->dev,
1978 + MKDEV(PP_MAJOR, port->number), NULL,
1979 + "parport%d", port->number);
1980 + if (IS_ERR(ret)) {
1981 + pr_err("Failed to create device parport%d\n",
1982 + port->number);
1983 + return;
1984 + }
1985 + devices[port->number] = ret;
1986 }
1987
1988 static void pp_detach(struct parport *port)
1989 {
1990 + if (!devices[port->number])
1991 + return;
1992 +
1993 device_destroy(ppdev_class, MKDEV(PP_MAJOR, port->number));
1994 + devices[port->number] = NULL;
1995 }
1996
1997 static int pp_probe(struct pardevice *par_dev)
1998 diff --git a/drivers/char/random.c b/drivers/char/random.c
1999 index d6876d506220..08d1dd58c0d2 100644
2000 --- a/drivers/char/random.c
2001 +++ b/drivers/char/random.c
2002 @@ -2042,63 +2042,65 @@ struct ctl_table random_table[] = {
2003 };
2004 #endif /* CONFIG_SYSCTL */
2005
2006 -static u32 random_int_secret[MD5_MESSAGE_BYTES / 4] ____cacheline_aligned;
2007 -
2008 -int random_int_secret_init(void)
2009 -{
2010 - get_random_bytes(random_int_secret, sizeof(random_int_secret));
2011 - return 0;
2012 -}
2013 -
2014 -static DEFINE_PER_CPU(__u32 [MD5_DIGEST_WORDS], get_random_int_hash)
2015 - __aligned(sizeof(unsigned long));
2016 +struct batched_entropy {
2017 + union {
2018 + unsigned long entropy_long[CHACHA20_BLOCK_SIZE / sizeof(unsigned long)];
2019 + unsigned int entropy_int[CHACHA20_BLOCK_SIZE / sizeof(unsigned int)];
2020 + };
2021 + unsigned int position;
2022 +};
2023
2024 /*
2025 - * Get a random word for internal kernel use only. Similar to urandom but
2026 - * with the goal of minimal entropy pool depletion. As a result, the random
2027 - * value is not cryptographically secure but for several uses the cost of
2028 - * depleting entropy is too high
2029 + * Get a random word for internal kernel use only. The quality of the random
2030 + * number is either as good as RDRAND or as good as /dev/urandom, with the
2031 + * goal of being quite fast and not depleting entropy.
2032 */
2033 -unsigned int get_random_int(void)
2034 +static DEFINE_PER_CPU(struct batched_entropy, batched_entropy_long);
2035 +unsigned long get_random_long(void)
2036 {
2037 - __u32 *hash;
2038 - unsigned int ret;
2039 + unsigned long ret;
2040 + struct batched_entropy *batch;
2041
2042 - if (arch_get_random_int(&ret))
2043 + if (arch_get_random_long(&ret))
2044 return ret;
2045
2046 - hash = get_cpu_var(get_random_int_hash);
2047 -
2048 - hash[0] += current->pid + jiffies + random_get_entropy();
2049 - md5_transform(hash, random_int_secret);
2050 - ret = hash[0];
2051 - put_cpu_var(get_random_int_hash);
2052 -
2053 + batch = &get_cpu_var(batched_entropy_long);
2054 + if (batch->position % ARRAY_SIZE(batch->entropy_long) == 0) {
2055 + extract_crng((u8 *)batch->entropy_long);
2056 + batch->position = 0;
2057 + }
2058 + ret = batch->entropy_long[batch->position++];
2059 + put_cpu_var(batched_entropy_long);
2060 return ret;
2061 }
2062 -EXPORT_SYMBOL(get_random_int);
2063 +EXPORT_SYMBOL(get_random_long);
2064
2065 -/*
2066 - * Same as get_random_int(), but returns unsigned long.
2067 - */
2068 -unsigned long get_random_long(void)
2069 +#if BITS_PER_LONG == 32
2070 +unsigned int get_random_int(void)
2071 {
2072 - __u32 *hash;
2073 - unsigned long ret;
2074 + return get_random_long();
2075 +}
2076 +#else
2077 +static DEFINE_PER_CPU(struct batched_entropy, batched_entropy_int);
2078 +unsigned int get_random_int(void)
2079 +{
2080 + unsigned int ret;
2081 + struct batched_entropy *batch;
2082
2083 - if (arch_get_random_long(&ret))
2084 + if (arch_get_random_int(&ret))
2085 return ret;
2086
2087 - hash = get_cpu_var(get_random_int_hash);
2088 -
2089 - hash[0] += current->pid + jiffies + random_get_entropy();
2090 - md5_transform(hash, random_int_secret);
2091 - ret = *(unsigned long *)hash;
2092 - put_cpu_var(get_random_int_hash);
2093 -
2094 + batch = &get_cpu_var(batched_entropy_int);
2095 + if (batch->position % ARRAY_SIZE(batch->entropy_int) == 0) {
2096 + extract_crng((u8 *)batch->entropy_int);
2097 + batch->position = 0;
2098 + }
2099 + ret = batch->entropy_int[batch->position++];
2100 + put_cpu_var(batched_entropy_int);
2101 return ret;
2102 }
2103 -EXPORT_SYMBOL(get_random_long);
2104 +#endif
2105 +EXPORT_SYMBOL(get_random_int);
2106
2107 /**
2108 * randomize_page - Generate a random, page aligned address
2109 diff --git a/drivers/clk/nxp/clk-lpc32xx.c b/drivers/clk/nxp/clk-lpc32xx.c
2110 index 34c97353cdeb..5b98ff9076f3 100644
2111 --- a/drivers/clk/nxp/clk-lpc32xx.c
2112 +++ b/drivers/clk/nxp/clk-lpc32xx.c
2113 @@ -1282,13 +1282,13 @@ static struct clk_hw_proto clk_hw_proto[LPC32XX_CLK_HW_MAX] = {
2114
2115 LPC32XX_DEFINE_MUX(PWM1_MUX, PWMCLK_CTRL, 1, 0x1, NULL, 0),
2116 LPC32XX_DEFINE_DIV(PWM1_DIV, PWMCLK_CTRL, 4, 4, NULL,
2117 - CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO),
2118 + CLK_DIVIDER_ONE_BASED),
2119 LPC32XX_DEFINE_GATE(PWM1_GATE, PWMCLK_CTRL, 0, 0),
2120 LPC32XX_DEFINE_COMPOSITE(PWM1, PWM1_MUX, PWM1_DIV, PWM1_GATE),
2121
2122 LPC32XX_DEFINE_MUX(PWM2_MUX, PWMCLK_CTRL, 3, 0x1, NULL, 0),
2123 LPC32XX_DEFINE_DIV(PWM2_DIV, PWMCLK_CTRL, 8, 4, NULL,
2124 - CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO),
2125 + CLK_DIVIDER_ONE_BASED),
2126 LPC32XX_DEFINE_GATE(PWM2_GATE, PWMCLK_CTRL, 2, 0),
2127 LPC32XX_DEFINE_COMPOSITE(PWM2, PWM2_MUX, PWM2_DIV, PWM2_GATE),
2128
2129 @@ -1335,8 +1335,7 @@ static struct clk_hw_proto clk_hw_proto[LPC32XX_CLK_HW_MAX] = {
2130 LPC32XX_DEFINE_GATE(USB_DIV_GATE, USB_CTRL, 17, 0),
2131 LPC32XX_DEFINE_COMPOSITE(USB_DIV, _NULL, USB_DIV_DIV, USB_DIV_GATE),
2132
2133 - LPC32XX_DEFINE_DIV(SD_DIV, MS_CTRL, 0, 4, NULL,
2134 - CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO),
2135 + LPC32XX_DEFINE_DIV(SD_DIV, MS_CTRL, 0, 4, NULL, CLK_DIVIDER_ONE_BASED),
2136 LPC32XX_DEFINE_CLK(SD_GATE, MS_CTRL, BIT(5) | BIT(9), BIT(5) | BIT(9),
2137 0x0, BIT(5) | BIT(9), 0x0, 0x0, clk_mask_ops),
2138 LPC32XX_DEFINE_COMPOSITE(SD, _NULL, SD_DIV, SD_GATE),
2139 @@ -1478,6 +1477,20 @@ static struct clk * __init lpc32xx_clk_register(u32 id)
2140 return clk;
2141 }
2142
2143 +static void __init lpc32xx_clk_div_quirk(u32 reg, u32 div_mask, u32 gate)
2144 +{
2145 + u32 val;
2146 +
2147 + regmap_read(clk_regmap, reg, &val);
2148 +
2149 + if (!(val & div_mask)) {
2150 + val &= ~gate;
2151 + val |= BIT(__ffs(div_mask));
2152 + }
2153 +
2154 + regmap_update_bits(clk_regmap, reg, gate | div_mask, val);
2155 +}
2156 +
2157 static void __init lpc32xx_clk_init(struct device_node *np)
2158 {
2159 unsigned int i;
2160 @@ -1517,6 +1530,17 @@ static void __init lpc32xx_clk_init(struct device_node *np)
2161 return;
2162 }
2163
2164 + /*
2165 + * Divider part of PWM and MS clocks requires a quirk to avoid
2166 + * a misinterpretation of formally valid zero value in register
2167 + * bitfield, which indicates another clock gate. Instead of
2168 + * adding complexity to a gate clock ensure that zero value in
2169 + * divider clock is never met in runtime.
2170 + */
2171 + lpc32xx_clk_div_quirk(LPC32XX_CLKPWR_PWMCLK_CTRL, 0xf0, BIT(0));
2172 + lpc32xx_clk_div_quirk(LPC32XX_CLKPWR_PWMCLK_CTRL, 0xf00, BIT(2));
2173 + lpc32xx_clk_div_quirk(LPC32XX_CLKPWR_MS_CTRL, 0xf, BIT(5) | BIT(9));
2174 +
2175 for (i = 1; i < LPC32XX_CLK_MAX; i++) {
2176 clk[i] = lpc32xx_clk_register(i);
2177 if (IS_ERR(clk[i])) {
2178 diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
2179 index 73c487da6d2a..a2503db7e533 100644
2180 --- a/drivers/clocksource/arm_arch_timer.c
2181 +++ b/drivers/clocksource/arm_arch_timer.c
2182 @@ -81,6 +81,7 @@ static struct clock_event_device __percpu *arch_timer_evt;
2183 static enum ppi_nr arch_timer_uses_ppi = VIRT_PPI;
2184 static bool arch_timer_c3stop;
2185 static bool arch_timer_mem_use_virtual;
2186 +static bool arch_counter_suspend_stop;
2187
2188 static bool evtstrm_enable = IS_ENABLED(CONFIG_ARM_ARCH_TIMER_EVTSTREAM);
2189
2190 @@ -576,7 +577,7 @@ static struct clocksource clocksource_counter = {
2191 .rating = 400,
2192 .read = arch_counter_read,
2193 .mask = CLOCKSOURCE_MASK(56),
2194 - .flags = CLOCK_SOURCE_IS_CONTINUOUS | CLOCK_SOURCE_SUSPEND_NONSTOP,
2195 + .flags = CLOCK_SOURCE_IS_CONTINUOUS,
2196 };
2197
2198 static struct cyclecounter cyclecounter = {
2199 @@ -616,6 +617,8 @@ static void __init arch_counter_register(unsigned type)
2200 arch_timer_read_counter = arch_counter_get_cntvct_mem;
2201 }
2202
2203 + if (!arch_counter_suspend_stop)
2204 + clocksource_counter.flags |= CLOCK_SOURCE_SUSPEND_NONSTOP;
2205 start_count = arch_timer_read_counter();
2206 clocksource_register_hz(&clocksource_counter, arch_timer_rate);
2207 cyclecounter.mult = clocksource_counter.mult;
2208 @@ -907,6 +910,10 @@ static int __init arch_timer_of_init(struct device_node *np)
2209 of_property_read_bool(np, "arm,cpu-registers-not-fw-configured"))
2210 arch_timer_uses_ppi = PHYS_SECURE_PPI;
2211
2212 + /* On some systems, the counter stops ticking when in suspend. */
2213 + arch_counter_suspend_stop = of_property_read_bool(np,
2214 + "arm,no-tick-in-suspend");
2215 +
2216 return arch_timer_init();
2217 }
2218 CLOCKSOURCE_OF_DECLARE(armv7_arch_timer, "arm,armv7-timer", arch_timer_of_init);
2219 diff --git a/drivers/firmware/qcom_scm-64.c b/drivers/firmware/qcom_scm-64.c
2220 index 4a0f5ead4fb5..1e2e5198db53 100644
2221 --- a/drivers/firmware/qcom_scm-64.c
2222 +++ b/drivers/firmware/qcom_scm-64.c
2223 @@ -91,6 +91,7 @@ static int qcom_scm_call(struct device *dev, u32 svc_id, u32 cmd_id,
2224 dma_addr_t args_phys = 0;
2225 void *args_virt = NULL;
2226 size_t alloc_len;
2227 + struct arm_smccc_quirk quirk = {.id = ARM_SMCCC_QUIRK_QCOM_A6};
2228
2229 if (unlikely(arglen > N_REGISTER_ARGS)) {
2230 alloc_len = N_EXT_QCOM_SCM_ARGS * sizeof(u64);
2231 @@ -131,10 +132,16 @@ static int qcom_scm_call(struct device *dev, u32 svc_id, u32 cmd_id,
2232 qcom_smccc_convention,
2233 ARM_SMCCC_OWNER_SIP, fn_id);
2234
2235 + quirk.state.a6 = 0;
2236 +
2237 do {
2238 - arm_smccc_smc(cmd, desc->arginfo, desc->args[0],
2239 - desc->args[1], desc->args[2], x5, 0, 0,
2240 - res);
2241 + arm_smccc_smc_quirk(cmd, desc->arginfo, desc->args[0],
2242 + desc->args[1], desc->args[2], x5,
2243 + quirk.state.a6, 0, res, &quirk);
2244 +
2245 + if (res->a0 == QCOM_SCM_INTERRUPTED)
2246 + cmd = res->a0;
2247 +
2248 } while (res->a0 == QCOM_SCM_INTERRUPTED);
2249
2250 mutex_unlock(&qcom_scm_lock);
2251 diff --git a/drivers/gpio/gpiolib-acpi.c b/drivers/gpio/gpiolib-acpi.c
2252 index 72a4b326fd0d..986248f7011a 100644
2253 --- a/drivers/gpio/gpiolib-acpi.c
2254 +++ b/drivers/gpio/gpiolib-acpi.c
2255 @@ -571,8 +571,10 @@ struct gpio_desc *acpi_find_gpio(struct device *dev,
2256 }
2257
2258 desc = acpi_get_gpiod_by_index(adev, propname, idx, &info);
2259 - if (!IS_ERR(desc) || (PTR_ERR(desc) == -EPROBE_DEFER))
2260 + if (!IS_ERR(desc))
2261 break;
2262 + if (PTR_ERR(desc) == -EPROBE_DEFER)
2263 + return ERR_CAST(desc);
2264 }
2265
2266 /* Then from plain _CRS GPIOs */
2267 diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
2268 index 7491180698d1..0bc0afb6321e 100644
2269 --- a/drivers/gpu/drm/drm_edid.c
2270 +++ b/drivers/gpu/drm/drm_edid.c
2271 @@ -90,7 +90,7 @@ struct detailed_mode_closure {
2272 #define LEVEL_GTF2 2
2273 #define LEVEL_CVT 3
2274
2275 -static struct edid_quirk {
2276 +static const struct edid_quirk {
2277 char vendor[4];
2278 int product_id;
2279 u32 quirks;
2280 @@ -1449,7 +1449,7 @@ EXPORT_SYMBOL(drm_edid_duplicate);
2281 *
2282 * Returns true if @vendor is in @edid, false otherwise
2283 */
2284 -static bool edid_vendor(struct edid *edid, char *vendor)
2285 +static bool edid_vendor(struct edid *edid, const char *vendor)
2286 {
2287 char edid_vendor[3];
2288
2289 @@ -1469,7 +1469,7 @@ static bool edid_vendor(struct edid *edid, char *vendor)
2290 */
2291 static u32 edid_get_quirks(struct edid *edid)
2292 {
2293 - struct edid_quirk *quirk;
2294 + const struct edid_quirk *quirk;
2295 int i;
2296
2297 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
2298 diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
2299 index 31e6edd08dd0..9e9488639af5 100644
2300 --- a/drivers/gpu/drm/i915/i915_pci.c
2301 +++ b/drivers/gpu/drm/i915/i915_pci.c
2302 @@ -417,6 +417,7 @@ static const struct pci_device_id pciidlist[] = {
2303 INTEL_VLV_IDS(&intel_valleyview_info),
2304 INTEL_BDW_GT12_IDS(&intel_broadwell_info),
2305 INTEL_BDW_GT3_IDS(&intel_broadwell_gt3_info),
2306 + INTEL_BDW_RSVD_IDS(&intel_broadwell_info),
2307 INTEL_CHV_IDS(&intel_cherryview_info),
2308 INTEL_SKL_GT1_IDS(&intel_skylake_info),
2309 INTEL_SKL_GT2_IDS(&intel_skylake_info),
2310 diff --git a/drivers/gpu/drm/mga/mga_dma.c b/drivers/gpu/drm/mga/mga_dma.c
2311 index 1f2f9ca25901..4556e2b13ac5 100644
2312 --- a/drivers/gpu/drm/mga/mga_dma.c
2313 +++ b/drivers/gpu/drm/mga/mga_dma.c
2314 @@ -392,6 +392,24 @@ int mga_driver_load(struct drm_device *dev, unsigned long flags)
2315 drm_mga_private_t *dev_priv;
2316 int ret;
2317
2318 + /* There are PCI versions of the G450. These cards have the
2319 + * same PCI ID as the AGP G450, but have an additional PCI-to-PCI
2320 + * bridge chip. We detect these cards, which are not currently
2321 + * supported by this driver, by looking at the device ID of the
2322 + * bus the "card" is on. If vendor is 0x3388 (Hint Corp) and the
2323 + * device is 0x0021 (HB6 Universal PCI-PCI bridge), we reject the
2324 + * device.
2325 + */
2326 + if ((dev->pdev->device == 0x0525) && dev->pdev->bus->self
2327 + && (dev->pdev->bus->self->vendor == 0x3388)
2328 + && (dev->pdev->bus->self->device == 0x0021)
2329 + && dev->agp) {
2330 + /* FIXME: This should be quirked in the pci core, but oh well
2331 + * the hw probably stopped existing. */
2332 + arch_phys_wc_del(dev->agp->agp_mtrr);
2333 + kfree(dev->agp);
2334 + dev->agp = NULL;
2335 + }
2336 dev_priv = kzalloc(sizeof(drm_mga_private_t), GFP_KERNEL);
2337 if (!dev_priv)
2338 return -ENOMEM;
2339 @@ -698,7 +716,7 @@ static int mga_do_pci_dma_bootstrap(struct drm_device *dev,
2340 static int mga_do_dma_bootstrap(struct drm_device *dev,
2341 drm_mga_dma_bootstrap_t *dma_bs)
2342 {
2343 - const int is_agp = (dma_bs->agp_mode != 0) && drm_pci_device_is_agp(dev);
2344 + const int is_agp = (dma_bs->agp_mode != 0) && dev->agp;
2345 int err;
2346 drm_mga_private_t *const dev_priv =
2347 (drm_mga_private_t *) dev->dev_private;
2348 diff --git a/drivers/gpu/drm/mga/mga_drv.c b/drivers/gpu/drm/mga/mga_drv.c
2349 index 25b2a1a424e6..63ba0699d107 100644
2350 --- a/drivers/gpu/drm/mga/mga_drv.c
2351 +++ b/drivers/gpu/drm/mga/mga_drv.c
2352 @@ -37,8 +37,6 @@
2353
2354 #include <drm/drm_pciids.h>
2355
2356 -static int mga_driver_device_is_agp(struct drm_device *dev);
2357 -
2358 static struct pci_device_id pciidlist[] = {
2359 mga_PCI_IDS
2360 };
2361 @@ -66,7 +64,6 @@ static struct drm_driver driver = {
2362 .lastclose = mga_driver_lastclose,
2363 .set_busid = drm_pci_set_busid,
2364 .dma_quiescent = mga_driver_dma_quiescent,
2365 - .device_is_agp = mga_driver_device_is_agp,
2366 .get_vblank_counter = mga_get_vblank_counter,
2367 .enable_vblank = mga_enable_vblank,
2368 .disable_vblank = mga_disable_vblank,
2369 @@ -107,37 +104,3 @@ module_exit(mga_exit);
2370 MODULE_AUTHOR(DRIVER_AUTHOR);
2371 MODULE_DESCRIPTION(DRIVER_DESC);
2372 MODULE_LICENSE("GPL and additional rights");
2373 -
2374 -/**
2375 - * Determine if the device really is AGP or not.
2376 - *
2377 - * In addition to the usual tests performed by \c drm_device_is_agp, this
2378 - * function detects PCI G450 cards that appear to the system exactly like
2379 - * AGP G450 cards.
2380 - *
2381 - * \param dev The device to be tested.
2382 - *
2383 - * \returns
2384 - * If the device is a PCI G450, zero is returned. Otherwise 2 is returned.
2385 - */
2386 -static int mga_driver_device_is_agp(struct drm_device *dev)
2387 -{
2388 - const struct pci_dev *const pdev = dev->pdev;
2389 -
2390 - /* There are PCI versions of the G450. These cards have the
2391 - * same PCI ID as the AGP G450, but have an additional PCI-to-PCI
2392 - * bridge chip. We detect these cards, which are not currently
2393 - * supported by this driver, by looking at the device ID of the
2394 - * bus the "card" is on. If vendor is 0x3388 (Hint Corp) and the
2395 - * device is 0x0021 (HB6 Universal PCI-PCI bridge), we reject the
2396 - * device.
2397 - */
2398 -
2399 - if ((pdev->device == 0x0525) && pdev->bus->self
2400 - && (pdev->bus->self->vendor == 0x3388)
2401 - && (pdev->bus->self->device == 0x0021)) {
2402 - return 0;
2403 - }
2404 -
2405 - return 2;
2406 -}
2407 diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c
2408 index 5127b75dbf40..7250ffc6322f 100644
2409 --- a/drivers/gpu/drm/msm/adreno/adreno_device.c
2410 +++ b/drivers/gpu/drm/msm/adreno/adreno_device.c
2411 @@ -25,9 +25,6 @@ bool hang_debug = false;
2412 MODULE_PARM_DESC(hang_debug, "Dump registers when hang is detected (can be slow!)");
2413 module_param_named(hang_debug, hang_debug, bool, 0600);
2414
2415 -struct msm_gpu *a3xx_gpu_init(struct drm_device *dev);
2416 -struct msm_gpu *a4xx_gpu_init(struct drm_device *dev);
2417 -
2418 static const struct adreno_info gpulist[] = {
2419 {
2420 .rev = ADRENO_REV(3, 0, 5, ANY_ID),
2421 diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
2422 index a54f6e036b4a..07d99bdf7c99 100644
2423 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h
2424 +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
2425 @@ -311,4 +311,7 @@ static inline void adreno_gpu_write(struct adreno_gpu *gpu,
2426 gpu_write(&gpu->base, reg - 1, data);
2427 }
2428
2429 +struct msm_gpu *a3xx_gpu_init(struct drm_device *dev);
2430 +struct msm_gpu *a4xx_gpu_init(struct drm_device *dev);
2431 +
2432 #endif /* __ADRENO_GPU_H__ */
2433 diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.c b/drivers/gpu/drm/sun4i/sun4i_backend.c
2434 index 32c0584e3c35..6e6c59a661b6 100644
2435 --- a/drivers/gpu/drm/sun4i/sun4i_backend.c
2436 +++ b/drivers/gpu/drm/sun4i/sun4i_backend.c
2437 @@ -408,6 +408,7 @@ static int sun4i_backend_remove(struct platform_device *pdev)
2438
2439 static const struct of_device_id sun4i_backend_of_table[] = {
2440 { .compatible = "allwinner,sun5i-a13-display-backend" },
2441 + { .compatible = "allwinner,sun6i-a31-display-backend" },
2442 { .compatible = "allwinner,sun8i-a33-display-backend" },
2443 { }
2444 };
2445 diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c b/drivers/gpu/drm/sun4i/sun4i_drv.c
2446 index 70e9fd59c5a2..c3b21865443e 100644
2447 --- a/drivers/gpu/drm/sun4i/sun4i_drv.c
2448 +++ b/drivers/gpu/drm/sun4i/sun4i_drv.c
2449 @@ -201,12 +201,15 @@ static const struct component_master_ops sun4i_drv_master_ops = {
2450 static bool sun4i_drv_node_is_frontend(struct device_node *node)
2451 {
2452 return of_device_is_compatible(node, "allwinner,sun5i-a13-display-frontend") ||
2453 + of_device_is_compatible(node, "allwinner,sun6i-a31-display-frontend") ||
2454 of_device_is_compatible(node, "allwinner,sun8i-a33-display-frontend");
2455 }
2456
2457 static bool sun4i_drv_node_is_tcon(struct device_node *node)
2458 {
2459 return of_device_is_compatible(node, "allwinner,sun5i-a13-tcon") ||
2460 + of_device_is_compatible(node, "allwinner,sun6i-a31-tcon") ||
2461 + of_device_is_compatible(node, "allwinner,sun6i-a31s-tcon") ||
2462 of_device_is_compatible(node, "allwinner,sun8i-a33-tcon");
2463 }
2464
2465 @@ -322,6 +325,8 @@ static int sun4i_drv_remove(struct platform_device *pdev)
2466
2467 static const struct of_device_id sun4i_drv_of_table[] = {
2468 { .compatible = "allwinner,sun5i-a13-display-engine" },
2469 + { .compatible = "allwinner,sun6i-a31-display-engine" },
2470 + { .compatible = "allwinner,sun6i-a31s-display-engine" },
2471 { .compatible = "allwinner,sun8i-a33-display-engine" },
2472 { }
2473 };
2474 diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c
2475 index cadacb517f95..c6afb2448655 100644
2476 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
2477 +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
2478 @@ -20,6 +20,7 @@
2479 #include <linux/component.h>
2480 #include <linux/ioport.h>
2481 #include <linux/of_address.h>
2482 +#include <linux/of_device.h>
2483 #include <linux/of_graph.h>
2484 #include <linux/of_irq.h>
2485 #include <linux/regmap.h>
2486 @@ -62,7 +63,7 @@ void sun4i_tcon_channel_disable(struct sun4i_tcon *tcon, int channel)
2487 return;
2488 }
2489
2490 - WARN_ON(!tcon->has_channel_1);
2491 + WARN_ON(!tcon->quirks->has_channel_1);
2492 regmap_update_bits(tcon->regs, SUN4I_TCON1_CTL_REG,
2493 SUN4I_TCON1_CTL_TCON_ENABLE, 0);
2494 clk_disable_unprepare(tcon->sclk1);
2495 @@ -80,7 +81,7 @@ void sun4i_tcon_channel_enable(struct sun4i_tcon *tcon, int channel)
2496 return;
2497 }
2498
2499 - WARN_ON(!tcon->has_channel_1);
2500 + WARN_ON(!tcon->quirks->has_channel_1);
2501 regmap_update_bits(tcon->regs, SUN4I_TCON1_CTL_REG,
2502 SUN4I_TCON1_CTL_TCON_ENABLE,
2503 SUN4I_TCON1_CTL_TCON_ENABLE);
2504 @@ -202,7 +203,7 @@ void sun4i_tcon1_mode_set(struct sun4i_tcon *tcon,
2505 u8 clk_delay;
2506 u32 val;
2507
2508 - WARN_ON(!tcon->has_channel_1);
2509 + WARN_ON(!tcon->quirks->has_channel_1);
2510
2511 /* Adjust clock delay */
2512 clk_delay = sun4i_tcon_get_clk_delay(mode, 1);
2513 @@ -266,7 +267,7 @@ void sun4i_tcon1_mode_set(struct sun4i_tcon *tcon,
2514 /*
2515 * FIXME: Undocumented bits
2516 */
2517 - if (tcon->has_mux)
2518 + if (tcon->quirks->has_unknown_mux)
2519 regmap_write(tcon->regs, SUN4I_TCON_MUX_CTRL_REG, 1);
2520 }
2521 EXPORT_SYMBOL(sun4i_tcon1_mode_set);
2522 @@ -327,7 +328,7 @@ static int sun4i_tcon_init_clocks(struct device *dev,
2523 return PTR_ERR(tcon->sclk0);
2524 }
2525
2526 - if (tcon->has_channel_1) {
2527 + if (tcon->quirks->has_channel_1) {
2528 tcon->sclk1 = devm_clk_get(dev, "tcon-ch1");
2529 if (IS_ERR(tcon->sclk1)) {
2530 dev_err(dev, "Couldn't get the TCON channel 1 clock\n");
2531 @@ -487,14 +488,7 @@ static int sun4i_tcon_bind(struct device *dev, struct device *master,
2532 drv->tcon = tcon;
2533 tcon->drm = drm;
2534 tcon->dev = dev;
2535 -
2536 - if (of_device_is_compatible(dev->of_node, "allwinner,sun5i-a13-tcon")) {
2537 - tcon->has_mux = true;
2538 - tcon->has_channel_1 = true;
2539 - } else {
2540 - tcon->has_mux = false;
2541 - tcon->has_channel_1 = false;
2542 - }
2543 + tcon->quirks = of_device_get_match_data(dev);
2544
2545 tcon->lcd_rst = devm_reset_control_get(dev, "lcd");
2546 if (IS_ERR(tcon->lcd_rst)) {
2547 @@ -588,9 +582,28 @@ static int sun4i_tcon_remove(struct platform_device *pdev)
2548 return 0;
2549 }
2550
2551 +static const struct sun4i_tcon_quirks sun5i_a13_quirks = {
2552 + .has_unknown_mux = true,
2553 + .has_channel_1 = true,
2554 +};
2555 +
2556 +static const struct sun4i_tcon_quirks sun6i_a31_quirks = {
2557 + .has_channel_1 = true,
2558 +};
2559 +
2560 +static const struct sun4i_tcon_quirks sun6i_a31s_quirks = {
2561 + .has_channel_1 = true,
2562 +};
2563 +
2564 +static const struct sun4i_tcon_quirks sun8i_a33_quirks = {
2565 + /* nothing is supported */
2566 +};
2567 +
2568 static const struct of_device_id sun4i_tcon_of_table[] = {
2569 - { .compatible = "allwinner,sun5i-a13-tcon" },
2570 - { .compatible = "allwinner,sun8i-a33-tcon" },
2571 + { .compatible = "allwinner,sun5i-a13-tcon", .data = &sun5i_a13_quirks },
2572 + { .compatible = "allwinner,sun6i-a31-tcon", .data = &sun6i_a31_quirks },
2573 + { .compatible = "allwinner,sun6i-a31s-tcon", .data = &sun6i_a31s_quirks },
2574 + { .compatible = "allwinner,sun8i-a33-tcon", .data = &sun8i_a33_quirks },
2575 { }
2576 };
2577 MODULE_DEVICE_TABLE(of, sun4i_tcon_of_table);
2578 diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.h b/drivers/gpu/drm/sun4i/sun4i_tcon.h
2579 index 12bd48925f4d..166064bafe2e 100644
2580 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.h
2581 +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.h
2582 @@ -142,6 +142,11 @@
2583
2584 #define SUN4I_TCON_MAX_CHANNELS 2
2585
2586 +struct sun4i_tcon_quirks {
2587 + bool has_unknown_mux; /* sun5i has undocumented mux */
2588 + bool has_channel_1; /* a33 does not have channel 1 */
2589 +};
2590 +
2591 struct sun4i_tcon {
2592 struct device *dev;
2593 struct drm_device *drm;
2594 @@ -160,12 +165,10 @@ struct sun4i_tcon {
2595 /* Reset control */
2596 struct reset_control *lcd_rst;
2597
2598 - /* Platform adjustments */
2599 - bool has_mux;
2600 -
2601 struct drm_panel *panel;
2602
2603 - bool has_channel_1;
2604 + /* Platform adjustments */
2605 + const struct sun4i_tcon_quirks *quirks;
2606 };
2607
2608 struct drm_bridge *sun4i_tcon_find_bridge(struct device_node *node);
2609 diff --git a/drivers/gpu/drm/ttm/ttm_object.c b/drivers/gpu/drm/ttm/ttm_object.c
2610 index 4f5fa8d65fe9..144367c0c28f 100644
2611 --- a/drivers/gpu/drm/ttm/ttm_object.c
2612 +++ b/drivers/gpu/drm/ttm/ttm_object.c
2613 @@ -179,7 +179,7 @@ int ttm_base_object_init(struct ttm_object_file *tfile,
2614 if (unlikely(ret != 0))
2615 goto out_err0;
2616
2617 - ret = ttm_ref_object_add(tfile, base, TTM_REF_USAGE, NULL);
2618 + ret = ttm_ref_object_add(tfile, base, TTM_REF_USAGE, NULL, false);
2619 if (unlikely(ret != 0))
2620 goto out_err1;
2621
2622 @@ -318,7 +318,8 @@ EXPORT_SYMBOL(ttm_ref_object_exists);
2623
2624 int ttm_ref_object_add(struct ttm_object_file *tfile,
2625 struct ttm_base_object *base,
2626 - enum ttm_ref_type ref_type, bool *existed)
2627 + enum ttm_ref_type ref_type, bool *existed,
2628 + bool require_existed)
2629 {
2630 struct drm_open_hash *ht = &tfile->ref_hash[ref_type];
2631 struct ttm_ref_object *ref;
2632 @@ -345,6 +346,9 @@ int ttm_ref_object_add(struct ttm_object_file *tfile,
2633 }
2634
2635 rcu_read_unlock();
2636 + if (require_existed)
2637 + return -EPERM;
2638 +
2639 ret = ttm_mem_global_alloc(mem_glob, sizeof(*ref),
2640 false, false);
2641 if (unlikely(ret != 0))
2642 @@ -635,7 +639,7 @@ int ttm_prime_fd_to_handle(struct ttm_object_file *tfile,
2643 prime = (struct ttm_prime_object *) dma_buf->priv;
2644 base = &prime->base;
2645 *handle = base->hash.key;
2646 - ret = ttm_ref_object_add(tfile, base, TTM_REF_USAGE, NULL);
2647 + ret = ttm_ref_object_add(tfile, base, TTM_REF_USAGE, NULL, false);
2648
2649 dma_buf_put(dma_buf);
2650
2651 diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c b/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c
2652 index 26ac8e80a478..967450da9742 100644
2653 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c
2654 +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c
2655 @@ -538,7 +538,7 @@ int vmw_fence_create(struct vmw_fence_manager *fman,
2656 struct vmw_fence_obj **p_fence)
2657 {
2658 struct vmw_fence_obj *fence;
2659 - int ret;
2660 + int ret;
2661
2662 fence = kzalloc(sizeof(*fence), GFP_KERNEL);
2663 if (unlikely(fence == NULL))
2664 @@ -701,6 +701,41 @@ void vmw_fence_fifo_up(struct vmw_fence_manager *fman)
2665 }
2666
2667
2668 +/**
2669 + * vmw_fence_obj_lookup - Look up a user-space fence object
2670 + *
2671 + * @tfile: A struct ttm_object_file identifying the caller.
2672 + * @handle: A handle identifying the fence object.
2673 + * @return: A struct vmw_user_fence base ttm object on success or
2674 + * an error pointer on failure.
2675 + *
2676 + * The fence object is looked up and type-checked. The caller needs
2677 + * to have opened the fence object first, but since that happens on
2678 + * creation and fence objects aren't shareable, that's not an
2679 + * issue currently.
2680 + */
2681 +static struct ttm_base_object *
2682 +vmw_fence_obj_lookup(struct ttm_object_file *tfile, u32 handle)
2683 +{
2684 + struct ttm_base_object *base = ttm_base_object_lookup(tfile, handle);
2685 +
2686 + if (!base) {
2687 + pr_err("Invalid fence object handle 0x%08lx.\n",
2688 + (unsigned long)handle);
2689 + return ERR_PTR(-EINVAL);
2690 + }
2691 +
2692 + if (base->refcount_release != vmw_user_fence_base_release) {
2693 + pr_err("Invalid fence object handle 0x%08lx.\n",
2694 + (unsigned long)handle);
2695 + ttm_base_object_unref(&base);
2696 + return ERR_PTR(-EINVAL);
2697 + }
2698 +
2699 + return base;
2700 +}
2701 +
2702 +
2703 int vmw_fence_obj_wait_ioctl(struct drm_device *dev, void *data,
2704 struct drm_file *file_priv)
2705 {
2706 @@ -726,13 +761,9 @@ int vmw_fence_obj_wait_ioctl(struct drm_device *dev, void *data,
2707 arg->kernel_cookie = jiffies + wait_timeout;
2708 }
2709
2710 - base = ttm_base_object_lookup(tfile, arg->handle);
2711 - if (unlikely(base == NULL)) {
2712 - printk(KERN_ERR "Wait invalid fence object handle "
2713 - "0x%08lx.\n",
2714 - (unsigned long)arg->handle);
2715 - return -EINVAL;
2716 - }
2717 + base = vmw_fence_obj_lookup(tfile, arg->handle);
2718 + if (IS_ERR(base))
2719 + return PTR_ERR(base);
2720
2721 fence = &(container_of(base, struct vmw_user_fence, base)->fence);
2722
2723 @@ -771,13 +802,9 @@ int vmw_fence_obj_signaled_ioctl(struct drm_device *dev, void *data,
2724 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
2725 struct vmw_private *dev_priv = vmw_priv(dev);
2726
2727 - base = ttm_base_object_lookup(tfile, arg->handle);
2728 - if (unlikely(base == NULL)) {
2729 - printk(KERN_ERR "Fence signaled invalid fence object handle "
2730 - "0x%08lx.\n",
2731 - (unsigned long)arg->handle);
2732 - return -EINVAL;
2733 - }
2734 + base = vmw_fence_obj_lookup(tfile, arg->handle);
2735 + if (IS_ERR(base))
2736 + return PTR_ERR(base);
2737
2738 fence = &(container_of(base, struct vmw_user_fence, base)->fence);
2739 fman = fman_from_fence(fence);
2740 @@ -1024,6 +1051,7 @@ int vmw_fence_event_ioctl(struct drm_device *dev, void *data,
2741 (struct drm_vmw_fence_event_arg *) data;
2742 struct vmw_fence_obj *fence = NULL;
2743 struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv);
2744 + struct ttm_object_file *tfile = vmw_fp->tfile;
2745 struct drm_vmw_fence_rep __user *user_fence_rep =
2746 (struct drm_vmw_fence_rep __user *)(unsigned long)
2747 arg->fence_rep;
2748 @@ -1037,24 +1065,18 @@ int vmw_fence_event_ioctl(struct drm_device *dev, void *data,
2749 */
2750 if (arg->handle) {
2751 struct ttm_base_object *base =
2752 - ttm_base_object_lookup_for_ref(dev_priv->tdev,
2753 - arg->handle);
2754 -
2755 - if (unlikely(base == NULL)) {
2756 - DRM_ERROR("Fence event invalid fence object handle "
2757 - "0x%08lx.\n",
2758 - (unsigned long)arg->handle);
2759 - return -EINVAL;
2760 - }
2761 + vmw_fence_obj_lookup(tfile, arg->handle);
2762 +
2763 + if (IS_ERR(base))
2764 + return PTR_ERR(base);
2765 +
2766 fence = &(container_of(base, struct vmw_user_fence,
2767 base)->fence);
2768 (void) vmw_fence_obj_reference(fence);
2769
2770 if (user_fence_rep != NULL) {
2771 - bool existed;
2772 -
2773 ret = ttm_ref_object_add(vmw_fp->tfile, base,
2774 - TTM_REF_USAGE, &existed);
2775 + TTM_REF_USAGE, NULL, false);
2776 if (unlikely(ret != 0)) {
2777 DRM_ERROR("Failed to reference a fence "
2778 "object.\n");
2779 @@ -1097,8 +1119,7 @@ int vmw_fence_event_ioctl(struct drm_device *dev, void *data,
2780 return 0;
2781 out_no_create:
2782 if (user_fence_rep != NULL)
2783 - ttm_ref_object_base_unref(vmw_fpriv(file_priv)->tfile,
2784 - handle, TTM_REF_USAGE);
2785 + ttm_ref_object_base_unref(tfile, handle, TTM_REF_USAGE);
2786 out_no_ref_obj:
2787 vmw_fence_obj_unreference(&fence);
2788 return ret;
2789 diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c b/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c
2790 index b8c6a03c8c54..5ec24fd801cd 100644
2791 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c
2792 +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c
2793 @@ -114,8 +114,6 @@ int vmw_getparam_ioctl(struct drm_device *dev, void *data,
2794 param->value = dev_priv->has_dx;
2795 break;
2796 default:
2797 - DRM_ERROR("Illegal vmwgfx get param request: %d\n",
2798 - param->param);
2799 return -EINVAL;
2800 }
2801
2802 @@ -186,7 +184,7 @@ int vmw_get_cap_3d_ioctl(struct drm_device *dev, void *data,
2803 bool gb_objects = !!(dev_priv->capabilities & SVGA_CAP_GBOBJECTS);
2804 struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv);
2805
2806 - if (unlikely(arg->pad64 != 0)) {
2807 + if (unlikely(arg->pad64 != 0 || arg->max_size == 0)) {
2808 DRM_ERROR("Illegal GET_3D_CAP argument.\n");
2809 return -EINVAL;
2810 }
2811 diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c b/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c
2812 index 52ca1c9d070e..bc354f7cf5d6 100644
2813 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c
2814 +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c
2815 @@ -589,7 +589,7 @@ static int vmw_user_dmabuf_synccpu_grab(struct vmw_user_dma_buffer *user_bo,
2816 return ret;
2817
2818 ret = ttm_ref_object_add(tfile, &user_bo->prime.base,
2819 - TTM_REF_SYNCCPU_WRITE, &existed);
2820 + TTM_REF_SYNCCPU_WRITE, &existed, false);
2821 if (ret != 0 || existed)
2822 ttm_bo_synccpu_write_release(&user_bo->dma.base);
2823
2824 @@ -773,7 +773,7 @@ int vmw_user_dmabuf_reference(struct ttm_object_file *tfile,
2825
2826 *handle = user_bo->prime.base.hash.key;
2827 return ttm_ref_object_add(tfile, &user_bo->prime.base,
2828 - TTM_REF_USAGE, NULL);
2829 + TTM_REF_USAGE, NULL, false);
2830 }
2831
2832 /*
2833 diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c b/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c
2834 index b445ce9b9757..05fa092c942b 100644
2835 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c
2836 +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c
2837 @@ -713,11 +713,14 @@ int vmw_surface_define_ioctl(struct drm_device *dev, void *data,
2838 128;
2839
2840 num_sizes = 0;
2841 - for (i = 0; i < DRM_VMW_MAX_SURFACE_FACES; ++i)
2842 + for (i = 0; i < DRM_VMW_MAX_SURFACE_FACES; ++i) {
2843 + if (req->mip_levels[i] > DRM_VMW_MAX_MIP_LEVELS)
2844 + return -EINVAL;
2845 num_sizes += req->mip_levels[i];
2846 + }
2847
2848 - if (num_sizes > DRM_VMW_MAX_SURFACE_FACES *
2849 - DRM_VMW_MAX_MIP_LEVELS)
2850 + if (num_sizes > DRM_VMW_MAX_SURFACE_FACES * DRM_VMW_MAX_MIP_LEVELS ||
2851 + num_sizes == 0)
2852 return -EINVAL;
2853
2854 size = vmw_user_surface_size + 128 +
2855 @@ -891,17 +894,16 @@ vmw_surface_handle_reference(struct vmw_private *dev_priv,
2856 uint32_t handle;
2857 struct ttm_base_object *base;
2858 int ret;
2859 + bool require_exist = false;
2860
2861 if (handle_type == DRM_VMW_HANDLE_PRIME) {
2862 ret = ttm_prime_fd_to_handle(tfile, u_handle, &handle);
2863 if (unlikely(ret != 0))
2864 return ret;
2865 } else {
2866 - if (unlikely(drm_is_render_client(file_priv))) {
2867 - DRM_ERROR("Render client refused legacy "
2868 - "surface reference.\n");
2869 - return -EACCES;
2870 - }
2871 + if (unlikely(drm_is_render_client(file_priv)))
2872 + require_exist = true;
2873 +
2874 if (ACCESS_ONCE(vmw_fpriv(file_priv)->locked_master)) {
2875 DRM_ERROR("Locked master refused legacy "
2876 "surface reference.\n");
2877 @@ -929,17 +931,14 @@ vmw_surface_handle_reference(struct vmw_private *dev_priv,
2878
2879 /*
2880 * Make sure the surface creator has the same
2881 - * authenticating master.
2882 + * authenticating master, or is already registered with us.
2883 */
2884 if (drm_is_primary_client(file_priv) &&
2885 - user_srf->master != file_priv->master) {
2886 - DRM_ERROR("Trying to reference surface outside of"
2887 - " master domain.\n");
2888 - ret = -EACCES;
2889 - goto out_bad_resource;
2890 - }
2891 + user_srf->master != file_priv->master)
2892 + require_exist = true;
2893
2894 - ret = ttm_ref_object_add(tfile, base, TTM_REF_USAGE, NULL);
2895 + ret = ttm_ref_object_add(tfile, base, TTM_REF_USAGE, NULL,
2896 + require_exist);
2897 if (unlikely(ret != 0)) {
2898 DRM_ERROR("Could not add a reference to a surface.\n");
2899 goto out_bad_resource;
2900 diff --git a/drivers/hid/hid-core.c b/drivers/hid/hid-core.c
2901 index 2b89c701076f..a5dd7e63ada3 100644
2902 --- a/drivers/hid/hid-core.c
2903 +++ b/drivers/hid/hid-core.c
2904 @@ -728,7 +728,6 @@ static void hid_scan_collection(struct hid_parser *parser, unsigned type)
2905 hid->product == USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_2 ||
2906 hid->product == USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_JP ||
2907 hid->product == USB_DEVICE_ID_MS_TYPE_COVER_PRO_4_JP ||
2908 - hid->product == USB_DEVICE_ID_MS_TYPE_COVER_3 ||
2909 hid->product == USB_DEVICE_ID_MS_POWER_COVER) &&
2910 hid->group == HID_GROUP_MULTITOUCH)
2911 hid->group = HID_GROUP_GENERIC;
2912 @@ -1984,7 +1983,6 @@ static const struct hid_device_id hid_have_special_driver[] = {
2913 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_2) },
2914 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_JP) },
2915 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_4_JP) },
2916 - { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_3) },
2917 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_DIGITAL_MEDIA_7K) },
2918 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_DIGITAL_MEDIA_600) },
2919 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_DIGITAL_MEDIA_3KV1) },
2920 diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h
2921 index 9845189fae92..da9307701abe 100644
2922 --- a/drivers/hid/hid-ids.h
2923 +++ b/drivers/hid/hid-ids.h
2924 @@ -318,8 +318,11 @@
2925 #define USB_VENDOR_ID_DMI 0x0c0b
2926 #define USB_DEVICE_ID_DMI_ENC 0x5fab
2927
2928 -#define USB_VENDOR_ID_DRAGONRISE 0x0079
2929 -#define USB_DEVICE_ID_DRAGONRISE_WIIU 0x1800
2930 +#define USB_VENDOR_ID_DRAGONRISE 0x0079
2931 +#define USB_DEVICE_ID_DRAGONRISE_WIIU 0x1800
2932 +#define USB_DEVICE_ID_DRAGONRISE_PS3 0x1801
2933 +#define USB_DEVICE_ID_DRAGONRISE_DOLPHINBAR 0x1803
2934 +#define USB_DEVICE_ID_DRAGONRISE_GAMECUBE 0x1843
2935
2936 #define USB_VENDOR_ID_DWAV 0x0eef
2937 #define USB_DEVICE_ID_EGALAX_TOUCHCONTROLLER 0x0001
2938 @@ -365,6 +368,9 @@
2939 #define USB_VENDOR_ID_FLATFROG 0x25b5
2940 #define USB_DEVICE_ID_MULTITOUCH_3200 0x0002
2941
2942 +#define USB_VENDOR_ID_FUTABA 0x0547
2943 +#define USB_DEVICE_ID_LED_DISPLAY 0x7000
2944 +
2945 #define USB_VENDOR_ID_ESSENTIAL_REALITY 0x0d7f
2946 #define USB_DEVICE_ID_ESSENTIAL_REALITY_P5 0x0100
2947
2948 @@ -722,7 +728,6 @@
2949 #define USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_2 0x07e2
2950 #define USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_JP 0x07dd
2951 #define USB_DEVICE_ID_MS_TYPE_COVER_PRO_4_JP 0x07e9
2952 -#define USB_DEVICE_ID_MS_TYPE_COVER_3 0x07de
2953 #define USB_DEVICE_ID_MS_POWER_COVER 0x07da
2954
2955 #define USB_VENDOR_ID_MOJO 0x8282
2956 @@ -1037,6 +1042,10 @@
2957 #define USB_DEVICE_ID_WALTOP_MEDIA_TABLET_14_1_INCH 0x0500
2958 #define USB_DEVICE_ID_WALTOP_SIRIUS_BATTERY_FREE_TABLET 0x0502
2959
2960 +#define USB_VENDOR_ID_WEIDA 0x2575
2961 +#define USB_DEVICE_ID_WEIDA_8752 0xC300
2962 +#define USB_DEVICE_ID_WEIDA_8755 0xC301
2963 +
2964 #define USB_VENDOR_ID_WISEGROUP 0x0925
2965 #define USB_DEVICE_ID_SMARTJOY_PLUS 0x0005
2966 #define USB_DEVICE_ID_SUPER_JOY_BOX_3 0x8888
2967 diff --git a/drivers/hid/hid-microsoft.c b/drivers/hid/hid-microsoft.c
2968 index c6cd392e9f99..ba02667beb80 100644
2969 --- a/drivers/hid/hid-microsoft.c
2970 +++ b/drivers/hid/hid-microsoft.c
2971 @@ -282,8 +282,6 @@ static const struct hid_device_id ms_devices[] = {
2972 .driver_data = MS_HIDINPUT },
2973 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_4_JP),
2974 .driver_data = MS_HIDINPUT },
2975 - { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_3),
2976 - .driver_data = MS_HIDINPUT },
2977 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_POWER_COVER),
2978 .driver_data = MS_HIDINPUT },
2979 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_COMFORT_KEYBOARD),
2980 diff --git a/drivers/hid/hid-multitouch.c b/drivers/hid/hid-multitouch.c
2981 index fb6f1f447279..89e9032ab1e7 100644
2982 --- a/drivers/hid/hid-multitouch.c
2983 +++ b/drivers/hid/hid-multitouch.c
2984 @@ -108,6 +108,7 @@ struct mt_device {
2985 int cc_value_index; /* contact count value index in the field */
2986 unsigned last_slot_field; /* the last field of a slot */
2987 unsigned mt_report_id; /* the report ID of the multitouch device */
2988 + unsigned long initial_quirks; /* initial quirks state */
2989 __s16 inputmode; /* InputMode HID feature, -1 if non-existent */
2990 __s16 inputmode_index; /* InputMode HID feature index in the report */
2991 __s16 maxcontact_report_id; /* Maximum Contact Number HID feature,
2992 @@ -318,13 +319,10 @@ static void mt_get_feature(struct hid_device *hdev, struct hid_report *report)
2993 u8 *buf;
2994
2995 /*
2996 - * Only fetch the feature report if initial reports are not already
2997 - * been retrieved. Currently this is only done for Windows 8 touch
2998 - * devices.
2999 + * Do not fetch the feature report if the device has been explicitly
3000 + * marked as non-capable.
3001 */
3002 - if (!(hdev->quirks & HID_QUIRK_NO_INIT_REPORTS))
3003 - return;
3004 - if (td->mtclass.name != MT_CLS_WIN_8)
3005 + if (td->initial_quirks & HID_QUIRK_NO_INIT_REPORTS)
3006 return;
3007
3008 buf = hid_alloc_report_buf(report, GFP_KERNEL);
3009 @@ -842,7 +840,9 @@ static int mt_input_mapping(struct hid_device *hdev, struct hid_input *hi,
3010 if (!td->mtclass.export_all_inputs &&
3011 field->application != HID_DG_TOUCHSCREEN &&
3012 field->application != HID_DG_PEN &&
3013 - field->application != HID_DG_TOUCHPAD)
3014 + field->application != HID_DG_TOUCHPAD &&
3015 + field->application != HID_GD_KEYBOARD &&
3016 + field->application != HID_CP_CONSUMER_CONTROL)
3017 return -1;
3018
3019 /*
3020 @@ -1083,36 +1083,6 @@ static int mt_probe(struct hid_device *hdev, const struct hid_device_id *id)
3021 }
3022 }
3023
3024 - /* This allows the driver to correctly support devices
3025 - * that emit events over several HID messages.
3026 - */
3027 - hdev->quirks |= HID_QUIRK_NO_INPUT_SYNC;
3028 -
3029 - /*
3030 - * This allows the driver to handle different input sensors
3031 - * that emits events through different reports on the same HID
3032 - * device.
3033 - */
3034 - hdev->quirks |= HID_QUIRK_MULTI_INPUT;
3035 - hdev->quirks |= HID_QUIRK_NO_EMPTY_INPUT;
3036 -
3037 - /*
3038 - * Handle special quirks for Windows 8 certified devices.
3039 - */
3040 - if (id->group == HID_GROUP_MULTITOUCH_WIN_8)
3041 - /*
3042 - * Some multitouch screens do not like to be polled for input
3043 - * reports. Fortunately, the Win8 spec says that all touches
3044 - * should be sent during each report, making the initialization
3045 - * of input reports unnecessary.
3046 - *
3047 - * In addition some touchpads do not behave well if we read
3048 - * all feature reports from them. Instead we prevent
3049 - * initial report fetching and then selectively fetch each
3050 - * report we are interested in.
3051 - */
3052 - hdev->quirks |= HID_QUIRK_NO_INIT_REPORTS;
3053 -
3054 td = devm_kzalloc(&hdev->dev, sizeof(struct mt_device), GFP_KERNEL);
3055 if (!td) {
3056 dev_err(&hdev->dev, "cannot allocate multitouch data\n");
3057 @@ -1136,6 +1106,39 @@ static int mt_probe(struct hid_device *hdev, const struct hid_device_id *id)
3058 if (id->vendor == HID_ANY_ID && id->product == HID_ANY_ID)
3059 td->serial_maybe = true;
3060
3061 + /*
3062 + * Store the initial quirk state
3063 + */
3064 + td->initial_quirks = hdev->quirks;
3065 +
3066 + /* This allows the driver to correctly support devices
3067 + * that emit events over several HID messages.
3068 + */
3069 + hdev->quirks |= HID_QUIRK_NO_INPUT_SYNC;
3070 +
3071 + /*
3072 + * This allows the driver to handle different input sensors
3073 + * that emits events through different reports on the same HID
3074 + * device.
3075 + */
3076 + hdev->quirks |= HID_QUIRK_MULTI_INPUT;
3077 + hdev->quirks |= HID_QUIRK_NO_EMPTY_INPUT;
3078 +
3079 + /*
3080 + * Some multitouch screens do not like to be polled for input
3081 + * reports. Fortunately, the Win8 spec says that all touches
3082 + * should be sent during each report, making the initialization
3083 + * of input reports unnecessary. For Win7 devices, well, let's hope
3084 + * they will still be happy (this is only be a problem if a touch
3085 + * was already there while probing the device).
3086 + *
3087 + * In addition some touchpads do not behave well if we read
3088 + * all feature reports from them. Instead we prevent
3089 + * initial report fetching and then selectively fetch each
3090 + * report we are interested in.
3091 + */
3092 + hdev->quirks |= HID_QUIRK_NO_INIT_REPORTS;
3093 +
3094 ret = hid_parse(hdev);
3095 if (ret != 0)
3096 return ret;
3097 @@ -1204,8 +1207,11 @@ static int mt_resume(struct hid_device *hdev)
3098
3099 static void mt_remove(struct hid_device *hdev)
3100 {
3101 + struct mt_device *td = hid_get_drvdata(hdev);
3102 +
3103 sysfs_remove_group(&hdev->dev.kobj, &mt_attribute_group);
3104 hid_hw_stop(hdev);
3105 + hdev->quirks = td->initial_quirks;
3106 }
3107
3108 /*
3109 diff --git a/drivers/hid/hid-sensor-hub.c b/drivers/hid/hid-sensor-hub.c
3110 index 8f6c35370f66..4ef73374a8f9 100644
3111 --- a/drivers/hid/hid-sensor-hub.c
3112 +++ b/drivers/hid/hid-sensor-hub.c
3113 @@ -796,6 +796,12 @@ static const struct hid_device_id sensor_hub_devices[] = {
3114 { HID_DEVICE(HID_BUS_ANY, HID_GROUP_SENSOR_HUB, USB_VENDOR_ID_MICROSOFT,
3115 USB_DEVICE_ID_MS_TYPE_COVER_2),
3116 .driver_data = HID_SENSOR_HUB_ENUM_QUIRK},
3117 + { HID_DEVICE(HID_BUS_ANY, HID_GROUP_SENSOR_HUB, USB_VENDOR_ID_MICROSOFT,
3118 + 0x07bd), /* Microsoft Surface 3 */
3119 + .driver_data = HID_SENSOR_HUB_ENUM_QUIRK},
3120 + { HID_DEVICE(HID_BUS_ANY, HID_GROUP_SENSOR_HUB, USB_VENDOR_ID_MICROCHIP,
3121 + 0x0f01), /* MM7150 */
3122 + .driver_data = HID_SENSOR_HUB_ENUM_QUIRK},
3123 { HID_DEVICE(HID_BUS_ANY, HID_GROUP_SENSOR_HUB, USB_VENDOR_ID_STM_0,
3124 USB_DEVICE_ID_STM_HID_SENSOR),
3125 .driver_data = HID_SENSOR_HUB_ENUM_QUIRK},
3126 diff --git a/drivers/hid/i2c-hid/i2c-hid.c b/drivers/hid/i2c-hid/i2c-hid.c
3127 index b3ec4f2de875..b1bce804fe97 100644
3128 --- a/drivers/hid/i2c-hid/i2c-hid.c
3129 +++ b/drivers/hid/i2c-hid/i2c-hid.c
3130 @@ -41,6 +41,11 @@
3131
3132 #include <linux/i2c/i2c-hid.h>
3133
3134 +#include "../hid-ids.h"
3135 +
3136 +/* quirks to control the device */
3137 +#define I2C_HID_QUIRK_SET_PWR_WAKEUP_DEV BIT(0)
3138 +
3139 /* flags */
3140 #define I2C_HID_STARTED 0
3141 #define I2C_HID_RESET_PENDING 1
3142 @@ -143,6 +148,7 @@ struct i2c_hid {
3143 char *argsbuf; /* Command arguments buffer */
3144
3145 unsigned long flags; /* device flags */
3146 + unsigned long quirks; /* Various quirks */
3147
3148 wait_queue_head_t wait; /* For waiting the interrupt */
3149 struct gpio_desc *desc;
3150 @@ -154,6 +160,39 @@ struct i2c_hid {
3151 struct mutex reset_lock;
3152 };
3153
3154 +static const struct i2c_hid_quirks {
3155 + __u16 idVendor;
3156 + __u16 idProduct;
3157 + __u32 quirks;
3158 +} i2c_hid_quirks[] = {
3159 + { USB_VENDOR_ID_WEIDA, USB_DEVICE_ID_WEIDA_8752,
3160 + I2C_HID_QUIRK_SET_PWR_WAKEUP_DEV },
3161 + { USB_VENDOR_ID_WEIDA, USB_DEVICE_ID_WEIDA_8755,
3162 + I2C_HID_QUIRK_SET_PWR_WAKEUP_DEV },
3163 + { 0, 0 }
3164 +};
3165 +
3166 +/*
3167 + * i2c_hid_lookup_quirk: return any quirks associated with a I2C HID device
3168 + * @idVendor: the 16-bit vendor ID
3169 + * @idProduct: the 16-bit product ID
3170 + *
3171 + * Returns: a u32 quirks value.
3172 + */
3173 +static u32 i2c_hid_lookup_quirk(const u16 idVendor, const u16 idProduct)
3174 +{
3175 + u32 quirks = 0;
3176 + int n;
3177 +
3178 + for (n = 0; i2c_hid_quirks[n].idVendor; n++)
3179 + if (i2c_hid_quirks[n].idVendor == idVendor &&
3180 + (i2c_hid_quirks[n].idProduct == (__u16)HID_ANY_ID ||
3181 + i2c_hid_quirks[n].idProduct == idProduct))
3182 + quirks = i2c_hid_quirks[n].quirks;
3183 +
3184 + return quirks;
3185 +}
3186 +
3187 static int __i2c_hid_command(struct i2c_client *client,
3188 const struct i2c_hid_cmd *command, u8 reportID,
3189 u8 reportType, u8 *args, int args_len,
3190 @@ -346,11 +385,27 @@ static int i2c_hid_set_power(struct i2c_client *client, int power_state)
3191
3192 i2c_hid_dbg(ihid, "%s\n", __func__);
3193
3194 + /*
3195 + * Some devices require to send a command to wakeup before power on.
3196 + * The call will get a return value (EREMOTEIO) but device will be
3197 + * triggered and activated. After that, it goes like a normal device.
3198 + */
3199 + if (power_state == I2C_HID_PWR_ON &&
3200 + ihid->quirks & I2C_HID_QUIRK_SET_PWR_WAKEUP_DEV) {
3201 + ret = i2c_hid_command(client, &hid_set_power_cmd, NULL, 0);
3202 +
3203 + /* Device was already activated */
3204 + if (!ret)
3205 + goto set_pwr_exit;
3206 + }
3207 +
3208 ret = __i2c_hid_command(client, &hid_set_power_cmd, power_state,
3209 0, NULL, 0, NULL, 0);
3210 +
3211 if (ret)
3212 dev_err(&client->dev, "failed to change power setting.\n");
3213
3214 +set_pwr_exit:
3215 return ret;
3216 }
3217
3218 @@ -1050,6 +1105,8 @@ static int i2c_hid_probe(struct i2c_client *client,
3219 client->name, hid->vendor, hid->product);
3220 strlcpy(hid->phys, dev_name(&client->dev), sizeof(hid->phys));
3221
3222 + ihid->quirks = i2c_hid_lookup_quirk(hid->vendor, hid->product);
3223 +
3224 ret = hid_add_device(hid);
3225 if (ret) {
3226 if (ret != -ENODEV)
3227 diff --git a/drivers/hid/usbhid/hid-quirks.c b/drivers/hid/usbhid/hid-quirks.c
3228 index cde060fefa91..97dbb2562ace 100644
3229 --- a/drivers/hid/usbhid/hid-quirks.c
3230 +++ b/drivers/hid/usbhid/hid-quirks.c
3231 @@ -83,10 +83,14 @@ static const struct hid_blacklist {
3232 { USB_VENDOR_ID_CREATIVELABS, USB_DEVICE_ID_CREATIVE_SB_OMNI_SURROUND_51, HID_QUIRK_NOGET },
3233 { USB_VENDOR_ID_DMI, USB_DEVICE_ID_DMI_ENC, HID_QUIRK_NOGET },
3234 { USB_VENDOR_ID_DRAGONRISE, USB_DEVICE_ID_DRAGONRISE_WIIU, HID_QUIRK_MULTI_INPUT },
3235 + { USB_VENDOR_ID_DRAGONRISE, USB_DEVICE_ID_DRAGONRISE_PS3, HID_QUIRK_MULTI_INPUT },
3236 + { USB_VENDOR_ID_DRAGONRISE, USB_DEVICE_ID_DRAGONRISE_DOLPHINBAR, HID_QUIRK_MULTI_INPUT },
3237 + { USB_VENDOR_ID_DRAGONRISE, USB_DEVICE_ID_DRAGONRISE_GAMECUBE, HID_QUIRK_MULTI_INPUT },
3238 { USB_VENDOR_ID_ELAN, HID_ANY_ID, HID_QUIRK_ALWAYS_POLL },
3239 { USB_VENDOR_ID_ELO, USB_DEVICE_ID_ELO_TS2700, HID_QUIRK_NOGET },
3240 { USB_VENDOR_ID_FORMOSA, USB_DEVICE_ID_FORMOSA_IR_RECEIVER, HID_QUIRK_NO_INIT_REPORTS },
3241 { USB_VENDOR_ID_FREESCALE, USB_DEVICE_ID_FREESCALE_MX28, HID_QUIRK_NOGET },
3242 + { USB_VENDOR_ID_FUTABA, USB_DEVICE_ID_LED_DISPLAY, HID_QUIRK_NO_INIT_REPORTS },
3243 { USB_VENDOR_ID_HP, USB_PRODUCT_ID_HP_LOGITECH_OEM_USB_OPTICAL_MOUSE_0A4A, HID_QUIRK_ALWAYS_POLL },
3244 { USB_VENDOR_ID_HP, USB_PRODUCT_ID_HP_LOGITECH_OEM_USB_OPTICAL_MOUSE_0B4A, HID_QUIRK_ALWAYS_POLL },
3245 { USB_VENDOR_ID_HP, USB_PRODUCT_ID_HP_PIXART_OEM_USB_OPTICAL_MOUSE, HID_QUIRK_ALWAYS_POLL },
3246 @@ -103,7 +107,6 @@ static const struct hid_blacklist {
3247 { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_2, HID_QUIRK_NO_INIT_REPORTS },
3248 { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_JP, HID_QUIRK_NO_INIT_REPORTS },
3249 { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_4_JP, HID_QUIRK_NO_INIT_REPORTS },
3250 - { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_3, HID_QUIRK_NO_INIT_REPORTS },
3251 { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_POWER_COVER, HID_QUIRK_NO_INIT_REPORTS },
3252 { USB_VENDOR_ID_MSI, USB_DEVICE_ID_MSI_GT683R_LED_PANEL, HID_QUIRK_NO_INIT_REPORTS },
3253 { USB_VENDOR_ID_NEXIO, USB_DEVICE_ID_NEXIO_MULTITOUCH_PTI0750, HID_QUIRK_NO_INIT_REPORTS },
3254 diff --git a/drivers/hid/wacom_wac.c b/drivers/hid/wacom_wac.c
3255 index 623be90704ab..0e07a769df7c 100644
3256 --- a/drivers/hid/wacom_wac.c
3257 +++ b/drivers/hid/wacom_wac.c
3258 @@ -2896,6 +2896,9 @@ int wacom_setup_pad_input_capabilities(struct input_dev *input_dev,
3259 {
3260 struct wacom_features *features = &wacom_wac->features;
3261
3262 + if ((features->type == HID_GENERIC) && features->numbered_buttons > 0)
3263 + features->device_type |= WACOM_DEVICETYPE_PAD;
3264 +
3265 if (!(features->device_type & WACOM_DEVICETYPE_PAD))
3266 return -ENODEV;
3267
3268 diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c
3269 index 4466a2f969d7..5ded9b22b015 100644
3270 --- a/drivers/idle/intel_idle.c
3271 +++ b/drivers/idle/intel_idle.c
3272 @@ -724,6 +724,50 @@ static struct cpuidle_state atom_cstates[] = {
3273 {
3274 .enter = NULL }
3275 };
3276 +static struct cpuidle_state tangier_cstates[] = {
3277 + {
3278 + .name = "C1-TNG",
3279 + .desc = "MWAIT 0x00",
3280 + .flags = MWAIT2flg(0x00),
3281 + .exit_latency = 1,
3282 + .target_residency = 4,
3283 + .enter = &intel_idle,
3284 + .enter_freeze = intel_idle_freeze, },
3285 + {
3286 + .name = "C4-TNG",
3287 + .desc = "MWAIT 0x30",
3288 + .flags = MWAIT2flg(0x30) | CPUIDLE_FLAG_TLB_FLUSHED,
3289 + .exit_latency = 100,
3290 + .target_residency = 400,
3291 + .enter = &intel_idle,
3292 + .enter_freeze = intel_idle_freeze, },
3293 + {
3294 + .name = "C6-TNG",
3295 + .desc = "MWAIT 0x52",
3296 + .flags = MWAIT2flg(0x52) | CPUIDLE_FLAG_TLB_FLUSHED,
3297 + .exit_latency = 140,
3298 + .target_residency = 560,
3299 + .enter = &intel_idle,
3300 + .enter_freeze = intel_idle_freeze, },
3301 + {
3302 + .name = "C7-TNG",
3303 + .desc = "MWAIT 0x60",
3304 + .flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED,
3305 + .exit_latency = 1200,
3306 + .target_residency = 4000,
3307 + .enter = &intel_idle,
3308 + .enter_freeze = intel_idle_freeze, },
3309 + {
3310 + .name = "C9-TNG",
3311 + .desc = "MWAIT 0x64",
3312 + .flags = MWAIT2flg(0x64) | CPUIDLE_FLAG_TLB_FLUSHED,
3313 + .exit_latency = 10000,
3314 + .target_residency = 20000,
3315 + .enter = &intel_idle,
3316 + .enter_freeze = intel_idle_freeze, },
3317 + {
3318 + .enter = NULL }
3319 +};
3320 static struct cpuidle_state avn_cstates[] = {
3321 {
3322 .name = "C1-AVN",
3323 @@ -978,6 +1022,10 @@ static const struct idle_cpu idle_cpu_atom = {
3324 .state_table = atom_cstates,
3325 };
3326
3327 +static const struct idle_cpu idle_cpu_tangier = {
3328 + .state_table = tangier_cstates,
3329 +};
3330 +
3331 static const struct idle_cpu idle_cpu_lincroft = {
3332 .state_table = atom_cstates,
3333 .auto_demotion_disable_flags = ATM_LNC_C6_AUTO_DEMOTE,
3334 @@ -1066,6 +1114,7 @@ static const struct x86_cpu_id intel_idle_ids[] __initconst = {
3335 ICPU(INTEL_FAM6_SANDYBRIDGE_X, idle_cpu_snb),
3336 ICPU(INTEL_FAM6_ATOM_CEDARVIEW, idle_cpu_atom),
3337 ICPU(INTEL_FAM6_ATOM_SILVERMONT1, idle_cpu_byt),
3338 + ICPU(INTEL_FAM6_ATOM_MERRIFIELD, idle_cpu_tangier),
3339 ICPU(INTEL_FAM6_ATOM_AIRMONT, idle_cpu_cht),
3340 ICPU(INTEL_FAM6_IVYBRIDGE, idle_cpu_ivb),
3341 ICPU(INTEL_FAM6_IVYBRIDGE_X, idle_cpu_ivt),
3342 diff --git a/drivers/iio/gyro/bmg160_core.c b/drivers/iio/gyro/bmg160_core.c
3343 index f7fcfa886f72..821919dd245b 100644
3344 --- a/drivers/iio/gyro/bmg160_core.c
3345 +++ b/drivers/iio/gyro/bmg160_core.c
3346 @@ -27,6 +27,7 @@
3347 #include <linux/iio/trigger_consumer.h>
3348 #include <linux/iio/triggered_buffer.h>
3349 #include <linux/regmap.h>
3350 +#include <linux/delay.h>
3351 #include "bmg160.h"
3352
3353 #define BMG160_IRQ_NAME "bmg160_event"
3354 @@ -52,6 +53,9 @@
3355 #define BMG160_DEF_BW 100
3356 #define BMG160_REG_PMU_BW_RES BIT(7)
3357
3358 +#define BMG160_GYRO_REG_RESET 0x14
3359 +#define BMG160_GYRO_RESET_VAL 0xb6
3360 +
3361 #define BMG160_REG_INT_MAP_0 0x17
3362 #define BMG160_INT_MAP_0_BIT_ANY BIT(1)
3363
3364 @@ -236,6 +240,14 @@ static int bmg160_chip_init(struct bmg160_data *data)
3365 int ret;
3366 unsigned int val;
3367
3368 + /*
3369 + * Reset chip to get it in a known good state. A delay of 30ms after
3370 + * reset is required according to the datasheet.
3371 + */
3372 + regmap_write(data->regmap, BMG160_GYRO_REG_RESET,
3373 + BMG160_GYRO_RESET_VAL);
3374 + usleep_range(30000, 30700);
3375 +
3376 ret = regmap_read(data->regmap, BMG160_REG_CHIP_ID, &val);
3377 if (ret < 0) {
3378 dev_err(dev, "Error reading reg_chip_id\n");
3379 diff --git a/drivers/input/keyboard/gpio_keys.c b/drivers/input/keyboard/gpio_keys.c
3380 index 29093657f2ef..9b8079ca0fb4 100644
3381 --- a/drivers/input/keyboard/gpio_keys.c
3382 +++ b/drivers/input/keyboard/gpio_keys.c
3383 @@ -26,6 +26,7 @@
3384 #include <linux/gpio_keys.h>
3385 #include <linux/workqueue.h>
3386 #include <linux/gpio.h>
3387 +#include <linux/gpio/consumer.h>
3388 #include <linux/of.h>
3389 #include <linux/of_platform.h>
3390 #include <linux/of_gpio.h>
3391 @@ -35,6 +36,7 @@
3392 struct gpio_button_data {
3393 const struct gpio_keys_button *button;
3394 struct input_dev *input;
3395 + struct gpio_desc *gpiod;
3396
3397 struct timer_list release_timer;
3398 unsigned int release_delay; /* in msecs, for IRQ-only buttons */
3399 @@ -140,7 +142,7 @@ static void gpio_keys_disable_button(struct gpio_button_data *bdata)
3400 */
3401 disable_irq(bdata->irq);
3402
3403 - if (gpio_is_valid(bdata->button->gpio))
3404 + if (bdata->gpiod)
3405 cancel_delayed_work_sync(&bdata->work);
3406 else
3407 del_timer_sync(&bdata->release_timer);
3408 @@ -358,19 +360,20 @@ static void gpio_keys_gpio_report_event(struct gpio_button_data *bdata)
3409 const struct gpio_keys_button *button = bdata->button;
3410 struct input_dev *input = bdata->input;
3411 unsigned int type = button->type ?: EV_KEY;
3412 - int state = gpio_get_value_cansleep(button->gpio);
3413 + int state;
3414
3415 + state = gpiod_get_value_cansleep(bdata->gpiod);
3416 if (state < 0) {
3417 - dev_err(input->dev.parent, "failed to get gpio state\n");
3418 + dev_err(input->dev.parent,
3419 + "failed to get gpio state: %d\n", state);
3420 return;
3421 }
3422
3423 - state = (state ? 1 : 0) ^ button->active_low;
3424 if (type == EV_ABS) {
3425 if (state)
3426 input_event(input, type, button->code, button->value);
3427 } else {
3428 - input_event(input, type, button->code, !!state);
3429 + input_event(input, type, button->code, state);
3430 }
3431 input_sync(input);
3432 }
3433 @@ -456,7 +459,7 @@ static void gpio_keys_quiesce_key(void *data)
3434 {
3435 struct gpio_button_data *bdata = data;
3436
3437 - if (gpio_is_valid(bdata->button->gpio))
3438 + if (bdata->gpiod)
3439 cancel_delayed_work_sync(&bdata->work);
3440 else
3441 del_timer_sync(&bdata->release_timer);
3442 @@ -478,18 +481,30 @@ static int gpio_keys_setup_key(struct platform_device *pdev,
3443 bdata->button = button;
3444 spin_lock_init(&bdata->lock);
3445
3446 + /*
3447 + * Legacy GPIO number, so request the GPIO here and
3448 + * convert it to descriptor.
3449 + */
3450 if (gpio_is_valid(button->gpio)) {
3451 + unsigned flags = GPIOF_IN;
3452 +
3453 + if (button->active_low)
3454 + flags |= GPIOF_ACTIVE_LOW;
3455
3456 - error = devm_gpio_request_one(&pdev->dev, button->gpio,
3457 - GPIOF_IN, desc);
3458 + error = devm_gpio_request_one(&pdev->dev, button->gpio, flags,
3459 + desc);
3460 if (error < 0) {
3461 dev_err(dev, "Failed to request GPIO %d, error %d\n",
3462 button->gpio, error);
3463 return error;
3464 }
3465
3466 + bdata->gpiod = gpio_to_desc(button->gpio);
3467 + if (!bdata->gpiod)
3468 + return -EINVAL;
3469 +
3470 if (button->debounce_interval) {
3471 - error = gpio_set_debounce(button->gpio,
3472 + error = gpiod_set_debounce(bdata->gpiod,
3473 button->debounce_interval * 1000);
3474 /* use timer if gpiolib doesn't provide debounce */
3475 if (error < 0)
3476 @@ -500,7 +515,7 @@ static int gpio_keys_setup_key(struct platform_device *pdev,
3477 if (button->irq) {
3478 bdata->irq = button->irq;
3479 } else {
3480 - irq = gpio_to_irq(button->gpio);
3481 + irq = gpiod_to_irq(bdata->gpiod);
3482 if (irq < 0) {
3483 error = irq;
3484 dev_err(dev,
3485 @@ -575,7 +590,7 @@ static void gpio_keys_report_state(struct gpio_keys_drvdata *ddata)
3486
3487 for (i = 0; i < ddata->pdata->nbuttons; i++) {
3488 struct gpio_button_data *bdata = &ddata->data[i];
3489 - if (gpio_is_valid(bdata->button->gpio))
3490 + if (bdata->gpiod)
3491 gpio_keys_gpio_report_event(bdata);
3492 }
3493 input_sync(input);
3494 diff --git a/drivers/md/dm-raid.c b/drivers/md/dm-raid.c
3495 index 15daa36fcea6..ee75e3510be6 100644
3496 --- a/drivers/md/dm-raid.c
3497 +++ b/drivers/md/dm-raid.c
3498 @@ -3589,7 +3589,7 @@ static int raid_preresume(struct dm_target *ti)
3499 return r;
3500
3501 /* Resize bitmap to adjust to changed region size (aka MD bitmap chunksize) */
3502 - if (test_bit(RT_FLAG_RS_BITMAP_LOADED, &rs->runtime_flags) &&
3503 + if (test_bit(RT_FLAG_RS_BITMAP_LOADED, &rs->runtime_flags) && mddev->bitmap &&
3504 mddev->bitmap_info.chunksize != to_bytes(rs->requested_bitmap_chunk_sectors)) {
3505 r = bitmap_resize(mddev->bitmap, mddev->dev_sectors,
3506 to_bytes(rs->requested_bitmap_chunk_sectors), 0);
3507 diff --git a/drivers/md/dm-verity-fec.c b/drivers/md/dm-verity-fec.c
3508 index 0f0eb8a3d922..78f36012eaca 100644
3509 --- a/drivers/md/dm-verity-fec.c
3510 +++ b/drivers/md/dm-verity-fec.c
3511 @@ -146,8 +146,6 @@ static int fec_decode_bufs(struct dm_verity *v, struct dm_verity_fec_io *fio,
3512 block = fec_buffer_rs_block(v, fio, n, i);
3513 res = fec_decode_rs8(v, fio, block, &par[offset], neras);
3514 if (res < 0) {
3515 - dm_bufio_release(buf);
3516 -
3517 r = res;
3518 goto error;
3519 }
3520 @@ -172,6 +170,8 @@ static int fec_decode_bufs(struct dm_verity *v, struct dm_verity_fec_io *fio,
3521 done:
3522 r = corrected;
3523 error:
3524 + dm_bufio_release(buf);
3525 +
3526 if (r < 0 && neras)
3527 DMERR_LIMIT("%s: FEC %llu: failed to correct: %d",
3528 v->data_dev->name, (unsigned long long)rsb, r);
3529 @@ -269,7 +269,7 @@ static int fec_read_bufs(struct dm_verity *v, struct dm_verity_io *io,
3530 &is_zero) == 0) {
3531 /* skip known zero blocks entirely */
3532 if (is_zero)
3533 - continue;
3534 + goto done;
3535
3536 /*
3537 * skip if we have already found the theoretical
3538 @@ -439,6 +439,13 @@ int verity_fec_decode(struct dm_verity *v, struct dm_verity_io *io,
3539 if (!verity_fec_is_enabled(v))
3540 return -EOPNOTSUPP;
3541
3542 + if (fio->level >= DM_VERITY_FEC_MAX_RECURSION) {
3543 + DMWARN_LIMIT("%s: FEC: recursion too deep", v->data_dev->name);
3544 + return -EIO;
3545 + }
3546 +
3547 + fio->level++;
3548 +
3549 if (type == DM_VERITY_BLOCK_TYPE_METADATA)
3550 block += v->data_blocks;
3551
3552 @@ -470,7 +477,7 @@ int verity_fec_decode(struct dm_verity *v, struct dm_verity_io *io,
3553 if (r < 0) {
3554 r = fec_decode_rsb(v, io, fio, rsb, offset, true);
3555 if (r < 0)
3556 - return r;
3557 + goto done;
3558 }
3559
3560 if (dest)
3561 @@ -480,6 +487,8 @@ int verity_fec_decode(struct dm_verity *v, struct dm_verity_io *io,
3562 r = verity_for_bv_block(v, io, iter, fec_bv_copy);
3563 }
3564
3565 +done:
3566 + fio->level--;
3567 return r;
3568 }
3569
3570 @@ -520,6 +529,7 @@ void verity_fec_init_io(struct dm_verity_io *io)
3571 memset(fio->bufs, 0, sizeof(fio->bufs));
3572 fio->nbufs = 0;
3573 fio->output = NULL;
3574 + fio->level = 0;
3575 }
3576
3577 /*
3578 diff --git a/drivers/md/dm-verity-fec.h b/drivers/md/dm-verity-fec.h
3579 index 7fa0298b995e..bb31ce87a933 100644
3580 --- a/drivers/md/dm-verity-fec.h
3581 +++ b/drivers/md/dm-verity-fec.h
3582 @@ -27,6 +27,9 @@
3583 #define DM_VERITY_FEC_BUF_MAX \
3584 (1 << (PAGE_SHIFT - DM_VERITY_FEC_BUF_RS_BITS))
3585
3586 +/* maximum recursion level for verity_fec_decode */
3587 +#define DM_VERITY_FEC_MAX_RECURSION 4
3588 +
3589 #define DM_VERITY_OPT_FEC_DEV "use_fec_from_device"
3590 #define DM_VERITY_OPT_FEC_BLOCKS "fec_blocks"
3591 #define DM_VERITY_OPT_FEC_START "fec_start"
3592 @@ -58,6 +61,7 @@ struct dm_verity_fec_io {
3593 unsigned nbufs; /* number of buffers allocated */
3594 u8 *output; /* buffer for corrected output */
3595 size_t output_pos;
3596 + unsigned level; /* recursion level */
3597 };
3598
3599 #ifdef CONFIG_DM_VERITY_FEC
3600 diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
3601 index 90ed2e12d345..437e4807727d 100644
3602 --- a/drivers/mmc/host/sdhci-msm.c
3603 +++ b/drivers/mmc/host/sdhci-msm.c
3604 @@ -524,7 +524,9 @@ static const struct sdhci_ops sdhci_msm_ops = {
3605 static const struct sdhci_pltfm_data sdhci_msm_pdata = {
3606 .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION |
3607 SDHCI_QUIRK_NO_CARD_NO_RESET |
3608 - SDHCI_QUIRK_SINGLE_POWER_WRITE,
3609 + SDHCI_QUIRK_SINGLE_POWER_WRITE |
3610 + SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
3611 + .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
3612 .ops = &sdhci_msm_ops,
3613 };
3614
3615 diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c
3616 index 1bb11e4a9fe5..3c27401cf7fe 100644
3617 --- a/drivers/mmc/host/sdhci-of-esdhc.c
3618 +++ b/drivers/mmc/host/sdhci-of-esdhc.c
3619 @@ -559,16 +559,19 @@ static const struct sdhci_ops sdhci_esdhc_le_ops = {
3620 };
3621
3622 static const struct sdhci_pltfm_data sdhci_esdhc_be_pdata = {
3623 - .quirks = ESDHC_DEFAULT_QUIRKS | SDHCI_QUIRK_BROKEN_CARD_DETECTION
3624 - | SDHCI_QUIRK_NO_CARD_NO_RESET
3625 - | SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
3626 + .quirks = ESDHC_DEFAULT_QUIRKS |
3627 +#ifdef CONFIG_PPC
3628 + SDHCI_QUIRK_BROKEN_CARD_DETECTION |
3629 +#endif
3630 + SDHCI_QUIRK_NO_CARD_NO_RESET |
3631 + SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
3632 .ops = &sdhci_esdhc_be_ops,
3633 };
3634
3635 static const struct sdhci_pltfm_data sdhci_esdhc_le_pdata = {
3636 - .quirks = ESDHC_DEFAULT_QUIRKS | SDHCI_QUIRK_BROKEN_CARD_DETECTION
3637 - | SDHCI_QUIRK_NO_CARD_NO_RESET
3638 - | SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
3639 + .quirks = ESDHC_DEFAULT_QUIRKS |
3640 + SDHCI_QUIRK_NO_CARD_NO_RESET |
3641 + SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
3642 .ops = &sdhci_esdhc_le_ops,
3643 };
3644
3645 @@ -623,8 +626,7 @@ static int sdhci_esdhc_probe(struct platform_device *pdev)
3646 of_device_is_compatible(np, "fsl,p5020-esdhc") ||
3647 of_device_is_compatible(np, "fsl,p4080-esdhc") ||
3648 of_device_is_compatible(np, "fsl,p1020-esdhc") ||
3649 - of_device_is_compatible(np, "fsl,t1040-esdhc") ||
3650 - of_device_is_compatible(np, "fsl,ls1021a-esdhc"))
3651 + of_device_is_compatible(np, "fsl,t1040-esdhc"))
3652 host->quirks &= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION;
3653
3654 if (of_device_is_compatible(np, "fsl,ls1021a-esdhc"))
3655 diff --git a/drivers/net/ethernet/mellanox/mlx4/main.c b/drivers/net/ethernet/mellanox/mlx4/main.c
3656 index 75d07fa9d0b1..b2ca8a635b2e 100644
3657 --- a/drivers/net/ethernet/mellanox/mlx4/main.c
3658 +++ b/drivers/net/ethernet/mellanox/mlx4/main.c
3659 @@ -4020,49 +4020,51 @@ int mlx4_restart_one(struct pci_dev *pdev)
3660 return err;
3661 }
3662
3663 +#define MLX_SP(id) { PCI_VDEVICE(MELLANOX, id), MLX4_PCI_DEV_FORCE_SENSE_PORT }
3664 +#define MLX_VF(id) { PCI_VDEVICE(MELLANOX, id), MLX4_PCI_DEV_IS_VF }
3665 +#define MLX_GN(id) { PCI_VDEVICE(MELLANOX, id), 0 }
3666 +
3667 static const struct pci_device_id mlx4_pci_table[] = {
3668 - /* MT25408 "Hermon" SDR */
3669 - { PCI_VDEVICE(MELLANOX, 0x6340), MLX4_PCI_DEV_FORCE_SENSE_PORT },
3670 - /* MT25408 "Hermon" DDR */
3671 - { PCI_VDEVICE(MELLANOX, 0x634a), MLX4_PCI_DEV_FORCE_SENSE_PORT },
3672 - /* MT25408 "Hermon" QDR */
3673 - { PCI_VDEVICE(MELLANOX, 0x6354), MLX4_PCI_DEV_FORCE_SENSE_PORT },
3674 - /* MT25408 "Hermon" DDR PCIe gen2 */
3675 - { PCI_VDEVICE(MELLANOX, 0x6732), MLX4_PCI_DEV_FORCE_SENSE_PORT },
3676 - /* MT25408 "Hermon" QDR PCIe gen2 */
3677 - { PCI_VDEVICE(MELLANOX, 0x673c), MLX4_PCI_DEV_FORCE_SENSE_PORT },
3678 - /* MT25408 "Hermon" EN 10GigE */
3679 - { PCI_VDEVICE(MELLANOX, 0x6368), MLX4_PCI_DEV_FORCE_SENSE_PORT },
3680 - /* MT25408 "Hermon" EN 10GigE PCIe gen2 */
3681 - { PCI_VDEVICE(MELLANOX, 0x6750), MLX4_PCI_DEV_FORCE_SENSE_PORT },
3682 - /* MT25458 ConnectX EN 10GBASE-T 10GigE */
3683 - { PCI_VDEVICE(MELLANOX, 0x6372), MLX4_PCI_DEV_FORCE_SENSE_PORT },
3684 - /* MT25458 ConnectX EN 10GBASE-T+Gen2 10GigE */
3685 - { PCI_VDEVICE(MELLANOX, 0x675a), MLX4_PCI_DEV_FORCE_SENSE_PORT },
3686 - /* MT26468 ConnectX EN 10GigE PCIe gen2*/
3687 - { PCI_VDEVICE(MELLANOX, 0x6764), MLX4_PCI_DEV_FORCE_SENSE_PORT },
3688 - /* MT26438 ConnectX EN 40GigE PCIe gen2 5GT/s */
3689 - { PCI_VDEVICE(MELLANOX, 0x6746), MLX4_PCI_DEV_FORCE_SENSE_PORT },
3690 - /* MT26478 ConnectX2 40GigE PCIe gen2 */
3691 - { PCI_VDEVICE(MELLANOX, 0x676e), MLX4_PCI_DEV_FORCE_SENSE_PORT },
3692 - /* MT25400 Family [ConnectX-2 Virtual Function] */
3693 - { PCI_VDEVICE(MELLANOX, 0x1002), MLX4_PCI_DEV_IS_VF },
3694 + /* MT25408 "Hermon" */
3695 + MLX_SP(PCI_DEVICE_ID_MELLANOX_HERMON_SDR), /* SDR */
3696 + MLX_SP(PCI_DEVICE_ID_MELLANOX_HERMON_DDR), /* DDR */
3697 + MLX_SP(PCI_DEVICE_ID_MELLANOX_HERMON_QDR), /* QDR */
3698 + MLX_SP(PCI_DEVICE_ID_MELLANOX_HERMON_DDR_GEN2), /* DDR Gen2 */
3699 + MLX_SP(PCI_DEVICE_ID_MELLANOX_HERMON_QDR_GEN2), /* QDR Gen2 */
3700 + MLX_SP(PCI_DEVICE_ID_MELLANOX_HERMON_EN), /* EN 10GigE */
3701 + MLX_SP(PCI_DEVICE_ID_MELLANOX_HERMON_EN_GEN2), /* EN 10GigE Gen2 */
3702 + /* MT25458 ConnectX EN 10GBASE-T */
3703 + MLX_SP(PCI_DEVICE_ID_MELLANOX_CONNECTX_EN),
3704 + MLX_SP(PCI_DEVICE_ID_MELLANOX_CONNECTX_EN_T_GEN2), /* Gen2 */
3705 + /* MT26468 ConnectX EN 10GigE PCIe Gen2*/
3706 + MLX_SP(PCI_DEVICE_ID_MELLANOX_CONNECTX_EN_GEN2),
3707 + /* MT26438 ConnectX EN 40GigE PCIe Gen2 5GT/s */
3708 + MLX_SP(PCI_DEVICE_ID_MELLANOX_CONNECTX_EN_5_GEN2),
3709 + /* MT26478 ConnectX2 40GigE PCIe Gen2 */
3710 + MLX_SP(PCI_DEVICE_ID_MELLANOX_CONNECTX2),
3711 + /* MT25400 Family [ConnectX-2] */
3712 + MLX_VF(0x1002), /* Virtual Function */
3713 /* MT27500 Family [ConnectX-3] */
3714 - { PCI_VDEVICE(MELLANOX, 0x1003), 0 },
3715 - /* MT27500 Family [ConnectX-3 Virtual Function] */
3716 - { PCI_VDEVICE(MELLANOX, 0x1004), MLX4_PCI_DEV_IS_VF },
3717 - { PCI_VDEVICE(MELLANOX, 0x1005), 0 }, /* MT27510 Family */
3718 - { PCI_VDEVICE(MELLANOX, 0x1006), 0 }, /* MT27511 Family */
3719 - { PCI_VDEVICE(MELLANOX, 0x1007), 0 }, /* MT27520 Family */
3720 - { PCI_VDEVICE(MELLANOX, 0x1008), 0 }, /* MT27521 Family */
3721 - { PCI_VDEVICE(MELLANOX, 0x1009), 0 }, /* MT27530 Family */
3722 - { PCI_VDEVICE(MELLANOX, 0x100a), 0 }, /* MT27531 Family */
3723 - { PCI_VDEVICE(MELLANOX, 0x100b), 0 }, /* MT27540 Family */
3724 - { PCI_VDEVICE(MELLANOX, 0x100c), 0 }, /* MT27541 Family */
3725 - { PCI_VDEVICE(MELLANOX, 0x100d), 0 }, /* MT27550 Family */
3726 - { PCI_VDEVICE(MELLANOX, 0x100e), 0 }, /* MT27551 Family */
3727 - { PCI_VDEVICE(MELLANOX, 0x100f), 0 }, /* MT27560 Family */
3728 - { PCI_VDEVICE(MELLANOX, 0x1010), 0 }, /* MT27561 Family */
3729 + MLX_GN(PCI_DEVICE_ID_MELLANOX_CONNECTX3),
3730 + MLX_VF(0x1004), /* Virtual Function */
3731 + MLX_GN(0x1005), /* MT27510 Family */
3732 + MLX_GN(0x1006), /* MT27511 Family */
3733 + MLX_GN(PCI_DEVICE_ID_MELLANOX_CONNECTX3_PRO), /* MT27520 Family */
3734 + MLX_GN(0x1008), /* MT27521 Family */
3735 + MLX_GN(0x1009), /* MT27530 Family */
3736 + MLX_GN(0x100a), /* MT27531 Family */
3737 + MLX_GN(0x100b), /* MT27540 Family */
3738 + MLX_GN(0x100c), /* MT27541 Family */
3739 + MLX_GN(0x100d), /* MT27550 Family */
3740 + MLX_GN(0x100e), /* MT27551 Family */
3741 + MLX_GN(0x100f), /* MT27560 Family */
3742 + MLX_GN(0x1010), /* MT27561 Family */
3743 +
3744 + /*
3745 + * See the mellanox_check_broken_intx_masking() quirk when
3746 + * adding devices
3747 + */
3748 +
3749 { 0, }
3750 };
3751
3752 diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/p2p.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/p2p.c
3753 index de19c7c92bc6..85d949e03f79 100644
3754 --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/p2p.c
3755 +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/p2p.c
3756 @@ -2238,14 +2238,16 @@ int brcmf_p2p_del_vif(struct wiphy *wiphy, struct wireless_dev *wdev)
3757 struct brcmf_cfg80211_info *cfg = wiphy_priv(wiphy);
3758 struct brcmf_p2p_info *p2p = &cfg->p2p;
3759 struct brcmf_cfg80211_vif *vif;
3760 + enum nl80211_iftype iftype;
3761 bool wait_for_disable = false;
3762 int err;
3763
3764 brcmf_dbg(TRACE, "delete P2P vif\n");
3765 vif = container_of(wdev, struct brcmf_cfg80211_vif, wdev);
3766
3767 + iftype = vif->wdev.iftype;
3768 brcmf_cfg80211_arm_vif_event(cfg, vif);
3769 - switch (vif->wdev.iftype) {
3770 + switch (iftype) {
3771 case NL80211_IFTYPE_P2P_CLIENT:
3772 if (test_bit(BRCMF_VIF_STATUS_DISCONNECTING, &vif->sme_state))
3773 wait_for_disable = true;
3774 @@ -2275,7 +2277,7 @@ int brcmf_p2p_del_vif(struct wiphy *wiphy, struct wireless_dev *wdev)
3775 BRCMF_P2P_DISABLE_TIMEOUT);
3776
3777 err = 0;
3778 - if (vif->wdev.iftype != NL80211_IFTYPE_P2P_DEVICE) {
3779 + if (iftype != NL80211_IFTYPE_P2P_DEVICE) {
3780 brcmf_vif_clear_mgmt_ies(vif);
3781 err = brcmf_p2p_release_p2p_if(vif);
3782 }
3783 @@ -2291,7 +2293,7 @@ int brcmf_p2p_del_vif(struct wiphy *wiphy, struct wireless_dev *wdev)
3784 brcmf_remove_interface(vif->ifp, true);
3785
3786 brcmf_cfg80211_arm_vif_event(cfg, NULL);
3787 - if (vif->wdev.iftype != NL80211_IFTYPE_P2P_DEVICE)
3788 + if (iftype != NL80211_IFTYPE_P2P_DEVICE)
3789 p2p->bss_idx[P2PAPI_BSSCFG_CONNECTION].vif = NULL;
3790
3791 return err;
3792 diff --git a/drivers/nvme/host/core.c b/drivers/nvme/host/core.c
3793 index bde769b11e3b..5f2feeef8905 100644
3794 --- a/drivers/nvme/host/core.c
3795 +++ b/drivers/nvme/host/core.c
3796 @@ -1204,8 +1204,8 @@ static void nvme_set_queue_limits(struct nvme_ctrl *ctrl,
3797 blk_queue_max_hw_sectors(q, ctrl->max_hw_sectors);
3798 blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX));
3799 }
3800 - if (ctrl->stripe_size)
3801 - blk_queue_chunk_sectors(q, ctrl->stripe_size >> 9);
3802 + if (ctrl->quirks & NVME_QUIRK_STRIPE_SIZE)
3803 + blk_queue_chunk_sectors(q, ctrl->max_hw_sectors);
3804 blk_queue_virt_boundary(q, ctrl->page_size - 1);
3805 if (ctrl->vwc & NVME_CTRL_VWC_PRESENT)
3806 vwc = true;
3807 @@ -1261,19 +1261,6 @@ int nvme_init_identify(struct nvme_ctrl *ctrl)
3808 ctrl->max_hw_sectors =
3809 min_not_zero(ctrl->max_hw_sectors, max_hw_sectors);
3810
3811 - if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) && id->vs[3]) {
3812 - unsigned int max_hw_sectors;
3813 -
3814 - ctrl->stripe_size = 1 << (id->vs[3] + page_shift);
3815 - max_hw_sectors = ctrl->stripe_size >> (page_shift - 9);
3816 - if (ctrl->max_hw_sectors) {
3817 - ctrl->max_hw_sectors = min(max_hw_sectors,
3818 - ctrl->max_hw_sectors);
3819 - } else {
3820 - ctrl->max_hw_sectors = max_hw_sectors;
3821 - }
3822 - }
3823 -
3824 nvme_set_queue_limits(ctrl, ctrl->admin_q);
3825 ctrl->sgls = le32_to_cpu(id->sgls);
3826 ctrl->kas = le16_to_cpu(id->kas);
3827 diff --git a/drivers/nvme/host/nvme.h b/drivers/nvme/host/nvme.h
3828 index d47f5a5d18c7..8edafd8cb8ce 100644
3829 --- a/drivers/nvme/host/nvme.h
3830 +++ b/drivers/nvme/host/nvme.h
3831 @@ -121,7 +121,6 @@ struct nvme_ctrl {
3832
3833 u32 page_size;
3834 u32 max_hw_sectors;
3835 - u32 stripe_size;
3836 u16 oncs;
3837 u16 vid;
3838 atomic_t abort_limit;
3839 diff --git a/drivers/pci/host/pci-thunder-pem.c b/drivers/pci/host/pci-thunder-pem.c
3840 index 6abaf80ffb39..c3276eede82a 100644
3841 --- a/drivers/pci/host/pci-thunder-pem.c
3842 +++ b/drivers/pci/host/pci-thunder-pem.c
3843 @@ -284,35 +284,16 @@ static int thunder_pem_config_write(struct pci_bus *bus, unsigned int devfn,
3844 return pci_generic_config_write(bus, devfn, where, size, val);
3845 }
3846
3847 -static int thunder_pem_init(struct pci_config_window *cfg)
3848 +static int thunder_pem_init(struct device *dev, struct pci_config_window *cfg,
3849 + struct resource *res_pem)
3850 {
3851 - struct device *dev = cfg->parent;
3852 - resource_size_t bar4_start;
3853 - struct resource *res_pem;
3854 struct thunder_pem_pci *pem_pci;
3855 - struct platform_device *pdev;
3856 -
3857 - /* Only OF support for now */
3858 - if (!dev->of_node)
3859 - return -EINVAL;
3860 + resource_size_t bar4_start;
3861
3862 pem_pci = devm_kzalloc(dev, sizeof(*pem_pci), GFP_KERNEL);
3863 if (!pem_pci)
3864 return -ENOMEM;
3865
3866 - pdev = to_platform_device(dev);
3867 -
3868 - /*
3869 - * The second register range is the PEM bridge to the PCIe
3870 - * bus. It has a different config access method than those
3871 - * devices behind the bridge.
3872 - */
3873 - res_pem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
3874 - if (!res_pem) {
3875 - dev_err(dev, "missing \"reg[1]\"property\n");
3876 - return -EINVAL;
3877 - }
3878 -
3879 pem_pci->pem_reg_base = devm_ioremap(dev, res_pem->start, 0x10000);
3880 if (!pem_pci->pem_reg_base)
3881 return -ENOMEM;
3882 @@ -332,9 +313,32 @@ static int thunder_pem_init(struct pci_config_window *cfg)
3883 return 0;
3884 }
3885
3886 +static int thunder_pem_platform_init(struct pci_config_window *cfg)
3887 +{
3888 + struct device *dev = cfg->parent;
3889 + struct platform_device *pdev = to_platform_device(dev);
3890 + struct resource *res_pem;
3891 +
3892 + if (!dev->of_node)
3893 + return -EINVAL;
3894 +
3895 + /*
3896 + * The second register range is the PEM bridge to the PCIe
3897 + * bus. It has a different config access method than those
3898 + * devices behind the bridge.
3899 + */
3900 + res_pem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
3901 + if (!res_pem) {
3902 + dev_err(dev, "missing \"reg[1]\"property\n");
3903 + return -EINVAL;
3904 + }
3905 +
3906 + return thunder_pem_init(dev, cfg, res_pem);
3907 +}
3908 +
3909 static struct pci_ecam_ops pci_thunder_pem_ops = {
3910 .bus_shift = 24,
3911 - .init = thunder_pem_init,
3912 + .init = thunder_pem_platform_init,
3913 .pci_ops = {
3914 .map_bus = pci_ecam_map_bus,
3915 .read = thunder_pem_config_read,
3916 diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
3917 index 087a218a875f..5d8151b43fbb 100644
3918 --- a/drivers/pci/quirks.c
3919 +++ b/drivers/pci/quirks.c
3920 @@ -1634,6 +1634,7 @@ static void quirk_pcie_mch(struct pci_dev *pdev)
3921 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_E7520_MCH, quirk_pcie_mch);
3922 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_E7320_MCH, quirk_pcie_mch);
3923 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_E7525_MCH, quirk_pcie_mch);
3924 +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0x1610, quirk_pcie_mch);
3925
3926
3927 /*
3928 @@ -2156,7 +2157,7 @@ static void quirk_blacklist_vpd(struct pci_dev *dev)
3929 {
3930 if (dev->vpd) {
3931 dev->vpd->len = 0;
3932 - dev_warn(&dev->dev, FW_BUG "VPD access disabled\n");
3933 + dev_warn(&dev->dev, FW_BUG "disabling VPD access (can't determine size of non-standard VPD format)\n");
3934 }
3935 }
3936
3937 @@ -2240,6 +2241,27 @@ DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_BROADCOM,
3938 PCI_DEVICE_ID_TIGON3_5719,
3939 quirk_brcm_5719_limit_mrrs);
3940
3941 +#ifdef CONFIG_PCIE_IPROC_PLATFORM
3942 +static void quirk_paxc_bridge(struct pci_dev *pdev)
3943 +{
3944 + /* The PCI config space is shared with the PAXC root port and the first
3945 + * Ethernet device. So, we need to workaround this by telling the PCI
3946 + * code that the bridge is not an Ethernet device.
3947 + */
3948 + if (pdev->hdr_type == PCI_HEADER_TYPE_BRIDGE)
3949 + pdev->class = PCI_CLASS_BRIDGE_PCI << 8;
3950 +
3951 + /* MPSS is not being set properly (as it is currently 0). This is
3952 + * because that area of the PCI config space is hard coded to zero, and
3953 + * is not modifiable by firmware. Set this to 2 (e.g., 512 byte MPS)
3954 + * so that the MPS can be set to the real max value.
3955 + */
3956 + pdev->pcie_mpss = 2;
3957 +}
3958 +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_BROADCOM, 0x16cd, quirk_paxc_bridge);
3959 +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_BROADCOM, 0x16f0, quirk_paxc_bridge);
3960 +#endif
3961 +
3962 /* Originally in EDAC sources for i82875P:
3963 * Intel tells BIOS developers to hide device 6 which
3964 * configures the overflow device access containing
3965 @@ -3114,30 +3136,32 @@ static void quirk_remove_d3_delay(struct pci_dev *dev)
3966 {
3967 dev->d3_delay = 0;
3968 }
3969 -DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0c00, quirk_remove_d3_delay);
3970 +/* C600 Series devices do not need 10ms d3_delay */
3971 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0412, quirk_remove_d3_delay);
3972 +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0c00, quirk_remove_d3_delay);
3973 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0c0c, quirk_remove_d3_delay);
3974 -DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c31, quirk_remove_d3_delay);
3975 -DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c3a, quirk_remove_d3_delay);
3976 -DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c3d, quirk_remove_d3_delay);
3977 -DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c2d, quirk_remove_d3_delay);
3978 -DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c20, quirk_remove_d3_delay);
3979 +/* Lynxpoint-H PCH devices do not need 10ms d3_delay */
3980 +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c02, quirk_remove_d3_delay);
3981 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c18, quirk_remove_d3_delay);
3982 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c1c, quirk_remove_d3_delay);
3983 +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c20, quirk_remove_d3_delay);
3984 +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c22, quirk_remove_d3_delay);
3985 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c26, quirk_remove_d3_delay);
3986 +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c2d, quirk_remove_d3_delay);
3987 +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c31, quirk_remove_d3_delay);
3988 +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c3a, quirk_remove_d3_delay);
3989 +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c3d, quirk_remove_d3_delay);
3990 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c4e, quirk_remove_d3_delay);
3991 -DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c02, quirk_remove_d3_delay);
3992 -DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c22, quirk_remove_d3_delay);
3993 /* Intel Cherrytrail devices do not need 10ms d3_delay */
3994 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x2280, quirk_remove_d3_delay);
3995 +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x2298, quirk_remove_d3_delay);
3996 +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x229c, quirk_remove_d3_delay);
3997 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x22b0, quirk_remove_d3_delay);
3998 +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x22b5, quirk_remove_d3_delay);
3999 +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x22b7, quirk_remove_d3_delay);
4000 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x22b8, quirk_remove_d3_delay);
4001 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x22d8, quirk_remove_d3_delay);
4002 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x22dc, quirk_remove_d3_delay);
4003 -DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x22b5, quirk_remove_d3_delay);
4004 -DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x22b7, quirk_remove_d3_delay);
4005 -DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x2298, quirk_remove_d3_delay);
4006 -DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x229c, quirk_remove_d3_delay);
4007
4008 /*
4009 * Some devices may pass our check in pci_intx_mask_supported() if
4010 @@ -4137,6 +4161,26 @@ static int pci_quirk_intel_pch_acs(struct pci_dev *dev, u16 acs_flags)
4011 }
4012
4013 /*
4014 + * These QCOM root ports do provide ACS-like features to disable peer
4015 + * transactions and validate bus numbers in requests, but do not provide an
4016 + * actual PCIe ACS capability. Hardware supports source validation but it
4017 + * will report the issue as Completer Abort instead of ACS Violation.
4018 + * Hardware doesn't support peer-to-peer and each root port is a root
4019 + * complex with unique segment numbers. It is not possible for one root
4020 + * port to pass traffic to another root port. All PCIe transactions are
4021 + * terminated inside the root port.
4022 + */
4023 +static int pci_quirk_qcom_rp_acs(struct pci_dev *dev, u16 acs_flags)
4024 +{
4025 + u16 flags = (PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF | PCI_ACS_SV);
4026 + int ret = acs_flags & ~flags ? 0 : 1;
4027 +
4028 + dev_info(&dev->dev, "Using QCOM ACS Quirk (%d)\n", ret);
4029 +
4030 + return ret;
4031 +}
4032 +
4033 +/*
4034 * Sunrise Point PCH root ports implement ACS, but unfortunately as shown in
4035 * the datasheet (Intel 100 Series Chipset Family PCH Datasheet, Vol. 2,
4036 * 12.1.46, 12.1.47)[1] this chipset uses dwords for the ACS capability and
4037 @@ -4151,15 +4195,35 @@ static int pci_quirk_intel_pch_acs(struct pci_dev *dev, u16 acs_flags)
4038 *
4039 * N.B. This doesn't fix what lspci shows.
4040 *
4041 + * The 100 series chipset specification update includes this as errata #23[3].
4042 + *
4043 + * The 200 series chipset (Union Point) has the same bug according to the
4044 + * specification update (Intel 200 Series Chipset Family Platform Controller
4045 + * Hub, Specification Update, January 2017, Revision 001, Document# 335194-001,
4046 + * Errata 22)[4]. Per the datasheet[5], root port PCI Device IDs for this
4047 + * chipset include:
4048 + *
4049 + * 0xa290-0xa29f PCI Express Root port #{0-16}
4050 + * 0xa2e7-0xa2ee PCI Express Root port #{17-24}
4051 + *
4052 * [1] http://www.intel.com/content/www/us/en/chipsets/100-series-chipset-datasheet-vol-2.html
4053 * [2] http://www.intel.com/content/www/us/en/chipsets/100-series-chipset-datasheet-vol-1.html
4054 + * [3] http://www.intel.com/content/www/us/en/chipsets/100-series-chipset-spec-update.html
4055 + * [4] http://www.intel.com/content/www/us/en/chipsets/200-series-chipset-pch-spec-update.html
4056 + * [5] http://www.intel.com/content/www/us/en/chipsets/200-series-chipset-pch-datasheet-vol-1.html
4057 */
4058 static bool pci_quirk_intel_spt_pch_acs_match(struct pci_dev *dev)
4059 {
4060 - return pci_is_pcie(dev) &&
4061 - pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT &&
4062 - ((dev->device & ~0xf) == 0xa110 ||
4063 - (dev->device >= 0xa167 && dev->device <= 0xa16a));
4064 + if (!pci_is_pcie(dev) || pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT)
4065 + return false;
4066 +
4067 + switch (dev->device) {
4068 + case 0xa110 ... 0xa11f: case 0xa167 ... 0xa16a: /* Sunrise Point */
4069 + case 0xa290 ... 0xa29f: case 0xa2e7 ... 0xa2ee: /* Union Point */
4070 + return true;
4071 + }
4072 +
4073 + return false;
4074 }
4075
4076 #define INTEL_SPT_ACS_CTRL (PCI_ACS_CAP + 4)
4077 @@ -4272,6 +4336,9 @@ static const struct pci_dev_acs_enabled {
4078 /* I219 */
4079 { PCI_VENDOR_ID_INTEL, 0x15b7, pci_quirk_mf_endpoint_acs },
4080 { PCI_VENDOR_ID_INTEL, 0x15b8, pci_quirk_mf_endpoint_acs },
4081 + /* QCOM QDF2xxx root ports */
4082 + { 0x17cb, 0x400, pci_quirk_qcom_rp_acs },
4083 + { 0x17cb, 0x401, pci_quirk_qcom_rp_acs },
4084 /* Intel PCH root ports */
4085 { PCI_VENDOR_ID_INTEL, PCI_ANY_ID, pci_quirk_intel_pch_acs },
4086 { PCI_VENDOR_ID_INTEL, PCI_ANY_ID, pci_quirk_intel_spt_pch_acs },
4087 diff --git a/drivers/platform/x86/acer-wmi.c b/drivers/platform/x86/acer-wmi.c
4088 index 79d64ea00bfb..a66192f692e3 100644
4089 --- a/drivers/platform/x86/acer-wmi.c
4090 +++ b/drivers/platform/x86/acer-wmi.c
4091 @@ -355,6 +355,32 @@ static const struct dmi_system_id acer_blacklist[] __initconst = {
4092 {}
4093 };
4094
4095 +static const struct dmi_system_id amw0_whitelist[] __initconst = {
4096 + {
4097 + .ident = "Acer",
4098 + .matches = {
4099 + DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
4100 + },
4101 + },
4102 + {
4103 + .ident = "Gateway",
4104 + .matches = {
4105 + DMI_MATCH(DMI_SYS_VENDOR, "Gateway"),
4106 + },
4107 + },
4108 + {
4109 + .ident = "Packard Bell",
4110 + .matches = {
4111 + DMI_MATCH(DMI_SYS_VENDOR, "Packard Bell"),
4112 + },
4113 + },
4114 + {}
4115 +};
4116 +
4117 +/*
4118 + * This quirk table is only for Acer/Gateway/Packard Bell family
4119 + * that those machines are supported by acer-wmi driver.
4120 + */
4121 static const struct dmi_system_id acer_quirks[] __initconst = {
4122 {
4123 .callback = dmi_matched,
4124 @@ -464,6 +490,17 @@ static const struct dmi_system_id acer_quirks[] __initconst = {
4125 },
4126 .driver_data = &quirk_acer_travelmate_2490,
4127 },
4128 + {}
4129 +};
4130 +
4131 +/*
4132 + * This quirk list is for those non-acer machines that have AMW0_GUID1
4133 + * but supported by acer-wmi in past days. Keeping this quirk list here
4134 + * is only for backward compatible. Please do not add new machine to
4135 + * here anymore. Those non-acer machines should be supported by
4136 + * appropriate wmi drivers.
4137 + */
4138 +static const struct dmi_system_id non_acer_quirks[] __initconst = {
4139 {
4140 .callback = dmi_matched,
4141 .ident = "Fujitsu Siemens Amilo Li 1718",
4142 @@ -598,6 +635,7 @@ static void __init find_quirks(void)
4143 {
4144 if (!force_series) {
4145 dmi_check_system(acer_quirks);
4146 + dmi_check_system(non_acer_quirks);
4147 } else if (force_series == 2490) {
4148 quirks = &quirk_acer_travelmate_2490;
4149 }
4150 @@ -2108,6 +2146,24 @@ static int __init acer_wmi_init(void)
4151 find_quirks();
4152
4153 /*
4154 + * The AMW0_GUID1 wmi is not only found on Acer family but also other
4155 + * machines like Lenovo, Fujitsu and Medion. In the past days,
4156 + * acer-wmi driver handled those non-Acer machines by quirks list.
4157 + * But actually acer-wmi driver was loaded on any machines that have
4158 + * AMW0_GUID1. This behavior is strange because those machines should
4159 + * be supported by appropriate wmi drivers. e.g. fujitsu-laptop,
4160 + * ideapad-laptop. So, here checks the machine that has AMW0_GUID1
4161 + * should be in Acer/Gateway/Packard Bell white list, or it's already
4162 + * in the past quirk list.
4163 + */
4164 + if (wmi_has_guid(AMW0_GUID1) &&
4165 + !dmi_check_system(amw0_whitelist) &&
4166 + quirks == &quirk_unknown) {
4167 + pr_err("Unsupported machine has AMW0_GUID1, unable to load\n");
4168 + return -ENODEV;
4169 + }
4170 +
4171 + /*
4172 * Detect which ACPI-WMI interface we're using.
4173 */
4174 if (wmi_has_guid(AMW0_GUID1) && wmi_has_guid(WMID_GUID1))
4175 diff --git a/drivers/platform/x86/asus-nb-wmi.c b/drivers/platform/x86/asus-nb-wmi.c
4176 index 6032b7085582..6eb2837f6b89 100644
4177 --- a/drivers/platform/x86/asus-nb-wmi.c
4178 +++ b/drivers/platform/x86/asus-nb-wmi.c
4179 @@ -116,6 +116,10 @@ static struct quirk_entry quirk_asus_ux303ub = {
4180 .wmi_backlight_native = true,
4181 };
4182
4183 +static struct quirk_entry quirk_asus_x550lb = {
4184 + .xusb2pr = 0x01D9,
4185 +};
4186 +
4187 static int dmi_matched(const struct dmi_system_id *dmi)
4188 {
4189 quirks = dmi->driver_data;
4190 @@ -407,6 +411,15 @@ static const struct dmi_system_id asus_quirks[] = {
4191 },
4192 .driver_data = &quirk_asus_ux303ub,
4193 },
4194 + {
4195 + .callback = dmi_matched,
4196 + .ident = "ASUSTeK COMPUTER INC. X550LB",
4197 + .matches = {
4198 + DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
4199 + DMI_MATCH(DMI_PRODUCT_NAME, "X550LB"),
4200 + },
4201 + .driver_data = &quirk_asus_x550lb,
4202 + },
4203 {},
4204 };
4205
4206 diff --git a/drivers/platform/x86/asus-wmi.c b/drivers/platform/x86/asus-wmi.c
4207 index ce6ca31a2d09..8499d3ae4257 100644
4208 --- a/drivers/platform/x86/asus-wmi.c
4209 +++ b/drivers/platform/x86/asus-wmi.c
4210 @@ -156,6 +156,11 @@ MODULE_LICENSE("GPL");
4211 #define ASUS_FAN_CTRL_MANUAL 1
4212 #define ASUS_FAN_CTRL_AUTO 2
4213
4214 +#define USB_INTEL_XUSB2PR 0xD0
4215 +#define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI 0x9c31
4216 +
4217 +static const char * const ashs_ids[] = { "ATK4001", "ATK4002", NULL };
4218 +
4219 struct bios_args {
4220 u32 arg0;
4221 u32 arg1;
4222 @@ -1080,6 +1085,29 @@ static int asus_wmi_rfkill_init(struct asus_wmi *asus)
4223 return result;
4224 }
4225
4226 +static void asus_wmi_set_xusb2pr(struct asus_wmi *asus)
4227 +{
4228 + struct pci_dev *xhci_pdev;
4229 + u32 orig_ports_available;
4230 + u32 ports_available = asus->driver->quirks->xusb2pr;
4231 +
4232 + xhci_pdev = pci_get_device(PCI_VENDOR_ID_INTEL,
4233 + PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI,
4234 + NULL);
4235 +
4236 + if (!xhci_pdev)
4237 + return;
4238 +
4239 + pci_read_config_dword(xhci_pdev, USB_INTEL_XUSB2PR,
4240 + &orig_ports_available);
4241 +
4242 + pci_write_config_dword(xhci_pdev, USB_INTEL_XUSB2PR,
4243 + cpu_to_le32(ports_available));
4244 +
4245 + pr_info("set USB_INTEL_XUSB2PR old: 0x%04x, new: 0x%04x\n",
4246 + orig_ports_available, ports_available);
4247 +}
4248 +
4249 /*
4250 * Hwmon device
4251 */
4252 @@ -2025,6 +2053,16 @@ static int asus_wmi_fan_init(struct asus_wmi *asus)
4253 return 0;
4254 }
4255
4256 +static bool ashs_present(void)
4257 +{
4258 + int i = 0;
4259 + while (ashs_ids[i]) {
4260 + if (acpi_dev_found(ashs_ids[i++]))
4261 + return true;
4262 + }
4263 + return false;
4264 +}
4265 +
4266 /*
4267 * WMI Driver
4268 */
4269 @@ -2069,6 +2107,13 @@ static int asus_wmi_add(struct platform_device *pdev)
4270 if (err)
4271 goto fail_leds;
4272
4273 + asus_wmi_get_devstate(asus, ASUS_WMI_DEVID_WLAN, &result);
4274 + if (result & (ASUS_WMI_DSTS_PRESENCE_BIT | ASUS_WMI_DSTS_USER_BIT))
4275 + asus->driver->wlan_ctrl_by_user = 1;
4276 +
4277 + if (asus->driver->wlan_ctrl_by_user && ashs_present())
4278 + asus->driver->quirks->no_rfkill = 1;
4279 +
4280 if (!asus->driver->quirks->no_rfkill) {
4281 err = asus_wmi_rfkill_init(asus);
4282 if (err)
4283 @@ -2087,6 +2132,9 @@ static int asus_wmi_add(struct platform_device *pdev)
4284 if (asus->driver->quirks->wmi_backlight_native)
4285 acpi_video_set_dmi_backlight_type(acpi_backlight_native);
4286
4287 + if (asus->driver->quirks->xusb2pr)
4288 + asus_wmi_set_xusb2pr(asus);
4289 +
4290 if (acpi_video_get_backlight_type() == acpi_backlight_vendor) {
4291 err = asus_wmi_backlight_init(asus);
4292 if (err && err != -ENODEV)
4293 @@ -2105,10 +2153,6 @@ static int asus_wmi_add(struct platform_device *pdev)
4294 if (err)
4295 goto fail_debugfs;
4296
4297 - asus_wmi_get_devstate(asus, ASUS_WMI_DEVID_WLAN, &result);
4298 - if (result & (ASUS_WMI_DSTS_PRESENCE_BIT | ASUS_WMI_DSTS_USER_BIT))
4299 - asus->driver->wlan_ctrl_by_user = 1;
4300 -
4301 return 0;
4302
4303 fail_debugfs:
4304 diff --git a/drivers/platform/x86/asus-wmi.h b/drivers/platform/x86/asus-wmi.h
4305 index 0e19014e9f54..fdff626c3b51 100644
4306 --- a/drivers/platform/x86/asus-wmi.h
4307 +++ b/drivers/platform/x86/asus-wmi.h
4308 @@ -53,6 +53,7 @@ struct quirk_entry {
4309 * and let the ACPI interrupt to send out the key event.
4310 */
4311 int no_display_toggle;
4312 + u32 xusb2pr;
4313
4314 bool (*i8042_filter)(unsigned char data, unsigned char str,
4315 struct serio *serio);
4316 diff --git a/drivers/scsi/ufs/ufs-qcom.c b/drivers/scsi/ufs/ufs-qcom.c
4317 index 3aedf73f1131..462bf42dd19c 100644
4318 --- a/drivers/scsi/ufs/ufs-qcom.c
4319 +++ b/drivers/scsi/ufs/ufs-qcom.c
4320 @@ -23,6 +23,7 @@
4321 #include "unipro.h"
4322 #include "ufs-qcom.h"
4323 #include "ufshci.h"
4324 +#include "ufs_quirks.h"
4325 #define UFS_QCOM_DEFAULT_DBG_PRINT_EN \
4326 (UFS_QCOM_DBG_PRINT_REGS_EN | UFS_QCOM_DBG_PRINT_TEST_BUS_EN)
4327
4328 @@ -1031,6 +1032,34 @@ static int ufs_qcom_pwr_change_notify(struct ufs_hba *hba,
4329 return ret;
4330 }
4331
4332 +static int ufs_qcom_quirk_host_pa_saveconfigtime(struct ufs_hba *hba)
4333 +{
4334 + int err;
4335 + u32 pa_vs_config_reg1;
4336 +
4337 + err = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_VS_CONFIG_REG1),
4338 + &pa_vs_config_reg1);
4339 + if (err)
4340 + goto out;
4341 +
4342 + /* Allow extension of MSB bits of PA_SaveConfigTime attribute */
4343 + err = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_VS_CONFIG_REG1),
4344 + (pa_vs_config_reg1 | (1 << 12)));
4345 +
4346 +out:
4347 + return err;
4348 +}
4349 +
4350 +static int ufs_qcom_apply_dev_quirks(struct ufs_hba *hba)
4351 +{
4352 + int err = 0;
4353 +
4354 + if (hba->dev_quirks & UFS_DEVICE_QUIRK_HOST_PA_SAVECONFIGTIME)
4355 + err = ufs_qcom_quirk_host_pa_saveconfigtime(hba);
4356 +
4357 + return err;
4358 +}
4359 +
4360 static u32 ufs_qcom_get_ufs_hci_version(struct ufs_hba *hba)
4361 {
4362 struct ufs_qcom_host *host = ufshcd_get_variant(hba);
4363 @@ -1616,6 +1645,7 @@ static struct ufs_hba_variant_ops ufs_hba_qcom_vops = {
4364 .hce_enable_notify = ufs_qcom_hce_enable_notify,
4365 .link_startup_notify = ufs_qcom_link_startup_notify,
4366 .pwr_change_notify = ufs_qcom_pwr_change_notify,
4367 + .apply_dev_quirks = ufs_qcom_apply_dev_quirks,
4368 .suspend = ufs_qcom_suspend,
4369 .resume = ufs_qcom_resume,
4370 .dbg_register_dump = ufs_qcom_dump_dbg_regs,
4371 diff --git a/drivers/scsi/ufs/ufs-qcom.h b/drivers/scsi/ufs/ufs-qcom.h
4372 index a19307a57ce2..fe517cd7dac3 100644
4373 --- a/drivers/scsi/ufs/ufs-qcom.h
4374 +++ b/drivers/scsi/ufs/ufs-qcom.h
4375 @@ -142,6 +142,7 @@ enum ufs_qcom_phy_init_type {
4376 UFS_QCOM_DBG_PRINT_TEST_BUS_EN)
4377
4378 /* QUniPro Vendor specific attributes */
4379 +#define PA_VS_CONFIG_REG1 0x9000
4380 #define DME_VS_CORE_CLK_CTRL 0xD002
4381 /* bit and mask definitions for DME_VS_CORE_CLK_CTRL attribute */
4382 #define DME_VS_CORE_CLK_CTRL_CORE_CLK_DIV_EN_BIT BIT(8)
4383 diff --git a/drivers/scsi/ufs/ufs_quirks.h b/drivers/scsi/ufs/ufs_quirks.h
4384 index 22f881e9253a..08b799d4efcc 100644
4385 --- a/drivers/scsi/ufs/ufs_quirks.h
4386 +++ b/drivers/scsi/ufs/ufs_quirks.h
4387 @@ -128,26 +128,23 @@ struct ufs_dev_fix {
4388 */
4389 #define UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM (1 << 6)
4390
4391 +/*
4392 + * Some UFS devices require host PA_TACTIVATE to be lower than device
4393 + * PA_TACTIVATE, enabling this quirk ensure this.
4394 + */
4395 +#define UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE (1 << 7)
4396 +
4397 +/*
4398 + * The max. value PA_SaveConfigTime is 250 (10us) but this is not enough for
4399 + * some vendors.
4400 + * Gear switch from PWM to HS may fail even with this max. PA_SaveConfigTime.
4401 + * Gear switch can be issued by host controller as an error recovery and any
4402 + * software delay will not help on this case so we need to increase
4403 + * PA_SaveConfigTime to >32us as per vendor recommendation.
4404 + */
4405 +#define UFS_DEVICE_QUIRK_HOST_PA_SAVECONFIGTIME (1 << 8)
4406 +
4407 struct ufs_hba;
4408 void ufs_advertise_fixup_device(struct ufs_hba *hba);
4409
4410 -static struct ufs_dev_fix ufs_fixups[] = {
4411 - /* UFS cards deviations table */
4412 - UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
4413 - UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
4414 - UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL, UFS_DEVICE_NO_VCCQ),
4415 - UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
4416 - UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS),
4417 - UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
4418 - UFS_DEVICE_NO_FASTAUTO),
4419 - UFS_FIX(UFS_VENDOR_TOSHIBA, UFS_ANY_MODEL,
4420 - UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
4421 - UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9C8KBADG",
4422 - UFS_DEVICE_QUIRK_PA_TACTIVATE),
4423 - UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9D8KBADG",
4424 - UFS_DEVICE_QUIRK_PA_TACTIVATE),
4425 - UFS_FIX(UFS_VENDOR_SKHYNIX, UFS_ANY_MODEL, UFS_DEVICE_NO_VCCQ),
4426 -
4427 - END_FIX
4428 -};
4429 #endif /* UFS_QUIRKS_H_ */
4430 diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
4431 index 05c745663c10..edb06e466224 100644
4432 --- a/drivers/scsi/ufs/ufshcd.c
4433 +++ b/drivers/scsi/ufs/ufshcd.c
4434 @@ -123,6 +123,7 @@ enum {
4435 UFSHCD_STATE_RESET,
4436 UFSHCD_STATE_ERROR,
4437 UFSHCD_STATE_OPERATIONAL,
4438 + UFSHCD_STATE_EH_SCHEDULED,
4439 };
4440
4441 /* UFSHCD error handling flags */
4442 @@ -188,6 +189,30 @@ ufs_get_pm_lvl_to_link_pwr_state(enum ufs_pm_level lvl)
4443 return ufs_pm_lvl_states[lvl].link_state;
4444 }
4445
4446 +static struct ufs_dev_fix ufs_fixups[] = {
4447 + /* UFS cards deviations table */
4448 + UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
4449 + UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
4450 + UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL, UFS_DEVICE_NO_VCCQ),
4451 + UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
4452 + UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS),
4453 + UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
4454 + UFS_DEVICE_NO_FASTAUTO),
4455 + UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
4456 + UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE),
4457 + UFS_FIX(UFS_VENDOR_TOSHIBA, UFS_ANY_MODEL,
4458 + UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
4459 + UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9C8KBADG",
4460 + UFS_DEVICE_QUIRK_PA_TACTIVATE),
4461 + UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9D8KBADG",
4462 + UFS_DEVICE_QUIRK_PA_TACTIVATE),
4463 + UFS_FIX(UFS_VENDOR_SKHYNIX, UFS_ANY_MODEL, UFS_DEVICE_NO_VCCQ),
4464 + UFS_FIX(UFS_VENDOR_SKHYNIX, UFS_ANY_MODEL,
4465 + UFS_DEVICE_QUIRK_HOST_PA_SAVECONFIGTIME),
4466 +
4467 + END_FIX
4468 +};
4469 +
4470 static void ufshcd_tmc_handler(struct ufs_hba *hba);
4471 static void ufshcd_async_scan(void *data, async_cookie_t cookie);
4472 static int ufshcd_reset_and_restore(struct ufs_hba *hba);
4473 @@ -1088,7 +1113,7 @@ ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
4474 *
4475 * Returns 0 in case of success, non-zero value in case of failure
4476 */
4477 -static int ufshcd_map_sg(struct ufshcd_lrb *lrbp)
4478 +static int ufshcd_map_sg(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
4479 {
4480 struct ufshcd_sg_entry *prd_table;
4481 struct scatterlist *sg;
4482 @@ -1102,8 +1127,13 @@ static int ufshcd_map_sg(struct ufshcd_lrb *lrbp)
4483 return sg_segments;
4484
4485 if (sg_segments) {
4486 - lrbp->utr_descriptor_ptr->prd_table_length =
4487 - cpu_to_le16((u16) (sg_segments));
4488 + if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN)
4489 + lrbp->utr_descriptor_ptr->prd_table_length =
4490 + cpu_to_le16((u16)(sg_segments *
4491 + sizeof(struct ufshcd_sg_entry)));
4492 + else
4493 + lrbp->utr_descriptor_ptr->prd_table_length =
4494 + cpu_to_le16((u16) (sg_segments));
4495
4496 prd_table = (struct ufshcd_sg_entry *)lrbp->ucd_prdt_ptr;
4497
4498 @@ -1410,6 +1440,7 @@ static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
4499 switch (hba->ufshcd_state) {
4500 case UFSHCD_STATE_OPERATIONAL:
4501 break;
4502 + case UFSHCD_STATE_EH_SCHEDULED:
4503 case UFSHCD_STATE_RESET:
4504 err = SCSI_MLQUEUE_HOST_BUSY;
4505 goto out_unlock;
4506 @@ -1465,7 +1496,7 @@ static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
4507
4508 ufshcd_comp_scsi_upiu(hba, lrbp);
4509
4510 - err = ufshcd_map_sg(lrbp);
4511 + err = ufshcd_map_sg(hba, lrbp);
4512 if (err) {
4513 lrbp->cmd = NULL;
4514 clear_bit_unlock(tag, &hba->lrb_in_use);
4515 @@ -2320,12 +2351,21 @@ static void ufshcd_host_memory_configure(struct ufs_hba *hba)
4516 cpu_to_le32(upper_32_bits(cmd_desc_element_addr));
4517
4518 /* Response upiu and prdt offset should be in double words */
4519 - utrdlp[i].response_upiu_offset =
4520 + if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN) {
4521 + utrdlp[i].response_upiu_offset =
4522 + cpu_to_le16(response_offset);
4523 + utrdlp[i].prd_table_offset =
4524 + cpu_to_le16(prdt_offset);
4525 + utrdlp[i].response_upiu_length =
4526 + cpu_to_le16(ALIGNED_UPIU_SIZE);
4527 + } else {
4528 + utrdlp[i].response_upiu_offset =
4529 cpu_to_le16((response_offset >> 2));
4530 - utrdlp[i].prd_table_offset =
4531 + utrdlp[i].prd_table_offset =
4532 cpu_to_le16((prdt_offset >> 2));
4533 - utrdlp[i].response_upiu_length =
4534 + utrdlp[i].response_upiu_length =
4535 cpu_to_le16(ALIGNED_UPIU_SIZE >> 2);
4536 + }
4537
4538 hba->lrb[i].utr_descriptor_ptr = (utrdlp + i);
4539 hba->lrb[i].ucd_req_ptr =
4540 @@ -3090,7 +3130,16 @@ static int ufshcd_link_startup(struct ufs_hba *hba)
4541 {
4542 int ret;
4543 int retries = DME_LINKSTARTUP_RETRIES;
4544 + bool link_startup_again = false;
4545
4546 + /*
4547 + * If UFS device isn't active then we will have to issue link startup
4548 + * 2 times to make sure the device state move to active.
4549 + */
4550 + if (!ufshcd_is_ufs_dev_active(hba))
4551 + link_startup_again = true;
4552 +
4553 +link_startup:
4554 do {
4555 ufshcd_vops_link_startup_notify(hba, PRE_CHANGE);
4556
4557 @@ -3116,6 +3165,12 @@ static int ufshcd_link_startup(struct ufs_hba *hba)
4558 /* failed to get the link up... retire */
4559 goto out;
4560
4561 + if (link_startup_again) {
4562 + link_startup_again = false;
4563 + retries = DME_LINKSTARTUP_RETRIES;
4564 + goto link_startup;
4565 + }
4566 +
4567 if (hba->quirks & UFSHCD_QUIRK_BROKEN_LCC) {
4568 ret = ufshcd_disable_device_tx_lcc(hba);
4569 if (ret)
4570 @@ -4158,7 +4213,7 @@ static void ufshcd_check_errors(struct ufs_hba *hba)
4571 /* block commands from scsi mid-layer */
4572 scsi_block_requests(hba->host);
4573
4574 - hba->ufshcd_state = UFSHCD_STATE_ERROR;
4575 + hba->ufshcd_state = UFSHCD_STATE_EH_SCHEDULED;
4576 schedule_work(&hba->eh_work);
4577 }
4578 }
4579 @@ -4965,6 +5020,76 @@ static int ufshcd_tune_pa_hibern8time(struct ufs_hba *hba)
4580 return ret;
4581 }
4582
4583 +/**
4584 + * ufshcd_quirk_tune_host_pa_tactivate - Ensures that host PA_TACTIVATE is
4585 + * less than device PA_TACTIVATE time.
4586 + * @hba: per-adapter instance
4587 + *
4588 + * Some UFS devices require host PA_TACTIVATE to be lower than device
4589 + * PA_TACTIVATE, we need to enable UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE quirk
4590 + * for such devices.
4591 + *
4592 + * Returns zero on success, non-zero error value on failure.
4593 + */
4594 +static int ufshcd_quirk_tune_host_pa_tactivate(struct ufs_hba *hba)
4595 +{
4596 + int ret = 0;
4597 + u32 granularity, peer_granularity;
4598 + u32 pa_tactivate, peer_pa_tactivate;
4599 + u32 pa_tactivate_us, peer_pa_tactivate_us;
4600 + u8 gran_to_us_table[] = {1, 4, 8, 16, 32, 100};
4601 +
4602 + ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
4603 + &granularity);
4604 + if (ret)
4605 + goto out;
4606 +
4607 + ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
4608 + &peer_granularity);
4609 + if (ret)
4610 + goto out;
4611 +
4612 + if ((granularity < PA_GRANULARITY_MIN_VAL) ||
4613 + (granularity > PA_GRANULARITY_MAX_VAL)) {
4614 + dev_err(hba->dev, "%s: invalid host PA_GRANULARITY %d",
4615 + __func__, granularity);
4616 + return -EINVAL;
4617 + }
4618 +
4619 + if ((peer_granularity < PA_GRANULARITY_MIN_VAL) ||
4620 + (peer_granularity > PA_GRANULARITY_MAX_VAL)) {
4621 + dev_err(hba->dev, "%s: invalid device PA_GRANULARITY %d",
4622 + __func__, peer_granularity);
4623 + return -EINVAL;
4624 + }
4625 +
4626 + ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_TACTIVATE), &pa_tactivate);
4627 + if (ret)
4628 + goto out;
4629 +
4630 + ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_TACTIVATE),
4631 + &peer_pa_tactivate);
4632 + if (ret)
4633 + goto out;
4634 +
4635 + pa_tactivate_us = pa_tactivate * gran_to_us_table[granularity - 1];
4636 + peer_pa_tactivate_us = peer_pa_tactivate *
4637 + gran_to_us_table[peer_granularity - 1];
4638 +
4639 + if (pa_tactivate_us > peer_pa_tactivate_us) {
4640 + u32 new_peer_pa_tactivate;
4641 +
4642 + new_peer_pa_tactivate = pa_tactivate_us /
4643 + gran_to_us_table[peer_granularity - 1];
4644 + new_peer_pa_tactivate++;
4645 + ret = ufshcd_dme_peer_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
4646 + new_peer_pa_tactivate);
4647 + }
4648 +
4649 +out:
4650 + return ret;
4651 +}
4652 +
4653 static void ufshcd_tune_unipro_params(struct ufs_hba *hba)
4654 {
4655 if (ufshcd_is_unipro_pa_params_tuning_req(hba)) {
4656 @@ -4975,6 +5100,11 @@ static void ufshcd_tune_unipro_params(struct ufs_hba *hba)
4657 if (hba->dev_quirks & UFS_DEVICE_QUIRK_PA_TACTIVATE)
4658 /* set 1ms timeout for PA_TACTIVATE */
4659 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), 10);
4660 +
4661 + if (hba->dev_quirks & UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE)
4662 + ufshcd_quirk_tune_host_pa_tactivate(hba);
4663 +
4664 + ufshcd_vops_apply_dev_quirks(hba);
4665 }
4666
4667 /**
4668 @@ -6515,10 +6645,12 @@ int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq)
4669 pm_runtime_get_sync(dev);
4670
4671 /*
4672 - * The device-initialize-sequence hasn't been invoked yet.
4673 - * Set the device to power-off state
4674 + * We are assuming that device wasn't put in sleep/power-down
4675 + * state exclusively during the boot stage before kernel.
4676 + * This assumption helps avoid doing link startup twice during
4677 + * ufshcd_probe_hba().
4678 */
4679 - ufshcd_set_ufs_dev_poweroff(hba);
4680 + ufshcd_set_ufs_dev_active(hba);
4681
4682 async_schedule(ufshcd_async_scan, hba);
4683
4684 diff --git a/drivers/scsi/ufs/ufshcd.h b/drivers/scsi/ufs/ufshcd.h
4685 index 430bef111293..04509827fe64 100644
4686 --- a/drivers/scsi/ufs/ufshcd.h
4687 +++ b/drivers/scsi/ufs/ufshcd.h
4688 @@ -261,6 +261,7 @@ struct ufs_pwr_mode_info {
4689 * @pwr_change_notify: called before and after a power mode change
4690 * is carried out to allow vendor spesific capabilities
4691 * to be set.
4692 + * @apply_dev_quirks: called to apply device specific quirks
4693 * @suspend: called during host controller PM callback
4694 * @resume: called during host controller PM callback
4695 * @dbg_register_dump: used to dump controller debug information
4696 @@ -283,6 +284,7 @@ struct ufs_hba_variant_ops {
4697 enum ufs_notify_change_status status,
4698 struct ufs_pa_layer_attr *,
4699 struct ufs_pa_layer_attr *);
4700 + int (*apply_dev_quirks)(struct ufs_hba *);
4701 int (*suspend)(struct ufs_hba *, enum ufs_pm_op);
4702 int (*resume)(struct ufs_hba *, enum ufs_pm_op);
4703 void (*dbg_register_dump)(struct ufs_hba *hba);
4704 @@ -474,6 +476,12 @@ struct ufs_hba {
4705 */
4706 #define UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION UFS_BIT(5)
4707
4708 + /*
4709 + * This quirk needs to be enabled if the host contoller regards
4710 + * resolution of the values of PRDTO and PRDTL in UTRD as byte.
4711 + */
4712 + #define UFSHCD_QUIRK_PRDT_BYTE_GRAN UFS_BIT(7)
4713 +
4714 unsigned int quirks; /* Deviations from standard UFSHCI spec. */
4715
4716 /* Device deviations from standard UFS device spec. */
4717 @@ -799,6 +807,13 @@ static inline int ufshcd_vops_pwr_change_notify(struct ufs_hba *hba,
4718 return -ENOTSUPP;
4719 }
4720
4721 +static inline int ufshcd_vops_apply_dev_quirks(struct ufs_hba *hba)
4722 +{
4723 + if (hba->vops && hba->vops->apply_dev_quirks)
4724 + return hba->vops->apply_dev_quirks(hba);
4725 + return 0;
4726 +}
4727 +
4728 static inline int ufshcd_vops_suspend(struct ufs_hba *hba, enum ufs_pm_op op)
4729 {
4730 if (hba->vops && hba->vops->suspend)
4731 diff --git a/drivers/scsi/ufs/unipro.h b/drivers/scsi/ufs/unipro.h
4732 index eff8b5675575..23129d7b2678 100644
4733 --- a/drivers/scsi/ufs/unipro.h
4734 +++ b/drivers/scsi/ufs/unipro.h
4735 @@ -123,6 +123,7 @@
4736 #define PA_MAXRXHSGEAR 0x1587
4737 #define PA_RXHSUNTERMCAP 0x15A5
4738 #define PA_RXLSTERMCAP 0x15A6
4739 +#define PA_GRANULARITY 0x15AA
4740 #define PA_PACPREQTIMEOUT 0x1590
4741 #define PA_PACPREQEOBTIMEOUT 0x1591
4742 #define PA_HIBERN8TIME 0x15A7
4743 @@ -158,6 +159,9 @@
4744 #define VS_DEBUGOMC 0xD09E
4745 #define VS_POWERSTATE 0xD083
4746
4747 +#define PA_GRANULARITY_MIN_VAL 1
4748 +#define PA_GRANULARITY_MAX_VAL 6
4749 +
4750 /* PHY Adapter Protocol Constants */
4751 #define PA_MAXDATALANES 4
4752
4753 diff --git a/drivers/staging/android/ashmem.c b/drivers/staging/android/ashmem.c
4754 index ca9a53c03f0f..2b770cb0c488 100644
4755 --- a/drivers/staging/android/ashmem.c
4756 +++ b/drivers/staging/android/ashmem.c
4757 @@ -405,6 +405,7 @@ static int ashmem_mmap(struct file *file, struct vm_area_struct *vma)
4758 ret = PTR_ERR(vmfile);
4759 goto out;
4760 }
4761 + vmfile->f_mode |= FMODE_LSEEK;
4762 asma->file = vmfile;
4763 }
4764 get_file(asma->file);
4765 diff --git a/drivers/tty/serial/8250/8250_omap.c b/drivers/tty/serial/8250/8250_omap.c
4766 index 61ad6c3b20a0..f4eb807a2616 100644
4767 --- a/drivers/tty/serial/8250/8250_omap.c
4768 +++ b/drivers/tty/serial/8250/8250_omap.c
4769 @@ -1075,15 +1075,15 @@ static int omap8250_no_handle_irq(struct uart_port *port)
4770 }
4771
4772 static const u8 am3352_habit = OMAP_DMA_TX_KICK | UART_ERRATA_CLOCK_DISABLE;
4773 -static const u8 am4372_habit = UART_ERRATA_CLOCK_DISABLE;
4774 +static const u8 dra742_habit = UART_ERRATA_CLOCK_DISABLE;
4775
4776 static const struct of_device_id omap8250_dt_ids[] = {
4777 { .compatible = "ti,omap2-uart" },
4778 { .compatible = "ti,omap3-uart" },
4779 { .compatible = "ti,omap4-uart" },
4780 { .compatible = "ti,am3352-uart", .data = &am3352_habit, },
4781 - { .compatible = "ti,am4372-uart", .data = &am4372_habit, },
4782 - { .compatible = "ti,dra742-uart", .data = &am4372_habit, },
4783 + { .compatible = "ti,am4372-uart", .data = &am3352_habit, },
4784 + { .compatible = "ti,dra742-uart", .data = &dra742_habit, },
4785 {},
4786 };
4787 MODULE_DEVICE_TABLE(of, omap8250_dt_ids);
4788 @@ -1218,9 +1218,6 @@ static int omap8250_probe(struct platform_device *pdev)
4789 priv->omap8250_dma.rx_size = RX_TRIGGER;
4790 priv->omap8250_dma.rxconf.src_maxburst = RX_TRIGGER;
4791 priv->omap8250_dma.txconf.dst_maxburst = TX_TRIGGER;
4792 -
4793 - if (of_machine_is_compatible("ti,am33xx"))
4794 - priv->habit |= OMAP_DMA_TX_KICK;
4795 /*
4796 * pause is currently not supported atleast on omap-sdma
4797 * and edma on most earlier kernels.
4798 diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c b/drivers/usb/chipidea/ci_hdrc_msm.c
4799 index 3889809fd0c4..37591a4b1346 100644
4800 --- a/drivers/usb/chipidea/ci_hdrc_msm.c
4801 +++ b/drivers/usb/chipidea/ci_hdrc_msm.c
4802 @@ -24,7 +24,6 @@ static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, unsigned event)
4803 switch (event) {
4804 case CI_HDRC_CONTROLLER_RESET_EVENT:
4805 dev_dbg(dev, "CI_HDRC_CONTROLLER_RESET_EVENT received\n");
4806 - writel(0, USB_AHBBURST);
4807 /* use AHB transactor, allow posted data writes */
4808 writel(0x8, USB_AHBMODE);
4809 usb_phy_init(ci->usb_phy);
4810 @@ -47,7 +46,8 @@ static struct ci_hdrc_platform_data ci_hdrc_msm_platdata = {
4811 .name = "ci_hdrc_msm",
4812 .capoffset = DEF_CAPOFFSET,
4813 .flags = CI_HDRC_REGS_SHARED |
4814 - CI_HDRC_DISABLE_STREAMING,
4815 + CI_HDRC_DISABLE_STREAMING |
4816 + CI_HDRC_OVERRIDE_AHB_BURST,
4817
4818 .notify_event = ci_hdrc_msm_notify_event,
4819 };
4820 diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
4821 index 5dc6bfc91f4b..ce603dcbd493 100644
4822 --- a/drivers/usb/dwc3/gadget.c
4823 +++ b/drivers/usb/dwc3/gadget.c
4824 @@ -174,6 +174,7 @@ void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req,
4825 int status)
4826 {
4827 struct dwc3 *dwc = dep->dwc;
4828 + unsigned int unmap_after_complete = false;
4829
4830 req->started = false;
4831 list_del(&req->list);
4832 @@ -182,11 +183,19 @@ void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req,
4833 if (req->request.status == -EINPROGRESS)
4834 req->request.status = status;
4835
4836 - if (dwc->ep0_bounced && dep->number <= 1)
4837 + /*
4838 + * NOTICE we don't want to unmap before calling ->complete() if we're
4839 + * dealing with a bounced ep0 request. If we unmap it here, we would end
4840 + * up overwritting the contents of req->buf and this could confuse the
4841 + * gadget driver.
4842 + */
4843 + if (dwc->ep0_bounced && dep->number <= 1) {
4844 dwc->ep0_bounced = false;
4845 -
4846 - usb_gadget_unmap_request(&dwc->gadget, &req->request,
4847 - req->direction);
4848 + unmap_after_complete = true;
4849 + } else {
4850 + usb_gadget_unmap_request(&dwc->gadget,
4851 + &req->request, req->direction);
4852 + }
4853
4854 trace_dwc3_gadget_giveback(req);
4855
4856 @@ -194,6 +203,10 @@ void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req,
4857 usb_gadget_giveback_request(&dep->endpoint, &req->request);
4858 spin_lock(&dwc->lock);
4859
4860 + if (unmap_after_complete)
4861 + usb_gadget_unmap_request(&dwc->gadget,
4862 + &req->request, req->direction);
4863 +
4864 if (dep->number > 1)
4865 pm_runtime_put(dwc->dev);
4866 }
4867 diff --git a/drivers/usb/dwc3/host.c b/drivers/usb/dwc3/host.c
4868 index f6533c68fed1..626d87d545fc 100644
4869 --- a/drivers/usb/dwc3/host.c
4870 +++ b/drivers/usb/dwc3/host.c
4871 @@ -21,11 +21,12 @@
4872
4873 int dwc3_host_init(struct dwc3 *dwc)
4874 {
4875 - struct property_entry props[2];
4876 + struct property_entry props[3];
4877 struct platform_device *xhci;
4878 int ret, irq;
4879 struct resource *res;
4880 struct platform_device *dwc3_pdev = to_platform_device(dwc->dev);
4881 + int prop_idx = 0;
4882
4883 irq = platform_get_irq_byname(dwc3_pdev, "host");
4884 if (irq == -EPROBE_DEFER)
4885 @@ -89,8 +90,22 @@ int dwc3_host_init(struct dwc3 *dwc)
4886
4887 memset(props, 0, sizeof(struct property_entry) * ARRAY_SIZE(props));
4888
4889 - if (dwc->usb3_lpm_capable) {
4890 - props[0].name = "usb3-lpm-capable";
4891 + if (dwc->usb3_lpm_capable)
4892 + props[prop_idx++].name = "usb3-lpm-capable";
4893 +
4894 + /**
4895 + * WORKAROUND: dwc3 revisions <=3.00a have a limitation
4896 + * where Port Disable command doesn't work.
4897 + *
4898 + * The suggested workaround is that we avoid Port Disable
4899 + * completely.
4900 + *
4901 + * This following flag tells XHCI to do just that.
4902 + */
4903 + if (dwc->revision <= DWC3_REVISION_300A)
4904 + props[prop_idx++].name = "quirk-broken-port-ped";
4905 +
4906 + if (prop_idx) {
4907 ret = platform_device_add_properties(xhci, props);
4908 if (ret) {
4909 dev_err(dwc->dev, "failed to add properties to xHCI\n");
4910 diff --git a/drivers/usb/host/xhci-hub.c b/drivers/usb/host/xhci-hub.c
4911 index 0ef16900efed..1d41637a53e5 100644
4912 --- a/drivers/usb/host/xhci-hub.c
4913 +++ b/drivers/usb/host/xhci-hub.c
4914 @@ -458,6 +458,12 @@ static void xhci_disable_port(struct usb_hcd *hcd, struct xhci_hcd *xhci,
4915 return;
4916 }
4917
4918 + if (xhci->quirks & XHCI_BROKEN_PORT_PED) {
4919 + xhci_dbg(xhci,
4920 + "Broken Port Enabled/Disabled, ignoring port disable request.\n");
4921 + return;
4922 + }
4923 +
4924 /* Write 1 to disable the port */
4925 writel(port_status | PORT_PE, addr);
4926 port_status = readl(addr);
4927 diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c
4928 index 5895e84f9dcc..be1572331a64 100644
4929 --- a/drivers/usb/host/xhci-plat.c
4930 +++ b/drivers/usb/host/xhci-plat.c
4931 @@ -223,6 +223,9 @@ static int xhci_plat_probe(struct platform_device *pdev)
4932 if (device_property_read_bool(&pdev->dev, "usb3-lpm-capable"))
4933 xhci->quirks |= XHCI_LPM_SUPPORT;
4934
4935 + if (device_property_read_bool(&pdev->dev, "quirk-broken-port-ped"))
4936 + xhci->quirks |= XHCI_BROKEN_PORT_PED;
4937 +
4938 hcd->usb_phy = devm_usb_get_phy_by_phandle(&pdev->dev, "usb-phy", 0);
4939 if (IS_ERR(hcd->usb_phy)) {
4940 ret = PTR_ERR(hcd->usb_phy);
4941 diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
4942 index c525722aa934..f97b009ffc40 100644
4943 --- a/drivers/usb/host/xhci.h
4944 +++ b/drivers/usb/host/xhci.h
4945 @@ -1657,6 +1657,9 @@ struct xhci_hcd {
4946 #define XHCI_SSIC_PORT_UNUSED (1 << 22)
4947 #define XHCI_NO_64BIT_SUPPORT (1 << 23)
4948 #define XHCI_MISSING_CAS (1 << 24)
4949 +/* For controller with a broken Port Disable implementation */
4950 +#define XHCI_BROKEN_PORT_PED (1 << 25)
4951 +
4952 unsigned int num_active_eps;
4953 unsigned int limit_active_eps;
4954 /* There are two roothubs to keep track of bus suspend info for */
4955 diff --git a/drivers/usb/storage/unusual_devs.h b/drivers/usb/storage/unusual_devs.h
4956 index 16cc18369111..9129f6cb8230 100644
4957 --- a/drivers/usb/storage/unusual_devs.h
4958 +++ b/drivers/usb/storage/unusual_devs.h
4959 @@ -2071,6 +2071,20 @@ UNUSUAL_DEV( 0x1370, 0x6828, 0x0110, 0x0110,
4960 USB_SC_DEVICE, USB_PR_DEVICE, NULL,
4961 US_FL_IGNORE_RESIDUE ),
4962
4963 +/*
4964 + * Reported by Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
4965 + * The INIC-3619 bridge is used in the StarTech SLSODDU33B
4966 + * SATA-USB enclosure for slimline optical drives.
4967 + *
4968 + * The quirk enables MakeMKV to properly exchange keys with
4969 + * an installed BD drive.
4970 + */
4971 +UNUSUAL_DEV( 0x13fd, 0x3609, 0x0209, 0x0209,
4972 + "Initio Corporation",
4973 + "INIC-3619",
4974 + USB_SC_DEVICE, USB_PR_DEVICE, NULL,
4975 + US_FL_IGNORE_RESIDUE ),
4976 +
4977 /* Reported by Qinglin Ye <yestyle@gmail.com> */
4978 UNUSUAL_DEV( 0x13fe, 0x3600, 0x0100, 0x0100,
4979 "Kingston",
4980 diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c
4981 index 59e95762a6de..c5a567a73f59 100644
4982 --- a/drivers/watchdog/s3c2410_wdt.c
4983 +++ b/drivers/watchdog/s3c2410_wdt.c
4984 @@ -46,6 +46,7 @@
4985 #define S3C2410_WTCON 0x00
4986 #define S3C2410_WTDAT 0x04
4987 #define S3C2410_WTCNT 0x08
4988 +#define S3C2410_WTCLRINT 0x0c
4989
4990 #define S3C2410_WTCNT_MAXCNT 0xffff
4991
4992 @@ -72,6 +73,7 @@
4993 #define EXYNOS5_WDT_MASK_RESET_REG_OFFSET 0x040c
4994 #define QUIRK_HAS_PMU_CONFIG (1 << 0)
4995 #define QUIRK_HAS_RST_STAT (1 << 1)
4996 +#define QUIRK_HAS_WTCLRINT_REG (1 << 2)
4997
4998 /* These quirks require that we have a PMU register map */
4999 #define QUIRKS_HAVE_PMUREG (QUIRK_HAS_PMU_CONFIG | \
5000 @@ -143,13 +145,18 @@ static const struct s3c2410_wdt_variant drv_data_s3c2410 = {
5001 };
5002
5003 #ifdef CONFIG_OF
5004 +static const struct s3c2410_wdt_variant drv_data_s3c6410 = {
5005 + .quirks = QUIRK_HAS_WTCLRINT_REG,
5006 +};
5007 +
5008 static const struct s3c2410_wdt_variant drv_data_exynos5250 = {
5009 .disable_reg = EXYNOS5_WDT_DISABLE_REG_OFFSET,
5010 .mask_reset_reg = EXYNOS5_WDT_MASK_RESET_REG_OFFSET,
5011 .mask_bit = 20,
5012 .rst_stat_reg = EXYNOS5_RST_STAT_REG_OFFSET,
5013 .rst_stat_bit = 20,
5014 - .quirks = QUIRK_HAS_PMU_CONFIG | QUIRK_HAS_RST_STAT,
5015 + .quirks = QUIRK_HAS_PMU_CONFIG | QUIRK_HAS_RST_STAT \
5016 + | QUIRK_HAS_WTCLRINT_REG,
5017 };
5018
5019 static const struct s3c2410_wdt_variant drv_data_exynos5420 = {
5020 @@ -158,7 +165,8 @@ static const struct s3c2410_wdt_variant drv_data_exynos5420 = {
5021 .mask_bit = 0,
5022 .rst_stat_reg = EXYNOS5_RST_STAT_REG_OFFSET,
5023 .rst_stat_bit = 9,
5024 - .quirks = QUIRK_HAS_PMU_CONFIG | QUIRK_HAS_RST_STAT,
5025 + .quirks = QUIRK_HAS_PMU_CONFIG | QUIRK_HAS_RST_STAT \
5026 + | QUIRK_HAS_WTCLRINT_REG,
5027 };
5028
5029 static const struct s3c2410_wdt_variant drv_data_exynos7 = {
5030 @@ -167,12 +175,15 @@ static const struct s3c2410_wdt_variant drv_data_exynos7 = {
5031 .mask_bit = 23,
5032 .rst_stat_reg = EXYNOS5_RST_STAT_REG_OFFSET,
5033 .rst_stat_bit = 23, /* A57 WDTRESET */
5034 - .quirks = QUIRK_HAS_PMU_CONFIG | QUIRK_HAS_RST_STAT,
5035 + .quirks = QUIRK_HAS_PMU_CONFIG | QUIRK_HAS_RST_STAT \
5036 + | QUIRK_HAS_WTCLRINT_REG,
5037 };
5038
5039 static const struct of_device_id s3c2410_wdt_match[] = {
5040 { .compatible = "samsung,s3c2410-wdt",
5041 .data = &drv_data_s3c2410 },
5042 + { .compatible = "samsung,s3c6410-wdt",
5043 + .data = &drv_data_s3c6410 },
5044 { .compatible = "samsung,exynos5250-wdt",
5045 .data = &drv_data_exynos5250 },
5046 { .compatible = "samsung,exynos5420-wdt",
5047 @@ -418,6 +429,10 @@ static irqreturn_t s3c2410wdt_irq(int irqno, void *param)
5048 dev_info(wdt->dev, "watchdog timer expired (irq)\n");
5049
5050 s3c2410wdt_keepalive(&wdt->wdt_device);
5051 +
5052 + if (wdt->drv_data->quirks & QUIRK_HAS_WTCLRINT_REG)
5053 + writel(0x1, wdt->reg_base + S3C2410_WTCLRINT);
5054 +
5055 return IRQ_HANDLED;
5056 }
5057
5058 diff --git a/fs/cifs/smb2pdu.c b/fs/cifs/smb2pdu.c
5059 index 87457227812c..bdd32925a15e 100644
5060 --- a/fs/cifs/smb2pdu.c
5061 +++ b/fs/cifs/smb2pdu.c
5062 @@ -1104,6 +1104,10 @@ SMB2_tcon(const unsigned int xid, struct cifs_ses *ses, const char *tree,
5063 return -EINVAL;
5064 }
5065
5066 + /* SMB2 TREE_CONNECT request must be called with TreeId == 0 */
5067 + if (tcon)
5068 + tcon->tid = 0;
5069 +
5070 rc = small_smb2_init(SMB2_TREE_CONNECT, tcon, (void **) &req);
5071 if (rc) {
5072 kfree(unc_path);
5073 diff --git a/fs/orangefs/super.c b/fs/orangefs/super.c
5074 index 67c24351a67f..cd261c8de53a 100644
5075 --- a/fs/orangefs/super.c
5076 +++ b/fs/orangefs/super.c
5077 @@ -263,8 +263,13 @@ int orangefs_remount(struct orangefs_sb_info_s *orangefs_sb)
5078 if (!new_op)
5079 return -ENOMEM;
5080 new_op->upcall.req.features.features = 0;
5081 - ret = service_operation(new_op, "orangefs_features", 0);
5082 - orangefs_features = new_op->downcall.resp.features.features;
5083 + ret = service_operation(new_op, "orangefs_features",
5084 + ORANGEFS_OP_PRIORITY | ORANGEFS_OP_NO_MUTEX);
5085 + if (!ret)
5086 + orangefs_features =
5087 + new_op->downcall.resp.features.features;
5088 + else
5089 + orangefs_features = 0;
5090 op_release(new_op);
5091 } else {
5092 orangefs_features = 0;
5093 diff --git a/fs/sysfs/file.c b/fs/sysfs/file.c
5094 index b803213d1307..39c75a86c67f 100644
5095 --- a/fs/sysfs/file.c
5096 +++ b/fs/sysfs/file.c
5097 @@ -108,7 +108,7 @@ static ssize_t sysfs_kf_read(struct kernfs_open_file *of, char *buf,
5098 {
5099 const struct sysfs_ops *ops = sysfs_file_ops(of->kn);
5100 struct kobject *kobj = of->kn->parent->priv;
5101 - size_t len;
5102 + ssize_t len;
5103
5104 /*
5105 * If buf != of->prealloc_buf, we don't know how
5106 @@ -117,13 +117,15 @@ static ssize_t sysfs_kf_read(struct kernfs_open_file *of, char *buf,
5107 if (WARN_ON_ONCE(buf != of->prealloc_buf))
5108 return 0;
5109 len = ops->show(kobj, of->kn->priv, buf);
5110 + if (len < 0)
5111 + return len;
5112 if (pos) {
5113 if (len <= pos)
5114 return 0;
5115 len -= pos;
5116 memmove(buf, buf + pos, len);
5117 }
5118 - return min(count, len);
5119 + return min_t(ssize_t, count, len);
5120 }
5121
5122 /* kernfs write callback for regular sysfs files */
5123 diff --git a/fs/xfs/xfs_bmap_util.c b/fs/xfs/xfs_bmap_util.c
5124 index 5c395e485170..5328ecdd03d4 100644
5125 --- a/fs/xfs/xfs_bmap_util.c
5126 +++ b/fs/xfs/xfs_bmap_util.c
5127 @@ -1318,8 +1318,16 @@ xfs_free_file_space(
5128 /*
5129 * Now that we've unmap all full blocks we'll have to zero out any
5130 * partial block at the beginning and/or end. xfs_zero_range is
5131 - * smart enough to skip any holes, including those we just created.
5132 + * smart enough to skip any holes, including those we just created,
5133 + * but we must take care not to zero beyond EOF and enlarge i_size.
5134 */
5135 +
5136 + if (offset >= XFS_ISIZE(ip))
5137 + return 0;
5138 +
5139 + if (offset + len > XFS_ISIZE(ip))
5140 + len = XFS_ISIZE(ip) - offset;
5141 +
5142 return xfs_zero_range(ip, offset, len, NULL);
5143 }
5144
5145 diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
5146 index 0d5f4268d75f..61766a420f6b 100644
5147 --- a/include/drm/i915_pciids.h
5148 +++ b/include/drm/i915_pciids.h
5149 @@ -226,23 +226,18 @@
5150 INTEL_VGA_DEVICE(0x162A, info), /* Server */ \
5151 INTEL_VGA_DEVICE(0x162D, info) /* Workstation */
5152
5153 -#define INTEL_BDW_RSVDM_IDS(info) \
5154 +#define INTEL_BDW_RSVD_IDS(info) \
5155 INTEL_VGA_DEVICE(0x1632, info), /* ULT */ \
5156 INTEL_VGA_DEVICE(0x1636, info), /* ULT */ \
5157 INTEL_VGA_DEVICE(0x163B, info), /* Iris */ \
5158 - INTEL_VGA_DEVICE(0x163E, info) /* ULX */
5159 -
5160 -#define INTEL_BDW_RSVDD_IDS(info) \
5161 + INTEL_VGA_DEVICE(0x163E, info), /* ULX */ \
5162 INTEL_VGA_DEVICE(0x163A, info), /* Server */ \
5163 INTEL_VGA_DEVICE(0x163D, info) /* Workstation */
5164
5165 #define INTEL_BDW_IDS(info) \
5166 INTEL_BDW_GT12_IDS(info), \
5167 INTEL_BDW_GT3_IDS(info), \
5168 - INTEL_BDW_RSVDM_IDS(info), \
5169 - INTEL_BDW_GT12_IDS(info), \
5170 - INTEL_BDW_GT3_IDS(info), \
5171 - INTEL_BDW_RSVDD_IDS(info)
5172 + INTEL_BDW_RSVD_IDS(info)
5173
5174 #define INTEL_CHV_IDS(info) \
5175 INTEL_VGA_DEVICE(0x22b0, info), \
5176 diff --git a/include/drm/ttm/ttm_object.h b/include/drm/ttm/ttm_object.h
5177 index ed953f98f0e1..1487011fe057 100644
5178 --- a/include/drm/ttm/ttm_object.h
5179 +++ b/include/drm/ttm/ttm_object.h
5180 @@ -229,6 +229,8 @@ extern void ttm_base_object_unref(struct ttm_base_object **p_base);
5181 * @ref_type: The type of reference.
5182 * @existed: Upon completion, indicates that an identical reference object
5183 * already existed, and the refcount was upped on that object instead.
5184 + * @require_existed: Fail with -EPERM if an identical ref object didn't
5185 + * already exist.
5186 *
5187 * Checks that the base object is shareable and adds a ref object to it.
5188 *
5189 @@ -243,7 +245,8 @@ extern void ttm_base_object_unref(struct ttm_base_object **p_base);
5190 */
5191 extern int ttm_ref_object_add(struct ttm_object_file *tfile,
5192 struct ttm_base_object *base,
5193 - enum ttm_ref_type ref_type, bool *existed);
5194 + enum ttm_ref_type ref_type, bool *existed,
5195 + bool require_existed);
5196
5197 extern bool ttm_ref_object_exists(struct ttm_object_file *tfile,
5198 struct ttm_base_object *base);
5199 diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h
5200 index b5abfda80465..4c5bca38c653 100644
5201 --- a/include/linux/arm-smccc.h
5202 +++ b/include/linux/arm-smccc.h
5203 @@ -14,9 +14,6 @@
5204 #ifndef __LINUX_ARM_SMCCC_H
5205 #define __LINUX_ARM_SMCCC_H
5206
5207 -#include <linux/linkage.h>
5208 -#include <linux/types.h>
5209 -
5210 /*
5211 * This file provides common defines for ARM SMC Calling Convention as
5212 * specified in
5213 @@ -60,6 +57,13 @@
5214 #define ARM_SMCCC_OWNER_TRUSTED_OS 50
5215 #define ARM_SMCCC_OWNER_TRUSTED_OS_END 63
5216
5217 +#define ARM_SMCCC_QUIRK_NONE 0
5218 +#define ARM_SMCCC_QUIRK_QCOM_A6 1 /* Save/restore register a6 */
5219 +
5220 +#ifndef __ASSEMBLY__
5221 +
5222 +#include <linux/linkage.h>
5223 +#include <linux/types.h>
5224 /**
5225 * struct arm_smccc_res - Result from SMC/HVC call
5226 * @a0-a3 result values from registers 0 to 3
5227 @@ -72,33 +76,59 @@ struct arm_smccc_res {
5228 };
5229
5230 /**
5231 - * arm_smccc_smc() - make SMC calls
5232 + * struct arm_smccc_quirk - Contains quirk information
5233 + * @id: quirk identification
5234 + * @state: quirk specific information
5235 + * @a6: Qualcomm quirk entry for returning post-smc call contents of a6
5236 + */
5237 +struct arm_smccc_quirk {
5238 + int id;
5239 + union {
5240 + unsigned long a6;
5241 + } state;
5242 +};
5243 +
5244 +/**
5245 + * __arm_smccc_smc() - make SMC calls
5246 * @a0-a7: arguments passed in registers 0 to 7
5247 * @res: result values from registers 0 to 3
5248 + * @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required.
5249 *
5250 * This function is used to make SMC calls following SMC Calling Convention.
5251 * The content of the supplied param are copied to registers 0 to 7 prior
5252 * to the SMC instruction. The return values are updated with the content
5253 - * from register 0 to 3 on return from the SMC instruction.
5254 + * from register 0 to 3 on return from the SMC instruction. An optional
5255 + * quirk structure provides vendor specific behavior.
5256 */
5257 -asmlinkage void arm_smccc_smc(unsigned long a0, unsigned long a1,
5258 +asmlinkage void __arm_smccc_smc(unsigned long a0, unsigned long a1,
5259 unsigned long a2, unsigned long a3, unsigned long a4,
5260 unsigned long a5, unsigned long a6, unsigned long a7,
5261 - struct arm_smccc_res *res);
5262 + struct arm_smccc_res *res, struct arm_smccc_quirk *quirk);
5263
5264 /**
5265 - * arm_smccc_hvc() - make HVC calls
5266 + * __arm_smccc_hvc() - make HVC calls
5267 * @a0-a7: arguments passed in registers 0 to 7
5268 * @res: result values from registers 0 to 3
5269 + * @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required.
5270 *
5271 * This function is used to make HVC calls following SMC Calling
5272 * Convention. The content of the supplied param are copied to registers 0
5273 * to 7 prior to the HVC instruction. The return values are updated with
5274 - * the content from register 0 to 3 on return from the HVC instruction.
5275 + * the content from register 0 to 3 on return from the HVC instruction. An
5276 + * optional quirk structure provides vendor specific behavior.
5277 */
5278 -asmlinkage void arm_smccc_hvc(unsigned long a0, unsigned long a1,
5279 +asmlinkage void __arm_smccc_hvc(unsigned long a0, unsigned long a1,
5280 unsigned long a2, unsigned long a3, unsigned long a4,
5281 unsigned long a5, unsigned long a6, unsigned long a7,
5282 - struct arm_smccc_res *res);
5283 + struct arm_smccc_res *res, struct arm_smccc_quirk *quirk);
5284 +
5285 +#define arm_smccc_smc(...) __arm_smccc_smc(__VA_ARGS__, NULL)
5286 +
5287 +#define arm_smccc_smc_quirk(...) __arm_smccc_smc(__VA_ARGS__)
5288 +
5289 +#define arm_smccc_hvc(...) __arm_smccc_hvc(__VA_ARGS__, NULL)
5290 +
5291 +#define arm_smccc_hvc_quirk(...) __arm_smccc_hvc(__VA_ARGS__)
5292
5293 +#endif /*__ASSEMBLY__*/
5294 #endif /*__LINUX_ARM_SMCCC_H*/
5295 diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
5296 index f020ab4079d3..3e5dbbe75f70 100644
5297 --- a/include/linux/pci_ids.h
5298 +++ b/include/linux/pci_ids.h
5299 @@ -2513,6 +2513,8 @@
5300 #define PCI_DEVICE_ID_KORENIX_JETCARDF2 0x1700
5301 #define PCI_DEVICE_ID_KORENIX_JETCARDF3 0x17ff
5302
5303 +#define PCI_VENDOR_ID_HUAWEI 0x19e5
5304 +
5305 #define PCI_VENDOR_ID_NETRONOME 0x19ee
5306 #define PCI_DEVICE_ID_NETRONOME_NFP3200 0x3200
5307 #define PCI_DEVICE_ID_NETRONOME_NFP3240 0x3240
5308 diff --git a/include/linux/random.h b/include/linux/random.h
5309 index 7bd2403e4fef..16ab429735a7 100644
5310 --- a/include/linux/random.h
5311 +++ b/include/linux/random.h
5312 @@ -37,7 +37,6 @@ extern void get_random_bytes(void *buf, int nbytes);
5313 extern int add_random_ready_callback(struct random_ready_callback *rdy);
5314 extern void del_random_ready_callback(struct random_ready_callback *rdy);
5315 extern void get_random_bytes_arch(void *buf, int nbytes);
5316 -extern int random_int_secret_init(void);
5317
5318 #ifndef MODULE
5319 extern const struct file_operations random_fops, urandom_fops;
5320 diff --git a/init/main.c b/init/main.c
5321 index 2858be732f6d..ae3996ae9bac 100644
5322 --- a/init/main.c
5323 +++ b/init/main.c
5324 @@ -868,7 +868,6 @@ static void __init do_basic_setup(void)
5325 do_ctors();
5326 usermodehelper_enable();
5327 do_initcalls();
5328 - random_int_secret_init();
5329 }
5330
5331 static void __init do_pre_smp_initcalls(void)
5332 diff --git a/kernel/ptrace.c b/kernel/ptrace.c
5333 index 49ba7c1ade9d..a5caecef88be 100644
5334 --- a/kernel/ptrace.c
5335 +++ b/kernel/ptrace.c
5336 @@ -181,11 +181,17 @@ static void ptrace_unfreeze_traced(struct task_struct *task)
5337
5338 WARN_ON(!task->ptrace || task->parent != current);
5339
5340 + /*
5341 + * PTRACE_LISTEN can allow ptrace_trap_notify to wake us up remotely.
5342 + * Recheck state under the lock to close this race.
5343 + */
5344 spin_lock_irq(&task->sighand->siglock);
5345 - if (__fatal_signal_pending(task))
5346 - wake_up_state(task, __TASK_TRACED);
5347 - else
5348 - task->state = TASK_TRACED;
5349 + if (task->state == __TASK_TRACED) {
5350 + if (__fatal_signal_pending(task))
5351 + wake_up_state(task, __TASK_TRACED);
5352 + else
5353 + task->state = TASK_TRACED;
5354 + }
5355 spin_unlock_irq(&task->sighand->siglock);
5356 }
5357
5358 diff --git a/kernel/trace/ring_buffer.c b/kernel/trace/ring_buffer.c
5359 index 9c143739b8d7..f30847af7310 100644
5360 --- a/kernel/trace/ring_buffer.c
5361 +++ b/kernel/trace/ring_buffer.c
5362 @@ -4870,9 +4870,9 @@ static __init int test_ringbuffer(void)
5363 rb_data[cpu].cnt = cpu;
5364 rb_threads[cpu] = kthread_create(rb_test, &rb_data[cpu],
5365 "rbtester/%d", cpu);
5366 - if (WARN_ON(!rb_threads[cpu])) {
5367 + if (WARN_ON(IS_ERR(rb_threads[cpu]))) {
5368 pr_cont("FAILED\n");
5369 - ret = -1;
5370 + ret = PTR_ERR(rb_threads[cpu]);
5371 goto out_free;
5372 }
5373
5374 @@ -4882,9 +4882,9 @@ static __init int test_ringbuffer(void)
5375
5376 /* Now create the rb hammer! */
5377 rb_hammer = kthread_run(rb_hammer_test, NULL, "rbhammer");
5378 - if (WARN_ON(!rb_hammer)) {
5379 + if (WARN_ON(IS_ERR(rb_hammer))) {
5380 pr_cont("FAILED\n");
5381 - ret = -1;
5382 + ret = PTR_ERR(rb_hammer);
5383 goto out_free;
5384 }
5385
5386 diff --git a/mm/mempolicy.c b/mm/mempolicy.c
5387 index f75704717e47..23471526d424 100644
5388 --- a/mm/mempolicy.c
5389 +++ b/mm/mempolicy.c
5390 @@ -1524,7 +1524,6 @@ COMPAT_SYSCALL_DEFINE5(get_mempolicy, int __user *, policy,
5391 COMPAT_SYSCALL_DEFINE3(set_mempolicy, int, mode, compat_ulong_t __user *, nmask,
5392 compat_ulong_t, maxnode)
5393 {
5394 - long err = 0;
5395 unsigned long __user *nm = NULL;
5396 unsigned long nr_bits, alloc_size;
5397 DECLARE_BITMAP(bm, MAX_NUMNODES);
5398 @@ -1533,14 +1532,13 @@ COMPAT_SYSCALL_DEFINE3(set_mempolicy, int, mode, compat_ulong_t __user *, nmask,
5399 alloc_size = ALIGN(nr_bits, BITS_PER_LONG) / 8;
5400
5401 if (nmask) {
5402 - err = compat_get_bitmap(bm, nmask, nr_bits);
5403 + if (compat_get_bitmap(bm, nmask, nr_bits))
5404 + return -EFAULT;
5405 nm = compat_alloc_user_space(alloc_size);
5406 - err |= copy_to_user(nm, bm, alloc_size);
5407 + if (copy_to_user(nm, bm, alloc_size))
5408 + return -EFAULT;
5409 }
5410
5411 - if (err)
5412 - return -EFAULT;
5413 -
5414 return sys_set_mempolicy(mode, nm, nr_bits+1);
5415 }
5416
5417 @@ -1548,7 +1546,6 @@ COMPAT_SYSCALL_DEFINE6(mbind, compat_ulong_t, start, compat_ulong_t, len,
5418 compat_ulong_t, mode, compat_ulong_t __user *, nmask,
5419 compat_ulong_t, maxnode, compat_ulong_t, flags)
5420 {
5421 - long err = 0;
5422 unsigned long __user *nm = NULL;
5423 unsigned long nr_bits, alloc_size;
5424 nodemask_t bm;
5425 @@ -1557,14 +1554,13 @@ COMPAT_SYSCALL_DEFINE6(mbind, compat_ulong_t, start, compat_ulong_t, len,
5426 alloc_size = ALIGN(nr_bits, BITS_PER_LONG) / 8;
5427
5428 if (nmask) {
5429 - err = compat_get_bitmap(nodes_addr(bm), nmask, nr_bits);
5430 + if (compat_get_bitmap(nodes_addr(bm), nmask, nr_bits))
5431 + return -EFAULT;
5432 nm = compat_alloc_user_space(alloc_size);
5433 - err |= copy_to_user(nm, nodes_addr(bm), alloc_size);
5434 + if (copy_to_user(nm, nodes_addr(bm), alloc_size))
5435 + return -EFAULT;
5436 }
5437
5438 - if (err)
5439 - return -EFAULT;
5440 -
5441 return sys_mbind(start, len, mode, nm, nr_bits+1, flags);
5442 }
5443
5444 diff --git a/mm/page_alloc.c b/mm/page_alloc.c
5445 index 1460e6ad5e14..e5b159b88e39 100644
5446 --- a/mm/page_alloc.c
5447 +++ b/mm/page_alloc.c
5448 @@ -4345,13 +4345,13 @@ void show_free_areas(unsigned int filter)
5449 K(node_page_state(pgdat, NR_FILE_MAPPED)),
5450 K(node_page_state(pgdat, NR_FILE_DIRTY)),
5451 K(node_page_state(pgdat, NR_WRITEBACK)),
5452 + K(node_page_state(pgdat, NR_SHMEM)),
5453 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
5454 K(node_page_state(pgdat, NR_SHMEM_THPS) * HPAGE_PMD_NR),
5455 K(node_page_state(pgdat, NR_SHMEM_PMDMAPPED)
5456 * HPAGE_PMD_NR),
5457 K(node_page_state(pgdat, NR_ANON_THPS) * HPAGE_PMD_NR),
5458 #endif
5459 - K(node_page_state(pgdat, NR_SHMEM)),
5460 K(node_page_state(pgdat, NR_WRITEBACK_TEMP)),
5461 K(node_page_state(pgdat, NR_UNSTABLE_NFS)),
5462 node_page_state(pgdat, NR_PAGES_SCANNED),
5463 diff --git a/net/mac80211/iface.c b/net/mac80211/iface.c
5464 index 638ec0759078..8d7747e98fdb 100644
5465 --- a/net/mac80211/iface.c
5466 +++ b/net/mac80211/iface.c
5467 @@ -726,7 +726,8 @@ int ieee80211_do_open(struct wireless_dev *wdev, bool coming_up)
5468 ieee80211_recalc_ps(local);
5469
5470 if (sdata->vif.type == NL80211_IFTYPE_MONITOR ||
5471 - sdata->vif.type == NL80211_IFTYPE_AP_VLAN) {
5472 + sdata->vif.type == NL80211_IFTYPE_AP_VLAN ||
5473 + local->ops->wake_tx_queue) {
5474 /* XXX: for AP_VLAN, actually track AP queues */
5475 netif_tx_start_all_queues(dev);
5476 } else if (dev) {
5477 diff --git a/net/sunrpc/auth_gss/svcauth_gss.c b/net/sunrpc/auth_gss/svcauth_gss.c
5478 index 6fdffde28733..153082598522 100644
5479 --- a/net/sunrpc/auth_gss/svcauth_gss.c
5480 +++ b/net/sunrpc/auth_gss/svcauth_gss.c
5481 @@ -1548,7 +1548,7 @@ svcauth_gss_accept(struct svc_rqst *rqstp, __be32 *authp)
5482 ret = SVC_COMPLETE;
5483 goto out;
5484 drop:
5485 - ret = SVC_DROP;
5486 + ret = SVC_CLOSE;
5487 out:
5488 if (rsci)
5489 cache_put(&rsci->h, sn->rsc_cache);
5490 diff --git a/net/sunrpc/svc.c b/net/sunrpc/svc.c
5491 index 7c8070ec93c8..75f290bddca1 100644
5492 --- a/net/sunrpc/svc.c
5493 +++ b/net/sunrpc/svc.c
5494 @@ -1155,8 +1155,7 @@ svc_process_common(struct svc_rqst *rqstp, struct kvec *argv, struct kvec *resv)
5495 case SVC_DENIED:
5496 goto err_bad_auth;
5497 case SVC_CLOSE:
5498 - if (test_bit(XPT_TEMP, &rqstp->rq_xprt->xpt_flags))
5499 - svc_close_xprt(rqstp->rq_xprt);
5500 + goto close;
5501 case SVC_DROP:
5502 goto dropit;
5503 case SVC_COMPLETE:
5504 @@ -1246,7 +1245,7 @@ svc_process_common(struct svc_rqst *rqstp, struct kvec *argv, struct kvec *resv)
5505
5506 sendit:
5507 if (svc_authorise(rqstp))
5508 - goto dropit;
5509 + goto close;
5510 return 1; /* Caller can now send it */
5511
5512 dropit:
5513 @@ -1254,11 +1253,16 @@ svc_process_common(struct svc_rqst *rqstp, struct kvec *argv, struct kvec *resv)
5514 dprintk("svc: svc_process dropit\n");
5515 return 0;
5516
5517 + close:
5518 + if (test_bit(XPT_TEMP, &rqstp->rq_xprt->xpt_flags))
5519 + svc_close_xprt(rqstp->rq_xprt);
5520 + dprintk("svc: svc_process close\n");
5521 + return 0;
5522 +
5523 err_short_len:
5524 svc_printk(rqstp, "short len %Zd, dropping request\n",
5525 argv->iov_len);
5526 -
5527 - goto dropit; /* drop request */
5528 + goto close;
5529
5530 err_bad_rpc:
5531 serv->sv_stats->rpcbadfmt++;
5532 diff --git a/net/wireless/sysfs.c b/net/wireless/sysfs.c
5533 index 14b3f007826d..2927d06faa6e 100644
5534 --- a/net/wireless/sysfs.c
5535 +++ b/net/wireless/sysfs.c
5536 @@ -130,12 +130,10 @@ static int wiphy_resume(struct device *dev)
5537 /* Age scan results with time spent in suspend */
5538 cfg80211_bss_age(rdev, get_seconds() - rdev->suspend_at);
5539
5540 - if (rdev->ops->resume) {
5541 - rtnl_lock();
5542 - if (rdev->wiphy.registered)
5543 - ret = rdev_resume(rdev);
5544 - rtnl_unlock();
5545 - }
5546 + rtnl_lock();
5547 + if (rdev->wiphy.registered && rdev->ops->resume)
5548 + ret = rdev_resume(rdev);
5549 + rtnl_unlock();
5550
5551 return ret;
5552 }
5553 diff --git a/sound/soc/codecs/rt5670.c b/sound/soc/codecs/rt5670.c
5554 index 49caf1393aeb..fdc14e50d3b9 100644
5555 --- a/sound/soc/codecs/rt5670.c
5556 +++ b/sound/soc/codecs/rt5670.c
5557 @@ -2813,6 +2813,8 @@ MODULE_DEVICE_TABLE(i2c, rt5670_i2c_id);
5558 #ifdef CONFIG_ACPI
5559 static const struct acpi_device_id rt5670_acpi_match[] = {
5560 { "10EC5670", 0},
5561 + { "10EC5672", 0},
5562 + { "10EC5640", 0}, /* quirk */
5563 { },
5564 };
5565 MODULE_DEVICE_TABLE(acpi, rt5670_acpi_match);
5566 diff --git a/sound/soc/intel/atom/sst/sst_acpi.c b/sound/soc/intel/atom/sst/sst_acpi.c
5567 index 0a88537ca58a..0bfa68862460 100644
5568 --- a/sound/soc/intel/atom/sst/sst_acpi.c
5569 +++ b/sound/soc/intel/atom/sst/sst_acpi.c
5570 @@ -400,6 +400,7 @@ static int sst_acpi_remove(struct platform_device *pdev)
5571 static unsigned long cht_machine_id;
5572
5573 #define CHT_SURFACE_MACH 1
5574 +#define BYT_THINKPAD_10 2
5575
5576 static int cht_surface_quirk_cb(const struct dmi_system_id *id)
5577 {
5578 @@ -407,6 +408,23 @@ static int cht_surface_quirk_cb(const struct dmi_system_id *id)
5579 return 1;
5580 }
5581
5582 +static int byt_thinkpad10_quirk_cb(const struct dmi_system_id *id)
5583 +{
5584 + cht_machine_id = BYT_THINKPAD_10;
5585 + return 1;
5586 +}
5587 +
5588 +
5589 +static const struct dmi_system_id byt_table[] = {
5590 + {
5591 + .callback = byt_thinkpad10_quirk_cb,
5592 + .matches = {
5593 + DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
5594 + DMI_MATCH(DMI_PRODUCT_NAME, "20C3001VHH"),
5595 + },
5596 + },
5597 + { }
5598 +};
5599
5600 static const struct dmi_system_id cht_table[] = {
5601 {
5602 @@ -424,6 +442,10 @@ static struct sst_acpi_mach cht_surface_mach = {
5603 "10EC5640", "cht-bsw-rt5645", "intel/fw_sst_22a8.bin", "cht-bsw", NULL,
5604 &chv_platform_data };
5605
5606 +static struct sst_acpi_mach byt_thinkpad_10 = {
5607 + "10EC5640", "cht-bsw-rt5672", "intel/fw_sst_0f28.bin", "cht-bsw", NULL,
5608 + &byt_rvp_platform_data };
5609 +
5610 static struct sst_acpi_mach *cht_quirk(void *arg)
5611 {
5612 struct sst_acpi_mach *mach = arg;
5613 @@ -436,8 +458,21 @@ static struct sst_acpi_mach *cht_quirk(void *arg)
5614 return mach;
5615 }
5616
5617 +static struct sst_acpi_mach *byt_quirk(void *arg)
5618 +{
5619 + struct sst_acpi_mach *mach = arg;
5620 +
5621 + dmi_check_system(byt_table);
5622 +
5623 + if (cht_machine_id == BYT_THINKPAD_10)
5624 + return &byt_thinkpad_10;
5625 + else
5626 + return mach;
5627 +}
5628 +
5629 +
5630 static struct sst_acpi_mach sst_acpi_bytcr[] = {
5631 - {"10EC5640", "bytcr_rt5640", "intel/fw_sst_0f28.bin", "bytcr_rt5640", NULL,
5632 + {"10EC5640", "bytcr_rt5640", "intel/fw_sst_0f28.bin", "bytcr_rt5640", byt_quirk,
5633 &byt_rvp_platform_data },
5634 {"10EC5642", "bytcr_rt5640", "intel/fw_sst_0f28.bin", "bytcr_rt5640", NULL,
5635 &byt_rvp_platform_data },
5636 diff --git a/sound/soc/intel/boards/bytcr_rt5640.c b/sound/soc/intel/boards/bytcr_rt5640.c
5637 index bff77a1f27fc..4c8ff298ad26 100644
5638 --- a/sound/soc/intel/boards/bytcr_rt5640.c
5639 +++ b/sound/soc/intel/boards/bytcr_rt5640.c
5640 @@ -57,9 +57,7 @@ struct byt_rt5640_private {
5641 struct clk *mclk;
5642 };
5643
5644 -static unsigned long byt_rt5640_quirk = BYT_RT5640_DMIC1_MAP |
5645 - BYT_RT5640_DMIC_EN |
5646 - BYT_RT5640_MCLK_EN;
5647 +static unsigned long byt_rt5640_quirk = BYT_RT5640_MCLK_EN;
5648
5649 static void log_quirks(struct device *dev)
5650 {
5651 @@ -389,6 +387,16 @@ static const struct dmi_system_id byt_rt5640_quirk_table[] = {
5652 BYT_RT5640_SSP0_AIF1),
5653
5654 },
5655 + {
5656 + .callback = byt_rt5640_quirk_cb,
5657 + .matches = {
5658 + DMI_MATCH(DMI_SYS_VENDOR, "Insyde"),
5659 + },
5660 + .driver_data = (unsigned long *)(BYT_RT5640_IN3_MAP |
5661 + BYT_RT5640_MCLK_EN |
5662 + BYT_RT5640_SSP0_AIF1),
5663 +
5664 + },
5665 {}
5666 };
5667
5668 @@ -738,6 +746,13 @@ static int snd_byt_rt5640_mc_probe(struct platform_device *pdev)
5669 if (res_info->acpi_ipc_irq_index == 0) {
5670 byt_rt5640_quirk |= BYT_RT5640_SSP0_AIF2;
5671 }
5672 +
5673 + /* change defaults for Baytrail-CR capture */
5674 + byt_rt5640_quirk |= BYT_RT5640_IN1_MAP;
5675 + byt_rt5640_quirk |= BYT_RT5640_DIFF_MIC;
5676 + } else {
5677 + byt_rt5640_quirk |= (BYT_RT5640_DMIC1_MAP |
5678 + BYT_RT5640_DMIC_EN);
5679 }
5680
5681 /* check quirks before creating card */
5682 diff --git a/sound/soc/intel/boards/cht_bsw_rt5645.c b/sound/soc/intel/boards/cht_bsw_rt5645.c
5683 index 16c94c45ce50..90525614c20a 100644
5684 --- a/sound/soc/intel/boards/cht_bsw_rt5645.c
5685 +++ b/sound/soc/intel/boards/cht_bsw_rt5645.c
5686 @@ -24,6 +24,9 @@
5687 #include <linux/acpi.h>
5688 #include <linux/platform_device.h>
5689 #include <linux/slab.h>
5690 +#include <asm/cpu_device_id.h>
5691 +#include <asm/platform_sst_audio.h>
5692 +#include <linux/clk.h>
5693 #include <sound/pcm.h>
5694 #include <sound/pcm_params.h>
5695 #include <sound/soc.h>
5696 @@ -45,6 +48,7 @@ struct cht_mc_private {
5697 struct snd_soc_jack jack;
5698 struct cht_acpi_card *acpi_card;
5699 char codec_name[16];
5700 + struct clk *mclk;
5701 };
5702
5703 static inline struct snd_soc_dai *cht_get_codec_dai(struct snd_soc_card *card)
5704 @@ -65,6 +69,7 @@ static int platform_clock_control(struct snd_soc_dapm_widget *w,
5705 struct snd_soc_dapm_context *dapm = w->dapm;
5706 struct snd_soc_card *card = dapm->card;
5707 struct snd_soc_dai *codec_dai;
5708 + struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
5709 int ret;
5710
5711 codec_dai = cht_get_codec_dai(card);
5712 @@ -73,19 +78,30 @@ static int platform_clock_control(struct snd_soc_dapm_widget *w,
5713 return -EIO;
5714 }
5715
5716 - if (!SND_SOC_DAPM_EVENT_OFF(event))
5717 - return 0;
5718 + if (SND_SOC_DAPM_EVENT_ON(event)) {
5719 + if (ctx->mclk) {
5720 + ret = clk_prepare_enable(ctx->mclk);
5721 + if (ret < 0) {
5722 + dev_err(card->dev,
5723 + "could not configure MCLK state");
5724 + return ret;
5725 + }
5726 + }
5727 + } else {
5728 + /* Set codec sysclk source to its internal clock because codec PLL will
5729 + * be off when idle and MCLK will also be off when codec is
5730 + * runtime suspended. Codec needs clock for jack detection and button
5731 + * press. MCLK is turned off with clock framework or ACPI.
5732 + */
5733 + ret = snd_soc_dai_set_sysclk(codec_dai, RT5645_SCLK_S_RCCLK,
5734 + 48000 * 512, SND_SOC_CLOCK_IN);
5735 + if (ret < 0) {
5736 + dev_err(card->dev, "can't set codec sysclk: %d\n", ret);
5737 + return ret;
5738 + }
5739
5740 - /* Set codec sysclk source to its internal clock because codec PLL will
5741 - * be off when idle and MCLK will also be off by ACPI when codec is
5742 - * runtime suspended. Codec needs clock for jack detection and button
5743 - * press.
5744 - */
5745 - ret = snd_soc_dai_set_sysclk(codec_dai, RT5645_SCLK_S_RCCLK,
5746 - 0, SND_SOC_CLOCK_IN);
5747 - if (ret < 0) {
5748 - dev_err(card->dev, "can't set codec sysclk: %d\n", ret);
5749 - return ret;
5750 + if (ctx->mclk)
5751 + clk_disable_unprepare(ctx->mclk);
5752 }
5753
5754 return 0;
5755 @@ -97,7 +113,7 @@ static const struct snd_soc_dapm_widget cht_dapm_widgets[] = {
5756 SND_SOC_DAPM_MIC("Int Mic", NULL),
5757 SND_SOC_DAPM_SPK("Ext Spk", NULL),
5758 SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0,
5759 - platform_clock_control, SND_SOC_DAPM_POST_PMD),
5760 + platform_clock_control, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
5761 };
5762
5763 static const struct snd_soc_dapm_route cht_rt5645_audio_map[] = {
5764 @@ -225,6 +241,26 @@ static int cht_codec_init(struct snd_soc_pcm_runtime *runtime)
5765
5766 rt5645_set_jack_detect(codec, &ctx->jack, &ctx->jack, &ctx->jack);
5767
5768 + if (ctx->mclk) {
5769 + /*
5770 + * The firmware might enable the clock at
5771 + * boot (this information may or may not
5772 + * be reflected in the enable clock register).
5773 + * To change the rate we must disable the clock
5774 + * first to cover these cases. Due to common
5775 + * clock framework restrictions that do not allow
5776 + * to disable a clock that has not been enabled,
5777 + * we need to enable the clock first.
5778 + */
5779 + ret = clk_prepare_enable(ctx->mclk);
5780 + if (!ret)
5781 + clk_disable_unprepare(ctx->mclk);
5782 +
5783 + ret = clk_set_rate(ctx->mclk, CHT_PLAT_CLK_3_HZ);
5784 +
5785 + if (ret)
5786 + dev_err(runtime->dev, "unable to set MCLK rate\n");
5787 + }
5788 return ret;
5789 }
5790
5791 @@ -349,6 +385,18 @@ static struct cht_acpi_card snd_soc_cards[] = {
5792
5793 static char cht_rt5640_codec_name[16]; /* i2c-<HID>:00 with HID being 8 chars */
5794
5795 +static bool is_valleyview(void)
5796 +{
5797 + static const struct x86_cpu_id cpu_ids[] = {
5798 + { X86_VENDOR_INTEL, 6, 55 }, /* Valleyview, Bay Trail */
5799 + {}
5800 + };
5801 +
5802 + if (!x86_match_cpu(cpu_ids))
5803 + return false;
5804 + return true;
5805 +}
5806 +
5807 static int snd_cht_mc_probe(struct platform_device *pdev)
5808 {
5809 int ret_val = 0;
5810 @@ -358,22 +406,32 @@ static int snd_cht_mc_probe(struct platform_device *pdev)
5811 struct sst_acpi_mach *mach;
5812 const char *i2c_name = NULL;
5813 int dai_index = 0;
5814 + bool found = false;
5815
5816 drv = devm_kzalloc(&pdev->dev, sizeof(*drv), GFP_ATOMIC);
5817 if (!drv)
5818 return -ENOMEM;
5819
5820 + mach = (&pdev->dev)->platform_data;
5821 +
5822 for (i = 0; i < ARRAY_SIZE(snd_soc_cards); i++) {
5823 - if (acpi_dev_found(snd_soc_cards[i].codec_id)) {
5824 + if (acpi_dev_found(snd_soc_cards[i].codec_id) &&
5825 + (!strncmp(snd_soc_cards[i].codec_id, mach->id, 8))) {
5826 dev_dbg(&pdev->dev,
5827 "found codec %s\n", snd_soc_cards[i].codec_id);
5828 card = snd_soc_cards[i].soc_card;
5829 drv->acpi_card = &snd_soc_cards[i];
5830 + found = true;
5831 break;
5832 }
5833 }
5834 +
5835 + if (!found) {
5836 + dev_err(&pdev->dev, "No matching HID found in supported list\n");
5837 + return -ENODEV;
5838 + }
5839 +
5840 card->dev = &pdev->dev;
5841 - mach = card->dev->platform_data;
5842 sprintf(drv->codec_name, "i2c-%s:00", drv->acpi_card->codec_id);
5843
5844 /* set correct codec name */
5845 @@ -391,6 +449,16 @@ static int snd_cht_mc_probe(struct platform_device *pdev)
5846 cht_dailink[dai_index].codec_name = cht_rt5640_codec_name;
5847 }
5848
5849 + if (is_valleyview()) {
5850 + drv->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3");
5851 + if (IS_ERR(drv->mclk)) {
5852 + dev_err(&pdev->dev,
5853 + "Failed to get MCLK from pmc_plt_clk_3: %ld\n",
5854 + PTR_ERR(drv->mclk));
5855 + return PTR_ERR(drv->mclk);
5856 + }
5857 + }
5858 +
5859 snd_soc_card_set_drvdata(card, drv);
5860 ret_val = devm_snd_soc_register_card(&pdev->dev, card);
5861 if (ret_val) {
5862 diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
5863 index 687a8f83dbe5..15c92400cea4 100644
5864 --- a/sound/soc/sunxi/sun4i-i2s.c
5865 +++ b/sound/soc/sunxi/sun4i-i2s.c
5866 @@ -14,9 +14,11 @@
5867 #include <linux/clk.h>
5868 #include <linux/dmaengine.h>
5869 #include <linux/module.h>
5870 +#include <linux/of_device.h>
5871 #include <linux/platform_device.h>
5872 #include <linux/pm_runtime.h>
5873 #include <linux/regmap.h>
5874 +#include <linux/reset.h>
5875
5876 #include <sound/dmaengine_pcm.h>
5877 #include <sound/pcm_params.h>
5878 @@ -92,6 +94,7 @@ struct sun4i_i2s {
5879 struct clk *bus_clk;
5880 struct clk *mod_clk;
5881 struct regmap *regmap;
5882 + struct reset_control *rst;
5883
5884 struct snd_dmaengine_dai_dma_data playback_dma_data;
5885 };
5886 @@ -585,9 +588,22 @@ static int sun4i_i2s_runtime_suspend(struct device *dev)
5887 return 0;
5888 }
5889
5890 +struct sun4i_i2s_quirks {
5891 + bool has_reset;
5892 +};
5893 +
5894 +static const struct sun4i_i2s_quirks sun4i_a10_i2s_quirks = {
5895 + .has_reset = false,
5896 +};
5897 +
5898 +static const struct sun4i_i2s_quirks sun6i_a31_i2s_quirks = {
5899 + .has_reset = true,
5900 +};
5901 +
5902 static int sun4i_i2s_probe(struct platform_device *pdev)
5903 {
5904 struct sun4i_i2s *i2s;
5905 + const struct sun4i_i2s_quirks *quirks;
5906 struct resource *res;
5907 void __iomem *regs;
5908 int irq, ret;
5909 @@ -608,6 +624,12 @@ static int sun4i_i2s_probe(struct platform_device *pdev)
5910 return irq;
5911 }
5912
5913 + quirks = of_device_get_match_data(&pdev->dev);
5914 + if (!quirks) {
5915 + dev_err(&pdev->dev, "Failed to determine the quirks to use\n");
5916 + return -ENODEV;
5917 + }
5918 +
5919 i2s->bus_clk = devm_clk_get(&pdev->dev, "apb");
5920 if (IS_ERR(i2s->bus_clk)) {
5921 dev_err(&pdev->dev, "Can't get our bus clock\n");
5922 @@ -626,7 +648,24 @@ static int sun4i_i2s_probe(struct platform_device *pdev)
5923 dev_err(&pdev->dev, "Can't get our mod clock\n");
5924 return PTR_ERR(i2s->mod_clk);
5925 }
5926 -
5927 +
5928 + if (quirks->has_reset) {
5929 + i2s->rst = devm_reset_control_get(&pdev->dev, NULL);
5930 + if (IS_ERR(i2s->rst)) {
5931 + dev_err(&pdev->dev, "Failed to get reset control\n");
5932 + return PTR_ERR(i2s->rst);
5933 + }
5934 + }
5935 +
5936 + if (!IS_ERR(i2s->rst)) {
5937 + ret = reset_control_deassert(i2s->rst);
5938 + if (ret) {
5939 + dev_err(&pdev->dev,
5940 + "Failed to deassert the reset control\n");
5941 + return -EINVAL;
5942 + }
5943 + }
5944 +
5945 i2s->playback_dma_data.addr = res->start + SUN4I_I2S_FIFO_TX_REG;
5946 i2s->playback_dma_data.maxburst = 4;
5947
5948 @@ -658,23 +697,37 @@ static int sun4i_i2s_probe(struct platform_device *pdev)
5949 sun4i_i2s_runtime_suspend(&pdev->dev);
5950 err_pm_disable:
5951 pm_runtime_disable(&pdev->dev);
5952 + if (!IS_ERR(i2s->rst))
5953 + reset_control_assert(i2s->rst);
5954
5955 return ret;
5956 }
5957
5958 static int sun4i_i2s_remove(struct platform_device *pdev)
5959 {
5960 + struct sun4i_i2s *i2s = dev_get_drvdata(&pdev->dev);
5961 +
5962 snd_dmaengine_pcm_unregister(&pdev->dev);
5963
5964 pm_runtime_disable(&pdev->dev);
5965 if (!pm_runtime_status_suspended(&pdev->dev))
5966 sun4i_i2s_runtime_suspend(&pdev->dev);
5967
5968 + if (!IS_ERR(i2s->rst))
5969 + reset_control_assert(i2s->rst);
5970 +
5971 return 0;
5972 }
5973
5974 static const struct of_device_id sun4i_i2s_match[] = {
5975 - { .compatible = "allwinner,sun4i-a10-i2s", },
5976 + {
5977 + .compatible = "allwinner,sun4i-a10-i2s",
5978 + .data = &sun4i_a10_i2s_quirks,
5979 + },
5980 + {
5981 + .compatible = "allwinner,sun6i-a31-i2s",
5982 + .data = &sun6i_a31_i2s_quirks,
5983 + },
5984 {}
5985 };
5986 MODULE_DEVICE_TABLE(of, sun4i_i2s_match);
5987 diff --git a/sound/usb/pcm.c b/sound/usb/pcm.c
5988 index 48afae053c56..cf8459a6fad8 100644
5989 --- a/sound/usb/pcm.c
5990 +++ b/sound/usb/pcm.c
5991 @@ -348,6 +348,16 @@ static int set_sync_ep_implicit_fb_quirk(struct snd_usb_substream *subs,
5992
5993 alts = &iface->altsetting[1];
5994 goto add_sync_ep;
5995 + case USB_ID(0x2466, 0x8003):
5996 + ep = 0x86;
5997 + iface = usb_ifnum_to_if(dev, 2);
5998 +
5999 + if (!iface || iface->num_altsetting == 0)
6000 + return -EINVAL;
6001 +
6002 + alts = &iface->altsetting[1];
6003 + goto add_sync_ep;
6004 +
6005 }
6006 if (attr == USB_ENDPOINT_SYNC_ASYNC &&
6007 altsd->bInterfaceClass == USB_CLASS_VENDOR_SPEC &&
6008 diff --git a/sound/usb/quirks.c b/sound/usb/quirks.c
6009 index 93bb14e7e0f7..eb4b9f7a571e 100644
6010 --- a/sound/usb/quirks.c
6011 +++ b/sound/usb/quirks.c
6012 @@ -1166,6 +1166,18 @@ static bool is_marantz_denon_dac(unsigned int id)
6013 return false;
6014 }
6015
6016 +/* TEAC UD-501/UD-503/NT-503 USB DACs need a vendor cmd to switch
6017 + * between PCM/DOP and native DSD mode
6018 + */
6019 +static bool is_teac_50X_dac(unsigned int id)
6020 +{
6021 + switch (id) {
6022 + case USB_ID(0x0644, 0x8043): /* TEAC UD-501/UD-503/NT-503 */
6023 + return true;
6024 + }
6025 + return false;
6026 +}
6027 +
6028 int snd_usb_select_mode_quirk(struct snd_usb_substream *subs,
6029 struct audioformat *fmt)
6030 {
6031 @@ -1193,6 +1205,26 @@ int snd_usb_select_mode_quirk(struct snd_usb_substream *subs,
6032 break;
6033 }
6034 mdelay(20);
6035 + } else if (is_teac_50X_dac(subs->stream->chip->usb_id)) {
6036 + /* Vendor mode switch cmd is required. */
6037 + switch (fmt->altsetting) {
6038 + case 3: /* DSD mode (DSD_U32) requested */
6039 + err = snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), 0,
6040 + USB_DIR_OUT|USB_TYPE_VENDOR|USB_RECIP_INTERFACE,
6041 + 1, 1, NULL, 0);
6042 + if (err < 0)
6043 + return err;
6044 + break;
6045 +
6046 + case 2: /* PCM or DOP mode (S32) requested */
6047 + case 1: /* PCM mode (S16) requested */
6048 + err = snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), 0,
6049 + USB_DIR_OUT|USB_TYPE_VENDOR|USB_RECIP_INTERFACE,
6050 + 0, 1, NULL, 0);
6051 + if (err < 0)
6052 + return err;
6053 + break;
6054 + }
6055 }
6056 return 0;
6057 }
6058 @@ -1338,5 +1370,11 @@ u64 snd_usb_interface_dsd_format_quirks(struct snd_usb_audio *chip,
6059 return SNDRV_PCM_FMTBIT_DSD_U32_BE;
6060 }
6061
6062 + /* TEAC devices with USB DAC functionality */
6063 + if (is_teac_50X_dac(chip->usb_id)) {
6064 + if (fp->altsetting == 3)
6065 + return SNDRV_PCM_FMTBIT_DSD_U32_BE;
6066 + }
6067 +
6068 return 0;
6069 }