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    Contents of /trunk/kernel-magellan/patches-3.2/0109-3.2.10-all-fixes.patch

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    Revision 1704 - (show annotations) (download)
    Fri Mar 16 08:52:00 2012 UTC (12 years, 1 month ago) by niro
    File size: 157241 byte(s) 
    -updated to linux-3.2.11
    1 diff --git a/Documentation/hwmon/jc42 b/Documentation/hwmon/jc42
    2 index a22ecf4..52729a7 100644
    3 --- a/Documentation/hwmon/jc42
    4 +++ b/Documentation/hwmon/jc42
    5 @@ -7,21 +7,29 @@ Supported chips:
    6 Addresses scanned: I2C 0x18 - 0x1f
    7 Datasheets:
    8 http://www.analog.com/static/imported-files/data_sheets/ADT7408.pdf
    9 - * IDT TSE2002B3, TS3000B3
    10 - Prefix: 'tse2002b3', 'ts3000b3'
    11 + * Atmel AT30TS00
    12 + Prefix: 'at30ts00'
    13 Addresses scanned: I2C 0x18 - 0x1f
    14 Datasheets:
    15 - http://www.idt.com/products/getdoc.cfm?docid=18715691
    16 - http://www.idt.com/products/getdoc.cfm?docid=18715692
    17 + http://www.atmel.com/Images/doc8585.pdf
    18 + * IDT TSE2002B3, TSE2002GB2, TS3000B3, TS3000GB2
    19 + Prefix: 'tse2002', 'ts3000'
    20 + Addresses scanned: I2C 0x18 - 0x1f
    21 + Datasheets:
    22 + http://www.idt.com/sites/default/files/documents/IDT_TSE2002B3C_DST_20100512_120303152056.pdf
    23 + http://www.idt.com/sites/default/files/documents/IDT_TSE2002GB2A1_DST_20111107_120303145914.pdf
    24 + http://www.idt.com/sites/default/files/documents/IDT_TS3000B3A_DST_20101129_120303152013.pdf
    25 + http://www.idt.com/sites/default/files/documents/IDT_TS3000GB2A1_DST_20111104_120303151012.pdf
    26 * Maxim MAX6604
    27 Prefix: 'max6604'
    28 Addresses scanned: I2C 0x18 - 0x1f
    29 Datasheets:
    30 http://datasheets.maxim-ic.com/en/ds/MAX6604.pdf
    31 - * Microchip MCP9805, MCP98242, MCP98243, MCP9843
    32 - Prefixes: 'mcp9805', 'mcp98242', 'mcp98243', 'mcp9843'
    33 + * Microchip MCP9804, MCP9805, MCP98242, MCP98243, MCP9843
    34 + Prefixes: 'mcp9804', 'mcp9805', 'mcp98242', 'mcp98243', 'mcp9843'
    35 Addresses scanned: I2C 0x18 - 0x1f
    36 Datasheets:
    37 + http://ww1.microchip.com/downloads/en/DeviceDoc/22203C.pdf
    38 http://ww1.microchip.com/downloads/en/DeviceDoc/21977b.pdf
    39 http://ww1.microchip.com/downloads/en/DeviceDoc/21996a.pdf
    40 http://ww1.microchip.com/downloads/en/DeviceDoc/22153c.pdf
    41 @@ -48,6 +56,12 @@ Supported chips:
    42 Datasheets:
    43 http://www.st.com/stonline/products/literature/ds/13447/stts424.pdf
    44 http://www.st.com/stonline/products/literature/ds/13448/stts424e02.pdf
    45 + * ST Microelectronics STTS2002, STTS3000
    46 + Prefix: 'stts2002', 'stts3000'
    47 + Addresses scanned: I2C 0x18 - 0x1f
    48 + Datasheets:
    49 + http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/DATASHEET/CD00225278.pdf
    50 + http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/DATA_BRIEF/CD00270920.pdf
    51 * JEDEC JC 42.4 compliant temperature sensor chips
    52 Prefix: 'jc42'
    53 Addresses scanned: I2C 0x18 - 0x1f
    54 diff --git a/arch/alpha/include/asm/futex.h b/arch/alpha/include/asm/futex.h
    55 index e8a761a..f939794 100644
    56 --- a/arch/alpha/include/asm/futex.h
    57 +++ b/arch/alpha/include/asm/futex.h
    58 @@ -108,7 +108,7 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
    59 " lda $31,3b-2b(%0)\n"
    60 " .previous\n"
    61 : "+r"(ret), "=&r"(prev), "=&r"(cmp)
    62 - : "r"(uaddr), "r"((long)oldval), "r"(newval)
    63 + : "r"(uaddr), "r"((long)(int)oldval), "r"(newval)
    64 : "memory");
    65
    66 *uval = prev;
    67 diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
    68 index b259c7c..ab3740e 100644
    69 --- a/arch/arm/Kconfig
    70 +++ b/arch/arm/Kconfig
    71 @@ -1272,7 +1272,7 @@ config ARM_ERRATA_743622
    72 depends on CPU_V7
    73 help
    74 This option enables the workaround for the 743622 Cortex-A9
    75 - (r2p0..r2p2) erratum. Under very rare conditions, a faulty
    76 + (r2p*) erratum. Under very rare conditions, a faulty
    77 optimisation in the Cortex-A9 Store Buffer may lead to data
    78 corruption. This workaround sets a specific bit in the diagnostic
    79 register of the Cortex-A9 which disables the Store Buffer
    80 diff --git a/arch/arm/include/asm/pmu.h b/arch/arm/include/asm/pmu.h
    81 index 0bda22c..665ef2c 100644
    82 --- a/arch/arm/include/asm/pmu.h
    83 +++ b/arch/arm/include/asm/pmu.h
    84 @@ -125,7 +125,7 @@ int __init armpmu_register(struct arm_pmu *armpmu, char *name, int type);
    85
    86 u64 armpmu_event_update(struct perf_event *event,
    87 struct hw_perf_event *hwc,
    88 - int idx, int overflow);
    89 + int idx);
    90
    91 int armpmu_event_set_period(struct perf_event *event,
    92 struct hw_perf_event *hwc,
    93 diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
    94 index 88b0941..ecebb89 100644
    95 --- a/arch/arm/kernel/perf_event.c
    96 +++ b/arch/arm/kernel/perf_event.c
    97 @@ -187,7 +187,7 @@ armpmu_event_set_period(struct perf_event *event,
    98 u64
    99 armpmu_event_update(struct perf_event *event,
    100 struct hw_perf_event *hwc,
    101 - int idx, int overflow)
    102 + int idx)
    103 {
    104 struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
    105 u64 delta, prev_raw_count, new_raw_count;
    106 @@ -200,13 +200,7 @@ again:
    107 new_raw_count) != prev_raw_count)
    108 goto again;
    109
    110 - new_raw_count &= armpmu->max_period;
    111 - prev_raw_count &= armpmu->max_period;
    112 -
    113 - if (overflow)
    114 - delta = armpmu->max_period - prev_raw_count + new_raw_count + 1;
    115 - else
    116 - delta = new_raw_count - prev_raw_count;
    117 + delta = (new_raw_count - prev_raw_count) & armpmu->max_period;
    118
    119 local64_add(delta, &event->count);
    120 local64_sub(delta, &hwc->period_left);
    121 @@ -223,7 +217,7 @@ armpmu_read(struct perf_event *event)
    122 if (hwc->idx < 0)
    123 return;
    124
    125 - armpmu_event_update(event, hwc, hwc->idx, 0);
    126 + armpmu_event_update(event, hwc, hwc->idx);
    127 }
    128
    129 static void
    130 @@ -239,7 +233,7 @@ armpmu_stop(struct perf_event *event, int flags)
    131 if (!(hwc->state & PERF_HES_STOPPED)) {
    132 armpmu->disable(hwc, hwc->idx);
    133 barrier(); /* why? */
    134 - armpmu_event_update(event, hwc, hwc->idx, 0);
    135 + armpmu_event_update(event, hwc, hwc->idx);
    136 hwc->state |= PERF_HES_STOPPED | PERF_HES_UPTODATE;
    137 }
    138 }
    139 @@ -519,7 +513,13 @@ __hw_perf_event_init(struct perf_event *event)
    140 hwc->config_base |= (unsigned long)mapping;
    141
    142 if (!hwc->sample_period) {
    143 - hwc->sample_period = armpmu->max_period;
    144 + /*
    145 + * For non-sampling runs, limit the sample_period to half
    146 + * of the counter width. That way, the new counter value
    147 + * is far less likely to overtake the previous one unless
    148 + * you have some serious IRQ latency issues.
    149 + */
    150 + hwc->sample_period = armpmu->max_period >> 1;
    151 hwc->last_period = hwc->sample_period;
    152 local64_set(&hwc->period_left, hwc->sample_period);
    153 }
    154 diff --git a/arch/arm/kernel/perf_event_v6.c b/arch/arm/kernel/perf_event_v6.c
    155 index e63d811..0ad3c6f 100644
    156 --- a/arch/arm/kernel/perf_event_v6.c
    157 +++ b/arch/arm/kernel/perf_event_v6.c
    158 @@ -463,23 +463,6 @@ armv6pmu_enable_event(struct hw_perf_event *hwc,
    159 raw_spin_unlock_irqrestore(&events->pmu_lock, flags);
    160 }
    161
    162 -static int counter_is_active(unsigned long pmcr, int idx)
    163 -{
    164 - unsigned long mask = 0;
    165 - if (idx == ARMV6_CYCLE_COUNTER)
    166 - mask = ARMV6_PMCR_CCOUNT_IEN;
    167 - else if (idx == ARMV6_COUNTER0)
    168 - mask = ARMV6_PMCR_COUNT0_IEN;
    169 - else if (idx == ARMV6_COUNTER1)
    170 - mask = ARMV6_PMCR_COUNT1_IEN;
    171 -
    172 - if (mask)
    173 - return pmcr & mask;
    174 -
    175 - WARN_ONCE(1, "invalid counter number (%d)\n", idx);
    176 - return 0;
    177 -}
    178 -
    179 static irqreturn_t
    180 armv6pmu_handle_irq(int irq_num,
    181 void *dev)
    182 @@ -509,7 +492,8 @@ armv6pmu_handle_irq(int irq_num,
    183 struct perf_event *event = cpuc->events[idx];
    184 struct hw_perf_event *hwc;
    185
    186 - if (!counter_is_active(pmcr, idx))
    187 + /* Ignore if we don't have an event. */
    188 + if (!event)
    189 continue;
    190
    191 /*
    192 @@ -520,7 +504,7 @@ armv6pmu_handle_irq(int irq_num,
    193 continue;
    194
    195 hwc = &event->hw;
    196 - armpmu_event_update(event, hwc, idx, 1);
    197 + armpmu_event_update(event, hwc, idx);
    198 data.period = event->hw.last_period;
    199 if (!armpmu_event_set_period(event, hwc, idx))
    200 continue;
    201 diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c
    202 index 1ef6d00..1049319 100644
    203 --- a/arch/arm/kernel/perf_event_v7.c
    204 +++ b/arch/arm/kernel/perf_event_v7.c
    205 @@ -878,6 +878,11 @@ static inline int armv7_pmnc_disable_intens(int idx)
    206
    207 counter = ARMV7_IDX_TO_COUNTER(idx);
    208 asm volatile("mcr p15, 0, %0, c9, c14, 2" : : "r" (BIT(counter)));
    209 + isb();
    210 + /* Clear the overflow flag in case an interrupt is pending. */
    211 + asm volatile("mcr p15, 0, %0, c9, c12, 3" : : "r" (BIT(counter)));
    212 + isb();
    213 +
    214 return idx;
    215 }
    216
    217 @@ -1024,6 +1029,10 @@ static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev)
    218 struct perf_event *event = cpuc->events[idx];
    219 struct hw_perf_event *hwc;
    220
    221 + /* Ignore if we don't have an event. */
    222 + if (!event)
    223 + continue;
    224 +
    225 /*
    226 * We have a single interrupt for all counters. Check that
    227 * each counter has overflowed before we process it.
    228 @@ -1032,7 +1041,7 @@ static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev)
    229 continue;
    230
    231 hwc = &event->hw;
    232 - armpmu_event_update(event, hwc, idx, 1);
    233 + armpmu_event_update(event, hwc, idx);
    234 data.period = event->hw.last_period;
    235 if (!armpmu_event_set_period(event, hwc, idx))
    236 continue;
    237 diff --git a/arch/arm/kernel/perf_event_xscale.c b/arch/arm/kernel/perf_event_xscale.c
    238 index e0cca10..9fc2c95 100644
    239 --- a/arch/arm/kernel/perf_event_xscale.c
    240 +++ b/arch/arm/kernel/perf_event_xscale.c
    241 @@ -253,11 +253,14 @@ xscale1pmu_handle_irq(int irq_num, void *dev)
    242 struct perf_event *event = cpuc->events[idx];
    243 struct hw_perf_event *hwc;
    244
    245 + if (!event)
    246 + continue;
    247 +
    248 if (!xscale1_pmnc_counter_has_overflowed(pmnc, idx))
    249 continue;
    250
    251 hwc = &event->hw;
    252 - armpmu_event_update(event, hwc, idx, 1);
    253 + armpmu_event_update(event, hwc, idx);
    254 data.period = event->hw.last_period;
    255 if (!armpmu_event_set_period(event, hwc, idx))
    256 continue;
    257 @@ -590,11 +593,14 @@ xscale2pmu_handle_irq(int irq_num, void *dev)
    258 struct perf_event *event = cpuc->events[idx];
    259 struct hw_perf_event *hwc;
    260
    261 - if (!xscale2_pmnc_counter_has_overflowed(pmnc, idx))
    262 + if (!event)
    263 + continue;
    264 +
    265 + if (!xscale2_pmnc_counter_has_overflowed(of_flags, idx))
    266 continue;
    267
    268 hwc = &event->hw;
    269 - armpmu_event_update(event, hwc, idx, 1);
    270 + armpmu_event_update(event, hwc, idx);
    271 data.period = event->hw.last_period;
    272 if (!armpmu_event_set_period(event, hwc, idx))
    273 continue;
    274 @@ -661,7 +667,7 @@ xscale2pmu_enable_event(struct hw_perf_event *hwc, int idx)
    275 static void
    276 xscale2pmu_disable_event(struct hw_perf_event *hwc, int idx)
    277 {
    278 - unsigned long flags, ien, evtsel;
    279 + unsigned long flags, ien, evtsel, of_flags;
    280 struct pmu_hw_events *events = cpu_pmu->get_hw_events();
    281
    282 ien = xscale2pmu_read_int_enable();
    283 @@ -670,26 +676,31 @@ xscale2pmu_disable_event(struct hw_perf_event *hwc, int idx)
    284 switch (idx) {
    285 case XSCALE_CYCLE_COUNTER:
    286 ien &= ~XSCALE2_CCOUNT_INT_EN;
    287 + of_flags = XSCALE2_CCOUNT_OVERFLOW;
    288 break;
    289 case XSCALE_COUNTER0:
    290 ien &= ~XSCALE2_COUNT0_INT_EN;
    291 evtsel &= ~XSCALE2_COUNT0_EVT_MASK;
    292 evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT0_EVT_SHFT;
    293 + of_flags = XSCALE2_COUNT0_OVERFLOW;
    294 break;
    295 case XSCALE_COUNTER1:
    296 ien &= ~XSCALE2_COUNT1_INT_EN;
    297 evtsel &= ~XSCALE2_COUNT1_EVT_MASK;
    298 evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT1_EVT_SHFT;
    299 + of_flags = XSCALE2_COUNT1_OVERFLOW;
    300 break;
    301 case XSCALE_COUNTER2:
    302 ien &= ~XSCALE2_COUNT2_INT_EN;
    303 evtsel &= ~XSCALE2_COUNT2_EVT_MASK;
    304 evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT2_EVT_SHFT;
    305 + of_flags = XSCALE2_COUNT2_OVERFLOW;
    306 break;
    307 case XSCALE_COUNTER3:
    308 ien &= ~XSCALE2_COUNT3_INT_EN;
    309 evtsel &= ~XSCALE2_COUNT3_EVT_MASK;
    310 evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT3_EVT_SHFT;
    311 + of_flags = XSCALE2_COUNT3_OVERFLOW;
    312 break;
    313 default:
    314 WARN_ONCE(1, "invalid counter number (%d)\n", idx);
    315 @@ -699,6 +710,7 @@ xscale2pmu_disable_event(struct hw_perf_event *hwc, int idx)
    316 raw_spin_lock_irqsave(&events->pmu_lock, flags);
    317 xscale2pmu_write_event_select(evtsel);
    318 xscale2pmu_write_int_enable(ien);
    319 + xscale2pmu_write_overflow_flags(of_flags);
    320 raw_spin_unlock_irqrestore(&events->pmu_lock, flags);
    321 }
    322
    323 diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c
    324 index a9e0dae..1620b15 100644
    325 --- a/arch/arm/mach-dove/common.c
    326 +++ b/arch/arm/mach-dove/common.c
    327 @@ -29,6 +29,7 @@
    328 #include <asm/mach/arch.h>
    329 #include <linux/irq.h>
    330 #include <plat/time.h>
    331 +#include <plat/ehci-orion.h>
    332 #include <plat/common.h>
    333 #include "common.h"
    334
    335 @@ -72,7 +73,7 @@ void __init dove_map_io(void)
    336 void __init dove_ehci0_init(void)
    337 {
    338 orion_ehci_init(&dove_mbus_dram_info,
    339 - DOVE_USB0_PHYS_BASE, IRQ_DOVE_USB0);
    340 + DOVE_USB0_PHYS_BASE, IRQ_DOVE_USB0, EHCI_PHY_NA);
    341 }
    342
    343 /*****************************************************************************
    344 diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
    345 index f3248cf..c5dbbb3 100644
    346 --- a/arch/arm/mach-kirkwood/common.c
    347 +++ b/arch/arm/mach-kirkwood/common.c
    348 @@ -28,6 +28,7 @@
    349 #include <plat/cache-feroceon-l2.h>
    350 #include <plat/mvsdio.h>
    351 #include <plat/orion_nand.h>
    352 +#include <plat/ehci-orion.h>
    353 #include <plat/common.h>
    354 #include <plat/time.h>
    355 #include "common.h"
    356 @@ -74,7 +75,7 @@ void __init kirkwood_ehci_init(void)
    357 {
    358 kirkwood_clk_ctrl |= CGC_USB0;
    359 orion_ehci_init(&kirkwood_mbus_dram_info,
    360 - USB_PHYS_BASE, IRQ_KIRKWOOD_USB);
    361 + USB_PHYS_BASE, IRQ_KIRKWOOD_USB, EHCI_PHY_NA);
    362 }
    363
    364
    365 diff --git a/arch/arm/mach-kirkwood/mpp.h b/arch/arm/mach-kirkwood/mpp.h
    366 index ac78795..7afccf4 100644
    367 --- a/arch/arm/mach-kirkwood/mpp.h
    368 +++ b/arch/arm/mach-kirkwood/mpp.h
    369 @@ -31,313 +31,313 @@
    370 #define MPP_F6282_MASK MPP( 0, 0x0, 0, 0, 0, 0, 0, 0, 1 )
    371
    372 #define MPP0_GPIO MPP( 0, 0x0, 1, 1, 1, 1, 1, 1, 1 )
    373 -#define MPP0_NF_IO2 MPP( 0, 0x1, 1, 1, 1, 1, 1, 1, 1 )
    374 -#define MPP0_SPI_SCn MPP( 0, 0x2, 0, 1, 1, 1, 1, 1, 1 )
    375 +#define MPP0_NF_IO2 MPP( 0, 0x1, 0, 0, 1, 1, 1, 1, 1 )
    376 +#define MPP0_SPI_SCn MPP( 0, 0x2, 0, 0, 1, 1, 1, 1, 1 )
    377
    378 #define MPP1_GPO MPP( 1, 0x0, 0, 1, 1, 1, 1, 1, 1 )
    379 -#define MPP1_NF_IO3 MPP( 1, 0x1, 1, 1, 1, 1, 1, 1, 1 )
    380 -#define MPP1_SPI_MOSI MPP( 1, 0x2, 0, 1, 1, 1, 1, 1, 1 )
    381 +#define MPP1_NF_IO3 MPP( 1, 0x1, 0, 0, 1, 1, 1, 1, 1 )
    382 +#define MPP1_SPI_MOSI MPP( 1, 0x2, 0, 0, 1, 1, 1, 1, 1 )
    383
    384 #define MPP2_GPO MPP( 2, 0x0, 0, 1, 1, 1, 1, 1, 1 )
    385 -#define MPP2_NF_IO4 MPP( 2, 0x1, 1, 1, 1, 1, 1, 1, 1 )
    386 -#define MPP2_SPI_SCK MPP( 2, 0x2, 0, 1, 1, 1, 1, 1, 1 )
    387 +#define MPP2_NF_IO4 MPP( 2, 0x1, 0, 0, 1, 1, 1, 1, 1 )
    388 +#define MPP2_SPI_SCK MPP( 2, 0x2, 0, 0, 1, 1, 1, 1, 1 )
    389
    390 #define MPP3_GPO MPP( 3, 0x0, 0, 1, 1, 1, 1, 1, 1 )
    391 -#define MPP3_NF_IO5 MPP( 3, 0x1, 1, 1, 1, 1, 1, 1, 1 )
    392 -#define MPP3_SPI_MISO MPP( 3, 0x2, 1, 0, 1, 1, 1, 1, 1 )
    393 +#define MPP3_NF_IO5 MPP( 3, 0x1, 0, 0, 1, 1, 1, 1, 1 )
    394 +#define MPP3_SPI_MISO MPP( 3, 0x2, 0, 0, 1, 1, 1, 1, 1 )
    395
    396 #define MPP4_GPIO MPP( 4, 0x0, 1, 1, 1, 1, 1, 1, 1 )
    397 -#define MPP4_NF_IO6 MPP( 4, 0x1, 1, 1, 1, 1, 1, 1, 1 )
    398 -#define MPP4_UART0_RXD MPP( 4, 0x2, 1, 0, 1, 1, 1, 1, 1 )
    399 -#define MPP4_SATA1_ACTn MPP( 4, 0x5, 0, 1, 0, 0, 1, 1, 1 )
    400 +#define MPP4_NF_IO6 MPP( 4, 0x1, 0, 0, 1, 1, 1, 1, 1 )
    401 +#define MPP4_UART0_RXD MPP( 4, 0x2, 0, 0, 1, 1, 1, 1, 1 )
    402 +#define MPP4_SATA1_ACTn MPP( 4, 0x5, 0, 0, 0, 0, 1, 1, 1 )
    403 #define MPP4_LCD_VGA_HSYNC MPP( 4, 0xb, 0, 0, 0, 0, 0, 0, 1 )
    404 -#define MPP4_PTP_CLK MPP( 4, 0xd, 1, 0, 1, 1, 1, 1, 0 )
    405 +#define MPP4_PTP_CLK MPP( 4, 0xd, 0, 0, 1, 1, 1, 1, 0 )
    406
    407 #define MPP5_GPO MPP( 5, 0x0, 0, 1, 1, 1, 1, 1, 1 )
    408 -#define MPP5_NF_IO7 MPP( 5, 0x1, 1, 1, 1, 1, 1, 1, 1 )
    409 -#define MPP5_UART0_TXD MPP( 5, 0x2, 0, 1, 1, 1, 1, 1, 1 )
    410 -#define MPP5_PTP_TRIG_GEN MPP( 5, 0x4, 0, 1, 1, 1, 1, 1, 0 )
    411 -#define MPP5_SATA0_ACTn MPP( 5, 0x5, 0, 1, 0, 1, 1, 1, 1 )
    412 +#define MPP5_NF_IO7 MPP( 5, 0x1, 0, 0, 1, 1, 1, 1, 1 )
    413 +#define MPP5_UART0_TXD MPP( 5, 0x2, 0, 0, 1, 1, 1, 1, 1 )
    414 +#define MPP5_PTP_TRIG_GEN MPP( 5, 0x4, 0, 0, 1, 1, 1, 1, 0 )
    415 +#define MPP5_SATA0_ACTn MPP( 5, 0x5, 0, 0, 0, 1, 1, 1, 1 )
    416 #define MPP5_LCD_VGA_VSYNC MPP( 5, 0xb, 0, 0, 0, 0, 0, 0, 1 )
    417
    418 -#define MPP6_SYSRST_OUTn MPP( 6, 0x1, 0, 1, 1, 1, 1, 1, 1 )
    419 -#define MPP6_SPI_MOSI MPP( 6, 0x2, 0, 1, 1, 1, 1, 1, 1 )
    420 -#define MPP6_PTP_TRIG_GEN MPP( 6, 0x3, 0, 1, 1, 1, 1, 1, 0 )
    421 +#define MPP6_SYSRST_OUTn MPP( 6, 0x1, 0, 0, 1, 1, 1, 1, 1 )
    422 +#define MPP6_SPI_MOSI MPP( 6, 0x2, 0, 0, 1, 1, 1, 1, 1 )
    423 +#define MPP6_PTP_TRIG_GEN MPP( 6, 0x3, 0, 0, 1, 1, 1, 1, 0 )
    424
    425 #define MPP7_GPO MPP( 7, 0x0, 0, 1, 1, 1, 1, 1, 1 )
    426 -#define MPP7_PEX_RST_OUTn MPP( 7, 0x1, 0, 1, 1, 1, 1, 1, 0 )
    427 -#define MPP7_SPI_SCn MPP( 7, 0x2, 0, 1, 1, 1, 1, 1, 1 )
    428 -#define MPP7_PTP_TRIG_GEN MPP( 7, 0x3, 0, 1, 1, 1, 1, 1, 0 )
    429 -#define MPP7_LCD_PWM MPP( 7, 0xb, 0, 1, 0, 0, 0, 0, 1 )
    430 +#define MPP7_PEX_RST_OUTn MPP( 7, 0x1, 0, 0, 1, 1, 1, 1, 0 )
    431 +#define MPP7_SPI_SCn MPP( 7, 0x2, 0, 0, 1, 1, 1, 1, 1 )
    432 +#define MPP7_PTP_TRIG_GEN MPP( 7, 0x3, 0, 0, 1, 1, 1, 1, 0 )
    433 +#define MPP7_LCD_PWM MPP( 7, 0xb, 0, 0, 0, 0, 0, 0, 1 )
    434
    435 #define MPP8_GPIO MPP( 8, 0x0, 1, 1, 1, 1, 1, 1, 1 )
    436 -#define MPP8_TW0_SDA MPP( 8, 0x1, 1, 1, 1, 1, 1, 1, 1 )
    437 -#define MPP8_UART0_RTS MPP( 8, 0x2, 0, 1, 1, 1, 1, 1, 1 )
    438 -#define MPP8_UART1_RTS MPP( 8, 0x3, 0, 1, 1, 1, 1, 1, 1 )
    439 -#define MPP8_MII0_RXERR MPP( 8, 0x4, 1, 0, 0, 1, 1, 1, 1 )
    440 -#define MPP8_SATA1_PRESENTn MPP( 8, 0x5, 0, 1, 0, 0, 1, 1, 1 )
    441 -#define MPP8_PTP_CLK MPP( 8, 0xc, 1, 0, 1, 1, 1, 1, 0 )
    442 -#define MPP8_MII0_COL MPP( 8, 0xd, 1, 0, 1, 1, 1, 1, 1 )
    443 +#define MPP8_TW0_SDA MPP( 8, 0x1, 0, 0, 1, 1, 1, 1, 1 )
    444 +#define MPP8_UART0_RTS MPP( 8, 0x2, 0, 0, 1, 1, 1, 1, 1 )
    445 +#define MPP8_UART1_RTS MPP( 8, 0x3, 0, 0, 1, 1, 1, 1, 1 )
    446 +#define MPP8_MII0_RXERR MPP( 8, 0x4, 0, 0, 0, 1, 1, 1, 1 )
    447 +#define MPP8_SATA1_PRESENTn MPP( 8, 0x5, 0, 0, 0, 0, 1, 1, 1 )
    448 +#define MPP8_PTP_CLK MPP( 8, 0xc, 0, 0, 1, 1, 1, 1, 0 )
    449 +#define MPP8_MII0_COL MPP( 8, 0xd, 0, 0, 1, 1, 1, 1, 1 )
    450
    451 #define MPP9_GPIO MPP( 9, 0x0, 1, 1, 1, 1, 1, 1, 1 )
    452 -#define MPP9_TW0_SCK MPP( 9, 0x1, 1, 1, 1, 1, 1, 1, 1 )
    453 -#define MPP9_UART0_CTS MPP( 9, 0x2, 1, 0, 1, 1, 1, 1, 1 )
    454 -#define MPP9_UART1_CTS MPP( 9, 0x3, 1, 0, 1, 1, 1, 1, 1 )
    455 -#define MPP9_SATA0_PRESENTn MPP( 9, 0x5, 0, 1, 0, 1, 1, 1, 1 )
    456 -#define MPP9_PTP_EVENT_REQ MPP( 9, 0xc, 1, 0, 1, 1, 1, 1, 0 )
    457 -#define MPP9_MII0_CRS MPP( 9, 0xd, 1, 0, 1, 1, 1, 1, 1 )
    458 +#define MPP9_TW0_SCK MPP( 9, 0x1, 0, 0, 1, 1, 1, 1, 1 )
    459 +#define MPP9_UART0_CTS MPP( 9, 0x2, 0, 0, 1, 1, 1, 1, 1 )
    460 +#define MPP9_UART1_CTS MPP( 9, 0x3, 0, 0, 1, 1, 1, 1, 1 )
    461 +#define MPP9_SATA0_PRESENTn MPP( 9, 0x5, 0, 0, 0, 1, 1, 1, 1 )
    462 +#define MPP9_PTP_EVENT_REQ MPP( 9, 0xc, 0, 0, 1, 1, 1, 1, 0 )
    463 +#define MPP9_MII0_CRS MPP( 9, 0xd, 0, 0, 1, 1, 1, 1, 1 )
    464
    465 #define MPP10_GPO MPP( 10, 0x0, 0, 1, 1, 1, 1, 1, 1 )
    466 -#define MPP10_SPI_SCK MPP( 10, 0x2, 0, 1, 1, 1, 1, 1, 1 )
    467 -#define MPP10_UART0_TXD MPP( 10, 0X3, 0, 1, 1, 1, 1, 1, 1 )
    468 -#define MPP10_SATA1_ACTn MPP( 10, 0x5, 0, 1, 0, 0, 1, 1, 1 )
    469 -#define MPP10_PTP_TRIG_GEN MPP( 10, 0xc, 0, 1, 1, 1, 1, 1, 0 )
    470 +#define MPP10_SPI_SCK MPP( 10, 0x2, 0, 0, 1, 1, 1, 1, 1 )
    471 +#define MPP10_UART0_TXD MPP( 10, 0X3, 0, 0, 1, 1, 1, 1, 1 )
    472 +#define MPP10_SATA1_ACTn MPP( 10, 0x5, 0, 0, 0, 0, 1, 1, 1 )
    473 +#define MPP10_PTP_TRIG_GEN MPP( 10, 0xc, 0, 0, 1, 1, 1, 1, 0 )
    474
    475 #define MPP11_GPIO MPP( 11, 0x0, 1, 1, 1, 1, 1, 1, 1 )
    476 -#define MPP11_SPI_MISO MPP( 11, 0x2, 1, 0, 1, 1, 1, 1, 1 )
    477 -#define MPP11_UART0_RXD MPP( 11, 0x3, 1, 0, 1, 1, 1, 1, 1 )
    478 -#define MPP11_PTP_EVENT_REQ MPP( 11, 0x4, 1, 0, 1, 1, 1, 1, 0 )
    479 -#define MPP11_PTP_TRIG_GEN MPP( 11, 0xc, 0, 1, 1, 1, 1, 1, 0 )
    480 -#define MPP11_PTP_CLK MPP( 11, 0xd, 1, 0, 1, 1, 1, 1, 0 )
    481 -#define MPP11_SATA0_ACTn MPP( 11, 0x5, 0, 1, 0, 1, 1, 1, 1 )
    482 +#define MPP11_SPI_MISO MPP( 11, 0x2, 0, 0, 1, 1, 1, 1, 1 )
    483 +#define MPP11_UART0_RXD MPP( 11, 0x3, 0, 0, 1, 1, 1, 1, 1 )
    484 +#define MPP11_PTP_EVENT_REQ MPP( 11, 0x4, 0, 0, 1, 1, 1, 1, 0 )
    485 +#define MPP11_PTP_TRIG_GEN MPP( 11, 0xc, 0, 0, 1, 1, 1, 1, 0 )
    486 +#define MPP11_PTP_CLK MPP( 11, 0xd, 0, 0, 1, 1, 1, 1, 0 )
    487 +#define MPP11_SATA0_ACTn MPP( 11, 0x5, 0, 0, 0, 1, 1, 1, 1 )
    488
    489 #define MPP12_GPO MPP( 12, 0x0, 0, 1, 1, 1, 1, 1, 1 )
    490 -#define MPP12_SD_CLK MPP( 12, 0x1, 0, 1, 1, 1, 1, 1, 1 )
    491 -#define MPP12_AU_SPDIF0 MPP( 12, 0xa, 0, 1, 0, 0, 0, 0, 1 )
    492 -#define MPP12_SPI_MOSI MPP( 12, 0xb, 0, 1, 0, 0, 0, 0, 1 )
    493 -#define MPP12_TW1_SDA MPP( 12, 0xd, 1, 0, 0, 0, 0, 0, 1 )
    494 +#define MPP12_SD_CLK MPP( 12, 0x1, 0, 0, 1, 1, 1, 1, 1 )
    495 +#define MPP12_AU_SPDIF0 MPP( 12, 0xa, 0, 0, 0, 0, 0, 0, 1 )
    496 +#define MPP12_SPI_MOSI MPP( 12, 0xb, 0, 0, 0, 0, 0, 0, 1 )
    497 +#define MPP12_TW1_SDA MPP( 12, 0xd, 0, 0, 0, 0, 0, 0, 1 )
    498
    499 #define MPP13_GPIO MPP( 13, 0x0, 1, 1, 1, 1, 1, 1, 1 )
    500 -#define MPP13_SD_CMD MPP( 13, 0x1, 1, 1, 1, 1, 1, 1, 1 )
    501 -#define MPP13_UART1_TXD MPP( 13, 0x3, 0, 1, 1, 1, 1, 1, 1 )
    502 -#define MPP13_AU_SPDIFRMCLK MPP( 13, 0xa, 0, 1, 0, 0, 0, 0, 1 )
    503 -#define MPP13_LCDPWM MPP( 13, 0xb, 0, 1, 0, 0, 0, 0, 1 )
    504 +#define MPP13_SD_CMD MPP( 13, 0x1, 0, 0, 1, 1, 1, 1, 1 )
    505 +#define MPP13_UART1_TXD MPP( 13, 0x3, 0, 0, 1, 1, 1, 1, 1 )
    506 +#define MPP13_AU_SPDIFRMCLK MPP( 13, 0xa, 0, 0, 0, 0, 0, 0, 1 )
    507 +#define MPP13_LCDPWM MPP( 13, 0xb, 0, 0, 0, 0, 0, 0, 1 )
    508
    509 #define MPP14_GPIO MPP( 14, 0x0, 1, 1, 1, 1, 1, 1, 1 )
    510 -#define MPP14_SD_D0 MPP( 14, 0x1, 1, 1, 1, 1, 1, 1, 1 )
    511 -#define MPP14_UART1_RXD MPP( 14, 0x3, 1, 0, 1, 1, 1, 1, 1 )
    512 -#define MPP14_SATA1_PRESENTn MPP( 14, 0x4, 0, 1, 0, 0, 1, 1, 1 )
    513 -#define MPP14_AU_SPDIFI MPP( 14, 0xa, 1, 0, 0, 0, 0, 0, 1 )
    514 -#define MPP14_AU_I2SDI MPP( 14, 0xb, 1, 0, 0, 0, 0, 0, 1 )
    515 -#define MPP14_MII0_COL MPP( 14, 0xd, 1, 0, 1, 1, 1, 1, 1 )
    516 +#define MPP14_SD_D0 MPP( 14, 0x1, 0, 0, 1, 1, 1, 1, 1 )
    517 +#define MPP14_UART1_RXD MPP( 14, 0x3, 0, 0, 1, 1, 1, 1, 1 )
    518 +#define MPP14_SATA1_PRESENTn MPP( 14, 0x4, 0, 0, 0, 0, 1, 1, 1 )
    519 +#define MPP14_AU_SPDIFI MPP( 14, 0xa, 0, 0, 0, 0, 0, 0, 1 )
    520 +#define MPP14_AU_I2SDI MPP( 14, 0xb, 0, 0, 0, 0, 0, 0, 1 )
    521 +#define MPP14_MII0_COL MPP( 14, 0xd, 0, 0, 1, 1, 1, 1, 1 )
    522
    523 #define MPP15_GPIO MPP( 15, 0x0, 1, 1, 1, 1, 1, 1, 1 )
    524 -#define MPP15_SD_D1 MPP( 15, 0x1, 1, 1, 1, 1, 1, 1, 1 )
    525 -#define MPP15_UART0_RTS MPP( 15, 0x2, 0, 1, 1, 1, 1, 1, 1 )
    526 -#define MPP15_UART1_TXD MPP( 15, 0x3, 0, 1, 1, 1, 1, 1, 1 )
    527 -#define MPP15_SATA0_ACTn MPP( 15, 0x4, 0, 1, 0, 1, 1, 1, 1 )
    528 -#define MPP15_SPI_CSn MPP( 15, 0xb, 0, 1, 0, 0, 0, 0, 1 )
    529 +#define MPP15_SD_D1 MPP( 15, 0x1, 0, 0, 1, 1, 1, 1, 1 )
    530 +#define MPP15_UART0_RTS MPP( 15, 0x2, 0, 0, 1, 1, 1, 1, 1 )
    531 +#define MPP15_UART1_TXD MPP( 15, 0x3, 0, 0, 1, 1, 1, 1, 1 )
    532 +#define MPP15_SATA0_ACTn MPP( 15, 0x4, 0, 0, 0, 1, 1, 1, 1 )
    533 +#define MPP15_SPI_CSn MPP( 15, 0xb, 0, 0, 0, 0, 0, 0, 1 )
    534
    535 #define MPP16_GPIO MPP( 16, 0x0, 1, 1, 1, 1, 1, 1, 1 )
    536 -#define MPP16_SD_D2 MPP( 16, 0x1, 1, 1, 1, 1, 1, 1, 1 )
    537 -#define MPP16_UART0_CTS MPP( 16, 0x2, 1, 0, 1, 1, 1, 1, 1 )
    538 -#define MPP16_UART1_RXD MPP( 16, 0x3, 1, 0, 1, 1, 1, 1, 1 )
    539 -#define MPP16_SATA1_ACTn MPP( 16, 0x4, 0, 1, 0, 0, 1, 1, 1 )
    540 -#define MPP16_LCD_EXT_REF_CLK MPP( 16, 0xb, 1, 0, 0, 0, 0, 0, 1 )
    541 -#define MPP16_MII0_CRS MPP( 16, 0xd, 1, 0, 1, 1, 1, 1, 1 )
    542 +#define MPP16_SD_D2 MPP( 16, 0x1, 0, 0, 1, 1, 1, 1, 1 )
    543 +#define MPP16_UART0_CTS MPP( 16, 0x2, 0, 0, 1, 1, 1, 1, 1 )
    544 +#define MPP16_UART1_RXD MPP( 16, 0x3, 0, 0, 1, 1, 1, 1, 1 )
    545 +#define MPP16_SATA1_ACTn MPP( 16, 0x4, 0, 0, 0, 0, 1, 1, 1 )
    546 +#define MPP16_LCD_EXT_REF_CLK MPP( 16, 0xb, 0, 0, 0, 0, 0, 0, 1 )
    547 +#define MPP16_MII0_CRS MPP( 16, 0xd, 0, 0, 1, 1, 1, 1, 1 )
    548
    549 #define MPP17_GPIO MPP( 17, 0x0, 1, 1, 1, 1, 1, 1, 1 )
    550 -#define MPP17_SD_D3 MPP( 17, 0x1, 1, 1, 1, 1, 1, 1, 1 )
    551 -#define MPP17_SATA0_PRESENTn MPP( 17, 0x4, 0, 1, 0, 1, 1, 1, 1 )
    552 -#define MPP17_SATA1_ACTn MPP( 17, 0xa, 0, 1, 0, 0, 0, 0, 1 )
    553 -#define MPP17_TW1_SCK MPP( 17, 0xd, 1, 1, 0, 0, 0, 0, 1 )
    554 +#define MPP17_SD_D3 MPP( 17, 0x1, 0, 0, 1, 1, 1, 1, 1 )
    555 +#define MPP17_SATA0_PRESENTn MPP( 17, 0x4, 0, 0, 0, 1, 1, 1, 1 )
    556 +#define MPP17_SATA1_ACTn MPP( 17, 0xa, 0, 0, 0, 0, 0, 0, 1 )
    557 +#define MPP17_TW1_SCK MPP( 17, 0xd, 0, 0, 0, 0, 0, 0, 1 )
    558
    559 #define MPP18_GPO MPP( 18, 0x0, 0, 1, 1, 1, 1, 1, 1 )
    560 -#define MPP18_NF_IO0 MPP( 18, 0x1, 1, 1, 1, 1, 1, 1, 1 )
    561 -#define MPP18_PEX0_CLKREQ MPP( 18, 0x2, 0, 1, 0, 0, 0, 0, 1 )
    562 +#define MPP18_NF_IO0 MPP( 18, 0x1, 0, 0, 1, 1, 1, 1, 1 )
    563 +#define MPP18_PEX0_CLKREQ MPP( 18, 0x2, 0, 0, 0, 0, 0, 0, 1 )
    564
    565 #define MPP19_GPO MPP( 19, 0x0, 0, 1, 1, 1, 1, 1, 1 )
    566 -#define MPP19_NF_IO1 MPP( 19, 0x1, 1, 1, 1, 1, 1, 1, 1 )
    567 +#define MPP19_NF_IO1 MPP( 19, 0x1, 0, 0, 1, 1, 1, 1, 1 )
    568
    569 #define MPP20_GPIO MPP( 20, 0x0, 1, 1, 0, 1, 1, 1, 1 )
    570 -#define MPP20_TSMP0 MPP( 20, 0x1, 1, 1, 0, 0, 1, 1, 1 )
    571 -#define MPP20_TDM_CH0_TX_QL MPP( 20, 0x2, 0, 1, 0, 0, 1, 1, 1 )
    572 +#define MPP20_TSMP0 MPP( 20, 0x1, 0, 0, 0, 0, 1, 1, 1 )
    573 +#define MPP20_TDM_CH0_TX_QL MPP( 20, 0x2, 0, 0, 0, 0, 1, 1, 1 )
    574 #define MPP20_GE1_TXD0 MPP( 20, 0x3, 0, 0, 0, 1, 1, 1, 1 )
    575 -#define MPP20_AU_SPDIFI MPP( 20, 0x4, 1, 0, 0, 0, 1, 1, 1 )
    576 -#define MPP20_SATA1_ACTn MPP( 20, 0x5, 0, 1, 0, 0, 1, 1, 1 )
    577 +#define MPP20_AU_SPDIFI MPP( 20, 0x4, 0, 0, 0, 0, 1, 1, 1 )
    578 +#define MPP20_SATA1_ACTn MPP( 20, 0x5, 0, 0, 0, 0, 1, 1, 1 )
    579 #define MPP20_LCD_D0 MPP( 20, 0xb, 0, 0, 0, 0, 0, 0, 1 )
    580
    581 #define MPP21_GPIO MPP( 21, 0x0, 1, 1, 0, 1, 1, 1, 1 )
    582 -#define MPP21_TSMP1 MPP( 21, 0x1, 1, 1, 0, 0, 1, 1, 1 )
    583 -#define MPP21_TDM_CH0_RX_QL MPP( 21, 0x2, 0, 1, 0, 0, 1, 1, 1 )
    584 +#define MPP21_TSMP1 MPP( 21, 0x1, 0, 0, 0, 0, 1, 1, 1 )
    585 +#define MPP21_TDM_CH0_RX_QL MPP( 21, 0x2, 0, 0, 0, 0, 1, 1, 1 )
    586 #define MPP21_GE1_TXD1 MPP( 21, 0x3, 0, 0, 0, 1, 1, 1, 1 )
    587 -#define MPP21_AU_SPDIFO MPP( 21, 0x4, 0, 1, 0, 0, 1, 1, 1 )
    588 -#define MPP21_SATA0_ACTn MPP( 21, 0x5, 0, 1, 0, 1, 1, 1, 1 )
    589 +#define MPP21_AU_SPDIFO MPP( 21, 0x4, 0, 0, 0, 0, 1, 1, 1 )
    590 +#define MPP21_SATA0_ACTn MPP( 21, 0x5, 0, 0, 0, 1, 1, 1, 1 )
    591 #define MPP21_LCD_D1 MPP( 21, 0xb, 0, 0, 0, 0, 0, 0, 1 )
    592
    593 #define MPP22_GPIO MPP( 22, 0x0, 1, 1, 0, 1, 1, 1, 1 )
    594 -#define MPP22_TSMP2 MPP( 22, 0x1, 1, 1, 0, 0, 1, 1, 1 )
    595 -#define MPP22_TDM_CH2_TX_QL MPP( 22, 0x2, 0, 1, 0, 0, 1, 1, 1 )
    596 +#define MPP22_TSMP2 MPP( 22, 0x1, 0, 0, 0, 0, 1, 1, 1 )
    597 +#define MPP22_TDM_CH2_TX_QL MPP( 22, 0x2, 0, 0, 0, 0, 1, 1, 1 )
    598 #define MPP22_GE1_TXD2 MPP( 22, 0x3, 0, 0, 0, 1, 1, 1, 1 )
    599 -#define MPP22_AU_SPDIFRMKCLK MPP( 22, 0x4, 0, 1, 0, 0, 1, 1, 1 )
    600 -#define MPP22_SATA1_PRESENTn MPP( 22, 0x5, 0, 1, 0, 0, 1, 1, 1 )
    601 +#define MPP22_AU_SPDIFRMKCLK MPP( 22, 0x4, 0, 0, 0, 0, 1, 1, 1 )
    602 +#define MPP22_SATA1_PRESENTn MPP( 22, 0x5, 0, 0, 0, 0, 1, 1, 1 )
    603 #define MPP22_LCD_D2 MPP( 22, 0xb, 0, 0, 0, 0, 0, 0, 1 )
    604
    605 #define MPP23_GPIO MPP( 23, 0x0, 1, 1, 0, 1, 1, 1, 1 )
    606 -#define MPP23_TSMP3 MPP( 23, 0x1, 1, 1, 0, 0, 1, 1, 1 )
    607 -#define MPP23_TDM_CH2_RX_QL MPP( 23, 0x2, 1, 0, 0, 0, 1, 1, 1 )
    608 +#define MPP23_TSMP3 MPP( 23, 0x1, 0, 0, 0, 0, 1, 1, 1 )
    609 +#define MPP23_TDM_CH2_RX_QL MPP( 23, 0x2, 0, 0, 0, 0, 1, 1, 1 )
    610 #define MPP23_GE1_TXD3 MPP( 23, 0x3, 0, 0, 0, 1, 1, 1, 1 )
    611 -#define MPP23_AU_I2SBCLK MPP( 23, 0x4, 0, 1, 0, 0, 1, 1, 1 )
    612 -#define MPP23_SATA0_PRESENTn MPP( 23, 0x5, 0, 1, 0, 1, 1, 1, 1 )
    613 +#define MPP23_AU_I2SBCLK MPP( 23, 0x4, 0, 0, 0, 0, 1, 1, 1 )
    614 +#define MPP23_SATA0_PRESENTn MPP( 23, 0x5, 0, 0, 0, 1, 1, 1, 1 )
    615 #define MPP23_LCD_D3 MPP( 23, 0xb, 0, 0, 0, 0, 0, 0, 1 )
    616
    617 #define MPP24_GPIO MPP( 24, 0x0, 1, 1, 0, 1, 1, 1, 1 )
    618 -#define MPP24_TSMP4 MPP( 24, 0x1, 1, 1, 0, 0, 1, 1, 1 )
    619 -#define MPP24_TDM_SPI_CS0 MPP( 24, 0x2, 0, 1, 0, 0, 1, 1, 1 )
    620 +#define MPP24_TSMP4 MPP( 24, 0x1, 0, 0, 0, 0, 1, 1, 1 )
    621 +#define MPP24_TDM_SPI_CS0 MPP( 24, 0x2, 0, 0, 0, 0, 1, 1, 1 )
    622 #define MPP24_GE1_RXD0 MPP( 24, 0x3, 0, 0, 0, 1, 1, 1, 1 )
    623 -#define MPP24_AU_I2SDO MPP( 24, 0x4, 0, 1, 0, 0, 1, 1, 1 )
    624 +#define MPP24_AU_I2SDO MPP( 24, 0x4, 0, 0, 0, 0, 1, 1, 1 )
    625 #define MPP24_LCD_D4 MPP( 24, 0xb, 0, 0, 0, 0, 0, 0, 1 )
    626
    627 #define MPP25_GPIO MPP( 25, 0x0, 1, 1, 0, 1, 1, 1, 1 )
    628 -#define MPP25_TSMP5 MPP( 25, 0x1, 1, 1, 0, 0, 1, 1, 1 )
    629 -#define MPP25_TDM_SPI_SCK MPP( 25, 0x2, 0, 1, 0, 0, 1, 1, 1 )
    630 +#define MPP25_TSMP5 MPP( 25, 0x1, 0, 0, 0, 0, 1, 1, 1 )
    631 +#define MPP25_TDM_SPI_SCK MPP( 25, 0x2, 0, 0, 0, 0, 1, 1, 1 )
    632 #define MPP25_GE1_RXD1 MPP( 25, 0x3, 0, 0, 0, 1, 1, 1, 1 )
    633 -#define MPP25_AU_I2SLRCLK MPP( 25, 0x4, 0, 1, 0, 0, 1, 1, 1 )
    634 +#define MPP25_AU_I2SLRCLK MPP( 25, 0x4, 0, 0, 0, 0, 1, 1, 1 )
    635 #define MPP25_LCD_D5 MPP( 25, 0xb, 0, 0, 0, 0, 0, 0, 1 )
    636
    637 #define MPP26_GPIO MPP( 26, 0x0, 1, 1, 0, 1, 1, 1, 1 )
    638 -#define MPP26_TSMP6 MPP( 26, 0x1, 1, 1, 0, 0, 1, 1, 1 )
    639 -#define MPP26_TDM_SPI_MISO MPP( 26, 0x2, 1, 0, 0, 0, 1, 1, 1 )
    640 +#define MPP26_TSMP6 MPP( 26, 0x1, 0, 0, 0, 0, 1, 1, 1 )
    641 +#define MPP26_TDM_SPI_MISO MPP( 26, 0x2, 0, 0, 0, 0, 1, 1, 1 )
    642 #define MPP26_GE1_RXD2 MPP( 26, 0x3, 0, 0, 0, 1, 1, 1, 1 )
    643 -#define MPP26_AU_I2SMCLK MPP( 26, 0x4, 0, 1, 0, 0, 1, 1, 1 )
    644 +#define MPP26_AU_I2SMCLK MPP( 26, 0x4, 0, 0, 0, 0, 1, 1, 1 )
    645 #define MPP26_LCD_D6 MPP( 26, 0xb, 0, 0, 0, 0, 0, 0, 1 )
    646
    647 #define MPP27_GPIO MPP( 27, 0x0, 1, 1, 0, 1, 1, 1, 1 )
    648 -#define MPP27_TSMP7 MPP( 27, 0x1, 1, 1, 0, 0, 1, 1, 1 )
    649 -#define MPP27_TDM_SPI_MOSI MPP( 27, 0x2, 0, 1, 0, 0, 1, 1, 1 )
    650 +#define MPP27_TSMP7 MPP( 27, 0x1, 0, 0, 0, 0, 1, 1, 1 )
    651 +#define MPP27_TDM_SPI_MOSI MPP( 27, 0x2, 0, 0, 0, 0, 1, 1, 1 )
    652 #define MPP27_GE1_RXD3 MPP( 27, 0x3, 0, 0, 0, 1, 1, 1, 1 )
    653 -#define MPP27_AU_I2SDI MPP( 27, 0x4, 1, 0, 0, 0, 1, 1, 1 )
    654 +#define MPP27_AU_I2SDI MPP( 27, 0x4, 0, 0, 0, 0, 1, 1, 1 )
    655 #define MPP27_LCD_D7 MPP( 27, 0xb, 0, 0, 0, 0, 0, 0, 1 )
    656
    657 #define MPP28_GPIO MPP( 28, 0x0, 1, 1, 0, 1, 1, 1, 1 )
    658 -#define MPP28_TSMP8 MPP( 28, 0x1, 1, 1, 0, 0, 1, 1, 1 )
    659 +#define MPP28_TSMP8 MPP( 28, 0x1, 0, 0, 0, 0, 1, 1, 1 )
    660 #define MPP28_TDM_CODEC_INTn MPP( 28, 0x2, 0, 0, 0, 0, 1, 1, 1 )
    661 #define MPP28_GE1_COL MPP( 28, 0x3, 0, 0, 0, 1, 1, 1, 1 )
    662 -#define MPP28_AU_EXTCLK MPP( 28, 0x4, 1, 0, 0, 0, 1, 1, 1 )
    663 +#define MPP28_AU_EXTCLK MPP( 28, 0x4, 0, 0, 0, 0, 1, 1, 1 )
    664 #define MPP28_LCD_D8 MPP( 28, 0xb, 0, 0, 0, 0, 0, 0, 1 )
    665
    666 #define MPP29_GPIO MPP( 29, 0x0, 1, 1, 0, 1, 1, 1, 1 )
    667 -#define MPP29_TSMP9 MPP( 29, 0x1, 1, 1, 0, 0, 1, 1, 1 )
    668 +#define MPP29_TSMP9 MPP( 29, 0x1, 0, 0, 0, 0, 1, 1, 1 )
    669 #define MPP29_TDM_CODEC_RSTn MPP( 29, 0x2, 0, 0, 0, 0, 1, 1, 1 )
    670 #define MPP29_GE1_TCLK MPP( 29, 0x3, 0, 0, 0, 1, 1, 1, 1 )
    671 #define MPP29_LCD_D9 MPP( 29, 0xb, 0, 0, 0, 0, 0, 0, 1 )
    672
    673 #define MPP30_GPIO MPP( 30, 0x0, 1, 1, 0, 1, 1, 1, 1 )
    674 -#define MPP30_TSMP10 MPP( 30, 0x1, 1, 1, 0, 0, 1, 1, 1 )
    675 -#define MPP30_TDM_PCLK MPP( 30, 0x2, 1, 1, 0, 0, 1, 1, 1 )
    676 +#define MPP30_TSMP10 MPP( 30, 0x1, 0, 0, 0, 0, 1, 1, 1 )
    677 +#define MPP30_TDM_PCLK MPP( 30, 0x2, 0, 0, 0, 0, 1, 1, 1 )
    678 #define MPP30_GE1_RXCTL MPP( 30, 0x3, 0, 0, 0, 1, 1, 1, 1 )
    679 #define MPP30_LCD_D10 MPP( 30, 0xb, 0, 0, 0, 0, 0, 0, 1 )
    680
    681 #define MPP31_GPIO MPP( 31, 0x0, 1, 1, 0, 1, 1, 1, 1 )
    682 -#define MPP31_TSMP11 MPP( 31, 0x1, 1, 1, 0, 0, 1, 1, 1 )
    683 -#define MPP31_TDM_FS MPP( 31, 0x2, 1, 1, 0, 0, 1, 1, 1 )
    684 +#define MPP31_TSMP11 MPP( 31, 0x1, 0, 0, 0, 0, 1, 1, 1 )
    685 +#define MPP31_TDM_FS MPP( 31, 0x2, 0, 0, 0, 0, 1, 1, 1 )
    686 #define MPP31_GE1_RXCLK MPP( 31, 0x3, 0, 0, 0, 1, 1, 1, 1 )
    687 #define MPP31_LCD_D11 MPP( 31, 0xb, 0, 0, 0, 0, 0, 0, 1 )
    688
    689 #define MPP32_GPIO MPP( 32, 0x0, 1, 1, 0, 1, 1, 1, 1 )
    690 -#define MPP32_TSMP12 MPP( 32, 0x1, 1, 1, 0, 0, 1, 1, 1 )
    691 -#define MPP32_TDM_DRX MPP( 32, 0x2, 1, 0, 0, 0, 1, 1, 1 )
    692 +#define MPP32_TSMP12 MPP( 32, 0x1, 0, 0, 0, 0, 1, 1, 1 )
    693 +#define MPP32_TDM_DRX MPP( 32, 0x2, 0, 0, 0, 0, 1, 1, 1 )
    694 #define MPP32_GE1_TCLKOUT MPP( 32, 0x3, 0, 0, 0, 1, 1, 1, 1 )
    695 #define MPP32_LCD_D12 MPP( 32, 0xb, 0, 0, 0, 0, 0, 0, 1 )
    696
    697 #define MPP33_GPO MPP( 33, 0x0, 0, 1, 0, 1, 1, 1, 1 )
    698 -#define MPP33_TDM_DTX MPP( 33, 0x2, 0, 1, 0, 0, 1, 1, 1 )
    699 +#define MPP33_TDM_DTX MPP( 33, 0x2, 0, 0, 0, 0, 1, 1, 1 )
    700 #define MPP33_GE1_TXCTL MPP( 33, 0x3, 0, 0, 0, 1, 1, 1, 1 )
    701 #define MPP33_LCD_D13 MPP( 33, 0xb, 0, 0, 0, 0, 0, 0, 1 )
    702
    703 #define MPP34_GPIO MPP( 34, 0x0, 1, 1, 0, 1, 1, 1, 1 )
    704 -#define MPP34_TDM_SPI_CS1 MPP( 34, 0x2, 0, 1, 0, 0, 1, 1, 1 )
    705 +#define MPP34_TDM_SPI_CS1 MPP( 34, 0x2, 0, 0, 0, 0, 1, 1, 1 )
    706 #define MPP34_GE1_TXEN MPP( 34, 0x3, 0, 0, 0, 1, 1, 1, 1 )
    707 -#define MPP34_SATA1_ACTn MPP( 34, 0x5, 0, 1, 0, 0, 0, 1, 1 )
    708 +#define MPP34_SATA1_ACTn MPP( 34, 0x5, 0, 0, 0, 0, 0, 1, 1 )
    709 #define MPP34_LCD_D14 MPP( 34, 0xb, 0, 0, 0, 0, 0, 0, 1 )
    710
    711 #define MPP35_GPIO MPP( 35, 0x0, 1, 1, 1, 1, 1, 1, 1 )
    712 -#define MPP35_TDM_CH0_TX_QL MPP( 35, 0x2, 0, 1, 0, 0, 1, 1, 1 )
    713 +#define MPP35_TDM_CH0_TX_QL MPP( 35, 0x2, 0, 0, 0, 0, 1, 1, 1 )
    714 #define MPP35_GE1_RXERR MPP( 35, 0x3, 0, 0, 0, 1, 1, 1, 1 )
    715 -#define MPP35_SATA0_ACTn MPP( 35, 0x5, 0, 1, 0, 1, 1, 1, 1 )
    716 +#define MPP35_SATA0_ACTn MPP( 35, 0x5, 0, 0, 0, 1, 1, 1, 1 )
    717 #define MPP35_LCD_D15 MPP( 22, 0xb, 0, 0, 0, 0, 0, 0, 1 )
    718 -#define MPP35_MII0_RXERR MPP( 35, 0xc, 1, 0, 1, 1, 1, 1, 1 )
    719 +#define MPP35_MII0_RXERR MPP( 35, 0xc, 0, 0, 1, 1, 1, 1, 1 )
    720
    721 #define MPP36_GPIO MPP( 36, 0x0, 1, 1, 1, 0, 0, 1, 1 )
    722 -#define MPP36_TSMP0 MPP( 36, 0x1, 1, 1, 0, 0, 0, 1, 1 )
    723 -#define MPP36_TDM_SPI_CS1 MPP( 36, 0x2, 0, 1, 0, 0, 0, 1, 1 )
    724 -#define MPP36_AU_SPDIFI MPP( 36, 0x4, 1, 0, 1, 0, 0, 1, 1 )
    725 -#define MPP36_TW1_SDA MPP( 36, 0xb, 1, 1, 0, 0, 0, 0, 1 )
    726 +#define MPP36_TSMP0 MPP( 36, 0x1, 0, 0, 0, 0, 0, 1, 1 )
    727 +#define MPP36_TDM_SPI_CS1 MPP( 36, 0x2, 0, 0, 0, 0, 0, 1, 1 )
    728 +#define MPP36_AU_SPDIFI MPP( 36, 0x4, 0, 0, 1, 0, 0, 1, 1 )
    729 +#define MPP36_TW1_SDA MPP( 36, 0xb, 0, 0, 0, 0, 0, 0, 1 )
    730
    731 #define MPP37_GPIO MPP( 37, 0x0, 1, 1, 1, 0, 0, 1, 1 )
    732 -#define MPP37_TSMP1 MPP( 37, 0x1, 1, 1, 0, 0, 0, 1, 1 )
    733 -#define MPP37_TDM_CH2_TX_QL MPP( 37, 0x2, 0, 1, 0, 0, 0, 1, 1 )
    734 -#define MPP37_AU_SPDIFO MPP( 37, 0x4, 0, 1, 1, 0, 0, 1, 1 )
    735 -#define MPP37_TW1_SCK MPP( 37, 0xb, 1, 1, 0, 0, 0, 0, 1 )
    736 +#define MPP37_TSMP1 MPP( 37, 0x1, 0, 0, 0, 0, 0, 1, 1 )
    737 +#define MPP37_TDM_CH2_TX_QL MPP( 37, 0x2, 0, 0, 0, 0, 0, 1, 1 )
    738 +#define MPP37_AU_SPDIFO MPP( 37, 0x4, 0, 0, 1, 0, 0, 1, 1 )
    739 +#define MPP37_TW1_SCK MPP( 37, 0xb, 0, 0, 0, 0, 0, 0, 1 )
    740
    741 #define MPP38_GPIO MPP( 38, 0x0, 1, 1, 1, 0, 0, 1, 1 )
    742 -#define MPP38_TSMP2 MPP( 38, 0x1, 1, 1, 0, 0, 0, 1, 1 )
    743 -#define MPP38_TDM_CH2_RX_QL MPP( 38, 0x2, 0, 1, 0, 0, 0, 1, 1 )
    744 -#define MPP38_AU_SPDIFRMLCLK MPP( 38, 0x4, 0, 1, 1, 0, 0, 1, 1 )
    745 +#define MPP38_TSMP2 MPP( 38, 0x1, 0, 0, 0, 0, 0, 1, 1 )
    746 +#define MPP38_TDM_CH2_RX_QL MPP( 38, 0x2, 0, 0, 0, 0, 0, 1, 1 )
    747 +#define MPP38_AU_SPDIFRMLCLK MPP( 38, 0x4, 0, 0, 1, 0, 0, 1, 1 )
    748 #define MPP38_LCD_D18 MPP( 38, 0xb, 0, 0, 0, 0, 0, 0, 1 )
    749
    750 #define MPP39_GPIO MPP( 39, 0x0, 1, 1, 1, 0, 0, 1, 1 )
    751 -#define MPP39_TSMP3 MPP( 39, 0x1, 1, 1, 0, 0, 0, 1, 1 )
    752 -#define MPP39_TDM_SPI_CS0 MPP( 39, 0x2, 0, 1, 0, 0, 0, 1, 1 )
    753 -#define MPP39_AU_I2SBCLK MPP( 39, 0x4, 0, 1, 1, 0, 0, 1, 1 )
    754 +#define MPP39_TSMP3 MPP( 39, 0x1, 0, 0, 0, 0, 0, 1, 1 )
    755 +#define MPP39_TDM_SPI_CS0 MPP( 39, 0x2, 0, 0, 0, 0, 0, 1, 1 )
    756 +#define MPP39_AU_I2SBCLK MPP( 39, 0x4, 0, 0, 1, 0, 0, 1, 1 )
    757 #define MPP39_LCD_D19 MPP( 39, 0xb, 0, 0, 0, 0, 0, 0, 1 )
    758
    759 #define MPP40_GPIO MPP( 40, 0x0, 1, 1, 1, 0, 0, 1, 1 )
    760 -#define MPP40_TSMP4 MPP( 40, 0x1, 1, 1, 0, 0, 0, 1, 1 )
    761 -#define MPP40_TDM_SPI_SCK MPP( 40, 0x2, 0, 1, 0, 0, 0, 1, 1 )
    762 -#define MPP40_AU_I2SDO MPP( 40, 0x4, 0, 1, 1, 0, 0, 1, 1 )
    763 +#define MPP40_TSMP4 MPP( 40, 0x1, 0, 0, 0, 0, 0, 1, 1 )
    764 +#define MPP40_TDM_SPI_SCK MPP( 40, 0x2, 0, 0, 0, 0, 0, 1, 1 )
    765 +#define MPP40_AU_I2SDO MPP( 40, 0x4, 0, 0, 1, 0, 0, 1, 1 )
    766 #define MPP40_LCD_D20 MPP( 40, 0xb, 0, 0, 0, 0, 0, 0, 1 )
    767
    768 #define MPP41_GPIO MPP( 41, 0x0, 1, 1, 1, 0, 0, 1, 1 )
    769 -#define MPP41_TSMP5 MPP( 41, 0x1, 1, 1, 0, 0, 0, 1, 1 )
    770 -#define MPP41_TDM_SPI_MISO MPP( 41, 0x2, 1, 0, 0, 0, 0, 1, 1 )
    771 -#define MPP41_AU_I2SLRCLK MPP( 41, 0x4, 0, 1, 1, 0, 0, 1, 1 )
    772 +#define MPP41_TSMP5 MPP( 41, 0x1, 0, 0, 0, 0, 0, 1, 1 )
    773 +#define MPP41_TDM_SPI_MISO MPP( 41, 0x2, 0, 0, 0, 0, 0, 1, 1 )
    774 +#define MPP41_AU_I2SLRCLK MPP( 41, 0x4, 0, 0, 1, 0, 0, 1, 1 )
    775 #define MPP41_LCD_D21 MPP( 41, 0xb, 0, 0, 0, 0, 0, 0, 1 )
    776
    777 #define MPP42_GPIO MPP( 42, 0x0, 1, 1, 1, 0, 0, 1, 1 )
    778 -#define MPP42_TSMP6 MPP( 42, 0x1, 1, 1, 0, 0, 0, 1, 1 )
    779 -#define MPP42_TDM_SPI_MOSI MPP( 42, 0x2, 0, 1, 0, 0, 0, 1, 1 )
    780 -#define MPP42_AU_I2SMCLK MPP( 42, 0x4, 0, 1, 1, 0, 0, 1, 1 )
    781 +#define MPP42_TSMP6 MPP( 42, 0x1, 0, 0, 0, 0, 0, 1, 1 )
    782 +#define MPP42_TDM_SPI_MOSI MPP( 42, 0x2, 0, 0, 0, 0, 0, 1, 1 )
    783 +#define MPP42_AU_I2SMCLK MPP( 42, 0x4, 0, 0, 1, 0, 0, 1, 1 )
    784 #define MPP42_LCD_D22 MPP( 42, 0xb, 0, 0, 0, 0, 0, 0, 1 )
    785
    786 #define MPP43_GPIO MPP( 43, 0x0, 1, 1, 1, 0, 0, 1, 1 )
    787 -#define MPP43_TSMP7 MPP( 43, 0x1, 1, 1, 0, 0, 0, 1, 1 )
    788 +#define MPP43_TSMP7 MPP( 43, 0x1, 0, 0, 0, 0, 0, 1, 1 )
    789 #define MPP43_TDM_CODEC_INTn MPP( 43, 0x2, 0, 0, 0, 0, 0, 1, 1 )
    790 -#define MPP43_AU_I2SDI MPP( 43, 0x4, 1, 0, 1, 0, 0, 1, 1 )
    791 +#define MPP43_AU_I2SDI MPP( 43, 0x4, 0, 0, 1, 0, 0, 1, 1 )
    792 #define MPP43_LCD_D23 MPP( 22, 0xb, 0, 0, 0, 0, 0, 0, 1 )
    793
    794 #define MPP44_GPIO MPP( 44, 0x0, 1, 1, 1, 0, 0, 1, 1 )
    795 -#define MPP44_TSMP8 MPP( 44, 0x1, 1, 1, 0, 0, 0, 1, 1 )
    796 +#define MPP44_TSMP8 MPP( 44, 0x1, 0, 0, 0, 0, 0, 1, 1 )
    797 #define MPP44_TDM_CODEC_RSTn MPP( 44, 0x2, 0, 0, 0, 0, 0, 1, 1 )
    798 -#define MPP44_AU_EXTCLK MPP( 44, 0x4, 1, 0, 1, 0, 0, 1, 1 )
    799 +#define MPP44_AU_EXTCLK MPP( 44, 0x4, 0, 0, 1, 0, 0, 1, 1 )
    800 #define MPP44_LCD_CLK MPP( 44, 0xb, 0, 0, 0, 0, 0, 0, 1 )
    801
    802 #define MPP45_GPIO MPP( 45, 0x0, 1, 1, 0, 0, 0, 1, 1 )
    803 -#define MPP45_TSMP9 MPP( 45, 0x1, 1, 1, 0, 0, 0, 1, 1 )
    804 -#define MPP45_TDM_PCLK MPP( 45, 0x2, 1, 1, 0, 0, 0, 1, 1 )
    805 +#define MPP45_TSMP9 MPP( 45, 0x1, 0, 0, 0, 0, 0, 1, 1 )
    806 +#define MPP45_TDM_PCLK MPP( 45, 0x2, 0, 0, 0, 0, 0, 1, 1 )
    807 #define MPP245_LCD_E MPP( 45, 0xb, 0, 0, 0, 0, 0, 0, 1 )
    808
    809 #define MPP46_GPIO MPP( 46, 0x0, 1, 1, 0, 0, 0, 1, 1 )
    810 -#define MPP46_TSMP10 MPP( 46, 0x1, 1, 1, 0, 0, 0, 1, 1 )
    811 -#define MPP46_TDM_FS MPP( 46, 0x2, 1, 1, 0, 0, 0, 1, 1 )
    812 +#define MPP46_TSMP10 MPP( 46, 0x1, 0, 0, 0, 0, 0, 1, 1 )
    813 +#define MPP46_TDM_FS MPP( 46, 0x2, 0, 0, 0, 0, 0, 1, 1 )
    814 #define MPP46_LCD_HSYNC MPP( 46, 0xb, 0, 0, 0, 0, 0, 0, 1 )
    815
    816 #define MPP47_GPIO MPP( 47, 0x0, 1, 1, 0, 0, 0, 1, 1 )
    817 -#define MPP47_TSMP11 MPP( 47, 0x1, 1, 1, 0, 0, 0, 1, 1 )
    818 -#define MPP47_TDM_DRX MPP( 47, 0x2, 1, 0, 0, 0, 0, 1, 1 )
    819 +#define MPP47_TSMP11 MPP( 47, 0x1, 0, 0, 0, 0, 0, 1, 1 )
    820 +#define MPP47_TDM_DRX MPP( 47, 0x2, 0, 0, 0, 0, 0, 1, 1 )
    821 #define MPP47_LCD_VSYNC MPP( 47, 0xb, 0, 0, 0, 0, 0, 0, 1 )
    822
    823 #define MPP48_GPIO MPP( 48, 0x0, 1, 1, 0, 0, 0, 1, 1 )
    824 -#define MPP48_TSMP12 MPP( 48, 0x1, 1, 1, 0, 0, 0, 1, 1 )
    825 -#define MPP48_TDM_DTX MPP( 48, 0x2, 0, 1, 0, 0, 0, 1, 1 )
    826 +#define MPP48_TSMP12 MPP( 48, 0x1, 0, 0, 0, 0, 0, 1, 1 )
    827 +#define MPP48_TDM_DTX MPP( 48, 0x2, 0, 0, 0, 0, 0, 1, 1 )
    828 #define MPP48_LCD_D16 MPP( 22, 0xb, 0, 0, 0, 0, 0, 0, 1 )
    829
    830 #define MPP49_GPIO MPP( 49, 0x0, 1, 1, 0, 0, 0, 1, 0 )
    831 #define MPP49_GPO MPP( 49, 0x0, 0, 1, 0, 0, 0, 0, 1 )
    832 -#define MPP49_TSMP9 MPP( 49, 0x1, 1, 1, 0, 0, 0, 1, 0 )
    833 -#define MPP49_TDM_CH0_RX_QL MPP( 49, 0x2, 0, 1, 0, 0, 0, 1, 1 )
    834 -#define MPP49_PTP_CLK MPP( 49, 0x5, 1, 0, 0, 0, 0, 1, 0 )
    835 -#define MPP49_PEX0_CLKREQ MPP( 49, 0xa, 0, 1, 0, 0, 0, 0, 1 )
    836 +#define MPP49_TSMP9 MPP( 49, 0x1, 0, 0, 0, 0, 0, 1, 0 )
    837 +#define MPP49_TDM_CH0_RX_QL MPP( 49, 0x2, 0, 0, 0, 0, 0, 1, 1 )
    838 +#define MPP49_PTP_CLK MPP( 49, 0x5, 0, 0, 0, 0, 0, 1, 0 )
    839 +#define MPP49_PEX0_CLKREQ MPP( 49, 0xa, 0, 0, 0, 0, 0, 0, 1 )
    840 #define MPP49_LCD_D17 MPP( 49, 0xb, 0, 0, 0, 0, 0, 0, 1 )
    841
    842 #define MPP_MAX 49
    843 diff --git a/arch/arm/mach-lpc32xx/include/mach/irqs.h b/arch/arm/mach-lpc32xx/include/mach/irqs.h
    844 index 2667f52..9e3b90d 100644
    845 --- a/arch/arm/mach-lpc32xx/include/mach/irqs.h
    846 +++ b/arch/arm/mach-lpc32xx/include/mach/irqs.h
    847 @@ -61,7 +61,7 @@
    848 */
    849 #define IRQ_LPC32XX_JTAG_COMM_TX LPC32XX_SIC1_IRQ(1)
    850 #define IRQ_LPC32XX_JTAG_COMM_RX LPC32XX_SIC1_IRQ(2)
    851 -#define IRQ_LPC32XX_GPI_11 LPC32XX_SIC1_IRQ(4)
    852 +#define IRQ_LPC32XX_GPI_28 LPC32XX_SIC1_IRQ(4)
    853 #define IRQ_LPC32XX_TS_P LPC32XX_SIC1_IRQ(6)
    854 #define IRQ_LPC32XX_TS_IRQ LPC32XX_SIC1_IRQ(7)
    855 #define IRQ_LPC32XX_TS_AUX LPC32XX_SIC1_IRQ(8)
    856 diff --git a/arch/arm/mach-lpc32xx/irq.c b/arch/arm/mach-lpc32xx/irq.c
    857 index 4eae566..c74de01 100644
    858 --- a/arch/arm/mach-lpc32xx/irq.c
    859 +++ b/arch/arm/mach-lpc32xx/irq.c
    860 @@ -118,6 +118,10 @@ static const struct lpc32xx_event_info lpc32xx_events[NR_IRQS] = {
    861 .event_group = &lpc32xx_event_pin_regs,
    862 .mask = LPC32XX_CLKPWR_EXTSRC_GPI_06_BIT,
    863 },
    864 + [IRQ_LPC32XX_GPI_28] = {
    865 + .event_group = &lpc32xx_event_pin_regs,
    866 + .mask = LPC32XX_CLKPWR_EXTSRC_GPI_28_BIT,
    867 + },
    868 [IRQ_LPC32XX_GPIO_00] = {
    869 .event_group = &lpc32xx_event_int_regs,
    870 .mask = LPC32XX_CLKPWR_INTSRC_GPIO_00_BIT,
    871 @@ -305,9 +309,18 @@ static int lpc32xx_irq_wake(struct irq_data *d, unsigned int state)
    872
    873 if (state)
    874 eventreg |= lpc32xx_events[d->irq].mask;
    875 - else
    876 + else {
    877 eventreg &= ~lpc32xx_events[d->irq].mask;
    878
    879 + /*
    880 + * When disabling the wakeup, clear the latched
    881 + * event
    882 + */
    883 + __raw_writel(lpc32xx_events[d->irq].mask,
    884 + lpc32xx_events[d->irq].
    885 + event_group->rawstat_reg);
    886 + }
    887 +
    888 __raw_writel(eventreg,
    889 lpc32xx_events[d->irq].event_group->enab_reg);
    890
    891 @@ -380,13 +393,15 @@ void __init lpc32xx_init_irq(void)
    892
    893 /* Setup SIC1 */
    894 __raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC1_BASE));
    895 - __raw_writel(MIC_APR_DEFAULT, LPC32XX_INTC_POLAR(LPC32XX_SIC1_BASE));
    896 - __raw_writel(MIC_ATR_DEFAULT, LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC1_BASE));
    897 + __raw_writel(SIC1_APR_DEFAULT, LPC32XX_INTC_POLAR(LPC32XX_SIC1_BASE));
    898 + __raw_writel(SIC1_ATR_DEFAULT,
    899 + LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC1_BASE));
    900
    901 /* Setup SIC2 */
    902 __raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC2_BASE));
    903 - __raw_writel(MIC_APR_DEFAULT, LPC32XX_INTC_POLAR(LPC32XX_SIC2_BASE));
    904 - __raw_writel(MIC_ATR_DEFAULT, LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC2_BASE));
    905 + __raw_writel(SIC2_APR_DEFAULT, LPC32XX_INTC_POLAR(LPC32XX_SIC2_BASE));
    906 + __raw_writel(SIC2_ATR_DEFAULT,
    907 + LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC2_BASE));
    908
    909 /* Configure supported IRQ's */
    910 for (i = 0; i < NR_IRQS; i++) {
    911 diff --git a/arch/arm/mach-lpc32xx/serial.c b/arch/arm/mach-lpc32xx/serial.c
    912 index 429cfdb..f273528 100644
    913 --- a/arch/arm/mach-lpc32xx/serial.c
    914 +++ b/arch/arm/mach-lpc32xx/serial.c
    915 @@ -88,6 +88,7 @@ struct uartinit {
    916 char *uart_ck_name;
    917 u32 ck_mode_mask;
    918 void __iomem *pdiv_clk_reg;
    919 + resource_size_t mapbase;
    920 };
    921
    922 static struct uartinit uartinit_data[] __initdata = {
    923 @@ -97,6 +98,7 @@ static struct uartinit uartinit_data[] __initdata = {
    924 .ck_mode_mask =
    925 LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 5),
    926 .pdiv_clk_reg = LPC32XX_CLKPWR_UART5_CLK_CTRL,
    927 + .mapbase = LPC32XX_UART5_BASE,
    928 },
    929 #endif
    930 #ifdef CONFIG_ARCH_LPC32XX_UART3_SELECT
    931 @@ -105,6 +107,7 @@ static struct uartinit uartinit_data[] __initdata = {
    932 .ck_mode_mask =
    933 LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 3),
    934 .pdiv_clk_reg = LPC32XX_CLKPWR_UART3_CLK_CTRL,
    935 + .mapbase = LPC32XX_UART3_BASE,
    936 },
    937 #endif
    938 #ifdef CONFIG_ARCH_LPC32XX_UART4_SELECT
    939 @@ -113,6 +116,7 @@ static struct uartinit uartinit_data[] __initdata = {
    940 .ck_mode_mask =
    941 LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 4),
    942 .pdiv_clk_reg = LPC32XX_CLKPWR_UART4_CLK_CTRL,
    943 + .mapbase = LPC32XX_UART4_BASE,
    944 },
    945 #endif
    946 #ifdef CONFIG_ARCH_LPC32XX_UART6_SELECT
    947 @@ -121,6 +125,7 @@ static struct uartinit uartinit_data[] __initdata = {
    948 .ck_mode_mask =
    949 LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 6),
    950 .pdiv_clk_reg = LPC32XX_CLKPWR_UART6_CLK_CTRL,
    951 + .mapbase = LPC32XX_UART6_BASE,
    952 },
    953 #endif
    954 };
    955 @@ -165,11 +170,24 @@ void __init lpc32xx_serial_init(void)
    956
    957 /* pre-UART clock divider set to 1 */
    958 __raw_writel(0x0101, uartinit_data[i].pdiv_clk_reg);
    959 +
    960 + /*
    961 + * Force a flush of the RX FIFOs to work around a
    962 + * HW bug
    963 + */
    964 + puart = uartinit_data[i].mapbase;
    965 + __raw_writel(0xC1, LPC32XX_UART_IIR_FCR(puart));
    966 + __raw_writel(0x00, LPC32XX_UART_DLL_FIFO(puart));
    967 + j = LPC32XX_SUART_FIFO_SIZE;
    968 + while (j--)
    969 + tmp = __raw_readl(
    970 + LPC32XX_UART_DLL_FIFO(puart));
    971 + __raw_writel(0, LPC32XX_UART_IIR_FCR(puart));
    972 }
    973
    974 /* This needs to be done after all UART clocks are setup */
    975 __raw_writel(clkmodes, LPC32XX_UARTCTL_CLKMODE);
    976 - for (i = 0; i < ARRAY_SIZE(uartinit_data) - 1; i++) {
    977 + for (i = 0; i < ARRAY_SIZE(uartinit_data); i++) {
    978 /* Force a flush of the RX FIFOs to work around a HW bug */
    979 puart = serial_std_platform_data[i].mapbase;
    980 __raw_writel(0xC1, LPC32XX_UART_IIR_FCR(puart));
    981 diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c
    982 index 23d3980..d90e244 100644
    983 --- a/arch/arm/mach-mv78xx0/common.c
    984 +++ b/arch/arm/mach-mv78xx0/common.c
    985 @@ -20,6 +20,7 @@
    986 #include <mach/mv78xx0.h>
    987 #include <mach/bridge-regs.h>
    988 #include <plat/cache-feroceon-l2.h>
    989 +#include <plat/ehci-orion.h>
    990 #include <plat/orion_nand.h>
    991 #include <plat/time.h>
    992 #include <plat/common.h>
    993 @@ -170,7 +171,7 @@ void __init mv78xx0_map_io(void)
    994 void __init mv78xx0_ehci0_init(void)
    995 {
    996 orion_ehci_init(&mv78xx0_mbus_dram_info,
    997 - USB0_PHYS_BASE, IRQ_MV78XX0_USB_0);
    998 + USB0_PHYS_BASE, IRQ_MV78XX0_USB_0, EHCI_PHY_NA);
    999 }
    1000
    1001
    1002 diff --git a/arch/arm/mach-mv78xx0/mpp.h b/arch/arm/mach-mv78xx0/mpp.h
    1003 index b61b509..3752302 100644
    1004 --- a/arch/arm/mach-mv78xx0/mpp.h
    1005 +++ b/arch/arm/mach-mv78xx0/mpp.h
    1006 @@ -24,296 +24,296 @@
    1007 #define MPP_78100_A0_MASK MPP(0, 0x0, 0, 0, 1)
    1008
    1009 #define MPP0_GPIO MPP(0, 0x0, 1, 1, 1)
    1010 -#define MPP0_GE0_COL MPP(0, 0x1, 1, 0, 1)
    1011 -#define MPP0_GE1_TXCLK MPP(0, 0x2, 0, 1, 1)
    1012 +#define MPP0_GE0_COL MPP(0, 0x1, 0, 0, 1)
    1013 +#define MPP0_GE1_TXCLK MPP(0, 0x2, 0, 0, 1)
    1014 #define MPP0_UNUSED MPP(0, 0x3, 0, 0, 1)
    1015
    1016 #define MPP1_GPIO MPP(1, 0x0, 1, 1, 1)
    1017 -#define MPP1_GE0_RXERR MPP(1, 0x1, 1, 0, 1)
    1018 -#define MPP1_GE1_TXCTL MPP(1, 0x2, 0, 1, 1)
    1019 +#define MPP1_GE0_RXERR MPP(1, 0x1, 0, 0, 1)
    1020 +#define MPP1_GE1_TXCTL MPP(1, 0x2, 0, 0, 1)
    1021 #define MPP1_UNUSED MPP(1, 0x3, 0, 0, 1)
    1022
    1023 #define MPP2_GPIO MPP(2, 0x0, 1, 1, 1)
    1024 -#define MPP2_GE0_CRS MPP(2, 0x1, 1, 0, 1)
    1025 -#define MPP2_GE1_RXCTL MPP(2, 0x2, 1, 0, 1)
    1026 +#define MPP2_GE0_CRS MPP(2, 0x1, 0, 0, 1)
    1027 +#define MPP2_GE1_RXCTL MPP(2, 0x2, 0, 0, 1)
    1028 #define MPP2_UNUSED MPP(2, 0x3, 0, 0, 1)
    1029
    1030 #define MPP3_GPIO MPP(3, 0x0, 1, 1, 1)
    1031 -#define MPP3_GE0_TXERR MPP(3, 0x1, 0, 1, 1)
    1032 -#define MPP3_GE1_RXCLK MPP(3, 0x2, 1, 0, 1)
    1033 +#define MPP3_GE0_TXERR MPP(3, 0x1, 0, 0, 1)
    1034 +#define MPP3_GE1_RXCLK MPP(3, 0x2, 0, 0, 1)
    1035 #define MPP3_UNUSED MPP(3, 0x3, 0, 0, 1)
    1036
    1037 #define MPP4_GPIO MPP(4, 0x0, 1, 1, 1)
    1038 -#define MPP4_GE0_TXD4 MPP(4, 0x1, 0, 1, 1)
    1039 -#define MPP4_GE1_TXD0 MPP(4, 0x2, 0, 1, 1)
    1040 +#define MPP4_GE0_TXD4 MPP(4, 0x1, 0, 0, 1)
    1041 +#define MPP4_GE1_TXD0 MPP(4, 0x2, 0, 0, 1)
    1042 #define MPP4_UNUSED MPP(4, 0x3, 0, 0, 1)
    1043
    1044 #define MPP5_GPIO MPP(5, 0x0, 1, 1, 1)
    1045 -#define MPP5_GE0_TXD5 MPP(5, 0x1, 0, 1, 1)
    1046 -#define MPP5_GE1_TXD1 MPP(5, 0x2, 0, 1, 1)
    1047 +#define MPP5_GE0_TXD5 MPP(5, 0x1, 0, 0, 1)
    1048 +#define MPP5_GE1_TXD1 MPP(5, 0x2, 0, 0, 1)
    1049 #define MPP5_UNUSED MPP(5, 0x3, 0, 0, 1)
    1050
    1051 #define MPP6_GPIO MPP(6, 0x0, 1, 1, 1)
    1052 -#define MPP6_GE0_TXD6 MPP(6, 0x1, 0, 1, 1)
    1053 -#define MPP6_GE1_TXD2 MPP(6, 0x2, 0, 1, 1)
    1054 +#define MPP6_GE0_TXD6 MPP(6, 0x1, 0, 0, 1)
    1055 +#define MPP6_GE1_TXD2 MPP(6, 0x2, 0, 0, 1)
    1056 #define MPP6_UNUSED MPP(6, 0x3, 0, 0, 1)
    1057
    1058 #define MPP7_GPIO MPP(7, 0x0, 1, 1, 1)
    1059 -#define MPP7_GE0_TXD7 MPP(7, 0x1, 0, 1, 1)
    1060 -#define MPP7_GE1_TXD3 MPP(7, 0x2, 0, 1, 1)
    1061 +#define MPP7_GE0_TXD7 MPP(7, 0x1, 0, 0, 1)
    1062 +#define MPP7_GE1_TXD3 MPP(7, 0x2, 0, 0, 1)
    1063 #define MPP7_UNUSED MPP(7, 0x3, 0, 0, 1)
    1064
    1065 #define MPP8_GPIO MPP(8, 0x0, 1, 1, 1)
    1066 -#define MPP8_GE0_RXD4 MPP(8, 0x1, 1, 0, 1)
    1067 -#define MPP8_GE1_RXD0 MPP(8, 0x2, 1, 0, 1)
    1068 +#define MPP8_GE0_RXD4 MPP(8, 0x1, 0, 0, 1)
    1069 +#define MPP8_GE1_RXD0 MPP(8, 0x2, 0, 0, 1)
    1070 #define MPP8_UNUSED MPP(8, 0x3, 0, 0, 1)
    1071
    1072 #define MPP9_GPIO MPP(9, 0x0, 1, 1, 1)
    1073 -#define MPP9_GE0_RXD5 MPP(9, 0x1, 1, 0, 1)
    1074 -#define MPP9_GE1_RXD1 MPP(9, 0x2, 1, 0, 1)
    1075 +#define MPP9_GE0_RXD5 MPP(9, 0x1, 0, 0, 1)
    1076 +#define MPP9_GE1_RXD1 MPP(9, 0x2, 0, 0, 1)
    1077 #define MPP9_UNUSED MPP(9, 0x3, 0, 0, 1)
    1078
    1079 #define MPP10_GPIO MPP(10, 0x0, 1, 1, 1)
    1080 -#define MPP10_GE0_RXD6 MPP(10, 0x1, 1, 0, 1)
    1081 -#define MPP10_GE1_RXD2 MPP(10, 0x2, 1, 0, 1)
    1082 +#define MPP10_GE0_RXD6 MPP(10, 0x1, 0, 0, 1)
    1083 +#define MPP10_GE1_RXD2 MPP(10, 0x2, 0, 0, 1)
    1084 #define MPP10_UNUSED MPP(10, 0x3, 0, 0, 1)
    1085
    1086 #define MPP11_GPIO MPP(11, 0x0, 1, 1, 1)
    1087 -#define MPP11_GE0_RXD7 MPP(11, 0x1, 1, 0, 1)
    1088 -#define MPP11_GE1_RXD3 MPP(11, 0x2, 1, 0, 1)
    1089 +#define MPP11_GE0_RXD7 MPP(11, 0x1, 0, 0, 1)
    1090 +#define MPP11_GE1_RXD3 MPP(11, 0x2, 0, 0, 1)
    1091 #define MPP11_UNUSED MPP(11, 0x3, 0, 0, 1)
    1092
    1093 #define MPP12_GPIO MPP(12, 0x0, 1, 1, 1)
    1094 -#define MPP12_M_BB MPP(12, 0x3, 1, 0, 1)
    1095 -#define MPP12_UA0_CTSn MPP(12, 0x4, 1, 0, 1)
    1096 -#define MPP12_NAND_FLASH_REn0 MPP(12, 0x5, 0, 1, 1)
    1097 -#define MPP12_TDM0_SCSn MPP(12, 0X6, 0, 1, 1)
    1098 +#define MPP12_M_BB MPP(12, 0x3, 0, 0, 1)
    1099 +#define MPP12_UA0_CTSn MPP(12, 0x4, 0, 0, 1)
    1100 +#define MPP12_NAND_FLASH_REn0 MPP(12, 0x5, 0, 0, 1)
    1101 +#define MPP12_TDM0_SCSn MPP(12, 0X6, 0, 0, 1)
    1102 #define MPP12_UNUSED MPP(12, 0x1, 0, 0, 1)
    1103
    1104 #define MPP13_GPIO MPP(13, 0x0, 1, 1, 1)
    1105 -#define MPP13_SYSRST_OUTn MPP(13, 0x3, 0, 1, 1)
    1106 -#define MPP13_UA0_RTSn MPP(13, 0x4, 0, 1, 1)
    1107 -#define MPP13_NAN_FLASH_WEn0 MPP(13, 0x5, 0, 1, 1)
    1108 -#define MPP13_TDM_SCLK MPP(13, 0x6, 0, 1, 1)
    1109 +#define MPP13_SYSRST_OUTn MPP(13, 0x3, 0, 0, 1)
    1110 +#define MPP13_UA0_RTSn MPP(13, 0x4, 0, 0, 1)
    1111 +#define MPP13_NAN_FLASH_WEn0 MPP(13, 0x5, 0, 0, 1)
    1112 +#define MPP13_TDM_SCLK MPP(13, 0x6, 0, 0, 1)
    1113 #define MPP13_UNUSED MPP(13, 0x1, 0, 0, 1)
    1114
    1115 #define MPP14_GPIO MPP(14, 0x0, 1, 1, 1)
    1116 -#define MPP14_SATA1_ACTn MPP(14, 0x3, 0, 1, 1)
    1117 -#define MPP14_UA1_CTSn MPP(14, 0x4, 1, 0, 1)
    1118 -#define MPP14_NAND_FLASH_REn1 MPP(14, 0x5, 0, 1, 1)
    1119 -#define MPP14_TDM_SMOSI MPP(14, 0x6, 0, 1, 1)
    1120 +#define MPP14_SATA1_ACTn MPP(14, 0x3, 0, 0, 1)
    1121 +#define MPP14_UA1_CTSn MPP(14, 0x4, 0, 0, 1)
    1122 +#define MPP14_NAND_FLASH_REn1 MPP(14, 0x5, 0, 0, 1)
    1123 +#define MPP14_TDM_SMOSI MPP(14, 0x6, 0, 0, 1)
    1124 #define MPP14_UNUSED MPP(14, 0x1, 0, 0, 1)
    1125
    1126 #define MPP15_GPIO MPP(15, 0x0, 1, 1, 1)
    1127 -#define MPP15_SATA0_ACTn MPP(15, 0x3, 0, 1, 1)
    1128 -#define MPP15_UA1_RTSn MPP(15, 0x4, 0, 1, 1)
    1129 -#define MPP15_NAND_FLASH_WEn1 MPP(15, 0x5, 0, 1, 1)
    1130 -#define MPP15_TDM_SMISO MPP(15, 0x6, 1, 0, 1)
    1131 +#define MPP15_SATA0_ACTn MPP(15, 0x3, 0, 0, 1)
    1132 +#define MPP15_UA1_RTSn MPP(15, 0x4, 0, 0, 1)
    1133 +#define MPP15_NAND_FLASH_WEn1 MPP(15, 0x5, 0, 0, 1)
    1134 +#define MPP15_TDM_SMISO MPP(15, 0x6, 0, 0, 1)
    1135 #define MPP15_UNUSED MPP(15, 0x1, 0, 0, 1)
    1136
    1137 #define MPP16_GPIO MPP(16, 0x0, 1, 1, 1)
    1138 -#define MPP16_SATA1_PRESENTn MPP(16, 0x3, 0, 1, 1)
    1139 -#define MPP16_UA2_TXD MPP(16, 0x4, 0, 1, 1)
    1140 -#define MPP16_NAND_FLASH_REn3 MPP(16, 0x5, 0, 1, 1)
    1141 -#define MPP16_TDM_INTn MPP(16, 0x6, 1, 0, 1)
    1142 +#define MPP16_SATA1_PRESENTn MPP(16, 0x3, 0, 0, 1)
    1143 +#define MPP16_UA2_TXD MPP(16, 0x4, 0, 0, 1)
    1144 +#define MPP16_NAND_FLASH_REn3 MPP(16, 0x5, 0, 0, 1)
    1145 +#define MPP16_TDM_INTn MPP(16, 0x6, 0, 0, 1)
    1146 #define MPP16_UNUSED MPP(16, 0x1, 0, 0, 1)
    1147
    1148
    1149 #define MPP17_GPIO MPP(17, 0x0, 1, 1, 1)
    1150 -#define MPP17_SATA0_PRESENTn MPP(17, 0x3, 0, 1, 1)
    1151 -#define MPP17_UA2_RXD MPP(17, 0x4, 1, 0, 1)
    1152 -#define MPP17_NAND_FLASH_WEn3 MPP(17, 0x5, 0, 1, 1)
    1153 -#define MPP17_TDM_RSTn MPP(17, 0x6, 0, 1, 1)
    1154 +#define MPP17_SATA0_PRESENTn MPP(17, 0x3, 0, 0, 1)
    1155 +#define MPP17_UA2_RXD MPP(17, 0x4, 0, 0, 1)
    1156 +#define MPP17_NAND_FLASH_WEn3 MPP(17, 0x5, 0, 0, 1)
    1157 +#define MPP17_TDM_RSTn MPP(17, 0x6, 0, 0, 1)
    1158 #define MPP17_UNUSED MPP(17, 0x1, 0, 0, 1)
    1159
    1160
    1161 #define MPP18_GPIO MPP(18, 0x0, 1, 1, 1)
    1162 -#define MPP18_UA0_CTSn MPP(18, 0x4, 1, 0, 1)
    1163 -#define MPP18_BOOT_FLASH_REn MPP(18, 0x5, 0, 1, 1)
    1164 +#define MPP18_UA0_CTSn MPP(18, 0x4, 0, 0, 1)
    1165 +#define MPP18_BOOT_FLASH_REn MPP(18, 0x5, 0, 0, 1)
    1166 #define MPP18_UNUSED MPP(18, 0x1, 0, 0, 1)
    1167
    1168
    1169
    1170 #define MPP19_GPIO MPP(19, 0x0, 1, 1, 1)
    1171 -#define MPP19_UA0_CTSn MPP(19, 0x4, 0, 1, 1)
    1172 -#define MPP19_BOOT_FLASH_WEn MPP(19, 0x5, 0, 1, 1)
    1173 +#define MPP19_UA0_CTSn MPP(19, 0x4, 0, 0, 1)
    1174 +#define MPP19_BOOT_FLASH_WEn MPP(19, 0x5, 0, 0, 1)
    1175 #define MPP19_UNUSED MPP(19, 0x1, 0, 0, 1)
    1176
    1177
    1178 #define MPP20_GPIO MPP(20, 0x0, 1, 1, 1)
    1179 -#define MPP20_UA1_CTSs MPP(20, 0x4, 1, 0, 1)
    1180 -#define MPP20_TDM_PCLK MPP(20, 0x6, 1, 1, 0)
    1181 +#define MPP20_UA1_CTSs MPP(20, 0x4, 0, 0, 1)
    1182 +#define MPP20_TDM_PCLK MPP(20, 0x6, 0, 0, 0)
    1183 #define MPP20_UNUSED MPP(20, 0x1, 0, 0, 1)
    1184
    1185
    1186
    1187 #define MPP21_GPIO MPP(21, 0x0, 1, 1, 1)
    1188 -#define MPP21_UA1_CTSs MPP(21, 0x4, 0, 1, 1)
    1189 -#define MPP21_TDM_FSYNC MPP(21, 0x6, 1, 1, 0)
    1190 +#define MPP21_UA1_CTSs MPP(21, 0x4, 0, 0, 1)
    1191 +#define MPP21_TDM_FSYNC MPP(21, 0x6, 0, 0, 0)
    1192 #define MPP21_UNUSED MPP(21, 0x1, 0, 0, 1)
    1193
    1194
    1195
    1196 #define MPP22_GPIO MPP(22, 0x0, 1, 1, 1)
    1197 -#define MPP22_UA3_TDX MPP(22, 0x4, 0, 1, 1)
    1198 -#define MPP22_NAND_FLASH_REn2 MPP(22, 0x5, 0, 1, 1)
    1199 -#define MPP22_TDM_DRX MPP(22, 0x6, 1, 0, 1)
    1200 +#define MPP22_UA3_TDX MPP(22, 0x4, 0, 0, 1)
    1201 +#define MPP22_NAND_FLASH_REn2 MPP(22, 0x5, 0, 0, 1)
    1202 +#define MPP22_TDM_DRX MPP(22, 0x6, 0, 0, 1)
    1203 #define MPP22_UNUSED MPP(22, 0x1, 0, 0, 1)
    1204
    1205
    1206
    1207 #define MPP23_GPIO MPP(23, 0x0, 1, 1, 1)
    1208 -#define MPP23_UA3_RDX MPP(23, 0x4, 1, 0, 1)
    1209 -#define MPP23_NAND_FLASH_WEn2 MPP(23, 0x5, 0, 1, 1)
    1210 -#define MPP23_TDM_DTX MPP(23, 0x6, 0, 1, 1)
    1211 +#define MPP23_UA3_RDX MPP(23, 0x4, 0, 0, 1)
    1212 +#define MPP23_NAND_FLASH_WEn2 MPP(23, 0x5, 0, 0, 1)
    1213 +#define MPP23_TDM_DTX MPP(23, 0x6, 0, 0, 1)
    1214 #define MPP23_UNUSED MPP(23, 0x1, 0, 0, 1)
    1215
    1216
    1217 #define MPP24_GPIO MPP(24, 0x0, 1, 1, 1)
    1218 -#define MPP24_UA2_TXD MPP(24, 0x4, 0, 1, 1)
    1219 -#define MPP24_TDM_INTn MPP(24, 0x6, 1, 0, 1)
    1220 +#define MPP24_UA2_TXD MPP(24, 0x4, 0, 0, 1)
    1221 +#define MPP24_TDM_INTn MPP(24, 0x6, 0, 0, 1)
    1222 #define MPP24_UNUSED MPP(24, 0x1, 0, 0, 1)
    1223
    1224
    1225 #define MPP25_GPIO MPP(25, 0x0, 1, 1, 1)
    1226 -#define MPP25_UA2_RXD MPP(25, 0x4, 1, 0, 1)
    1227 -#define MPP25_TDM_RSTn MPP(25, 0x6, 0, 1, 1)
    1228 +#define MPP25_UA2_RXD MPP(25, 0x4, 0, 0, 1)
    1229 +#define MPP25_TDM_RSTn MPP(25, 0x6, 0, 0, 1)
    1230 #define MPP25_UNUSED MPP(25, 0x1, 0, 0, 1)
    1231
    1232
    1233 #define MPP26_GPIO MPP(26, 0x0, 1, 1, 1)
    1234 -#define MPP26_UA2_CTSn MPP(26, 0x4, 1, 0, 1)
    1235 -#define MPP26_TDM_PCLK MPP(26, 0x6, 1, 1, 1)
    1236 +#define MPP26_UA2_CTSn MPP(26, 0x4, 0, 0, 1)
    1237 +#define MPP26_TDM_PCLK MPP(26, 0x6, 0, 0, 1)
    1238 #define MPP26_UNUSED MPP(26, 0x1, 0, 0, 1)
    1239
    1240
    1241 #define MPP27_GPIO MPP(27, 0x0, 1, 1, 1)
    1242 -#define MPP27_UA2_RTSn MPP(27, 0x4, 0, 1, 1)
    1243 -#define MPP27_TDM_FSYNC MPP(27, 0x6, 1, 1, 1)
    1244 +#define MPP27_UA2_RTSn MPP(27, 0x4, 0, 0, 1)
    1245 +#define MPP27_TDM_FSYNC MPP(27, 0x6, 0, 0, 1)
    1246 #define MPP27_UNUSED MPP(27, 0x1, 0, 0, 1)
    1247
    1248
    1249 #define MPP28_GPIO MPP(28, 0x0, 1, 1, 1)
    1250 -#define MPP28_UA3_TXD MPP(28, 0x4, 0, 1, 1)
    1251 -#define MPP28_TDM_DRX MPP(28, 0x6, 1, 0, 1)
    1252 +#define MPP28_UA3_TXD MPP(28, 0x4, 0, 0, 1)
    1253 +#define MPP28_TDM_DRX MPP(28, 0x6, 0, 0, 1)
    1254 #define MPP28_UNUSED MPP(28, 0x1, 0, 0, 1)
    1255
    1256 #define MPP29_GPIO MPP(29, 0x0, 1, 1, 1)
    1257 -#define MPP29_UA3_RXD MPP(29, 0x4, 1, 0, 1)
    1258 -#define MPP29_SYSRST_OUTn MPP(29, 0x5, 0, 1, 1)
    1259 -#define MPP29_TDM_DTX MPP(29, 0x6, 0, 1, 1)
    1260 +#define MPP29_UA3_RXD MPP(29, 0x4, 0, 0, 1)
    1261 +#define MPP29_SYSRST_OUTn MPP(29, 0x5, 0, 0, 1)
    1262 +#define MPP29_TDM_DTX MPP(29, 0x6, 0, 0, 1)
    1263 #define MPP29_UNUSED MPP(29, 0x1, 0, 0, 1)
    1264
    1265 #define MPP30_GPIO MPP(30, 0x0, 1, 1, 1)
    1266 -#define MPP30_UA3_CTSn MPP(30, 0x4, 1, 0, 1)
    1267 +#define MPP30_UA3_CTSn MPP(30, 0x4, 0, 0, 1)
    1268 #define MPP30_UNUSED MPP(30, 0x1, 0, 0, 1)
    1269
    1270 #define MPP31_GPIO MPP(31, 0x0, 1, 1, 1)
    1271 -#define MPP31_UA3_RTSn MPP(31, 0x4, 0, 1, 1)
    1272 -#define MPP31_TDM1_SCSn MPP(31, 0x6, 0, 1, 1)
    1273 +#define MPP31_UA3_RTSn MPP(31, 0x4, 0, 0, 1)
    1274 +#define MPP31_TDM1_SCSn MPP(31, 0x6, 0, 0, 1)
    1275 #define MPP31_UNUSED MPP(31, 0x1, 0, 0, 1)
    1276
    1277
    1278 #define MPP32_GPIO MPP(32, 0x1, 1, 1, 1)
    1279 -#define MPP32_UA3_TDX MPP(32, 0x4, 0, 1, 1)
    1280 -#define MPP32_SYSRST_OUTn MPP(32, 0x5, 0, 1, 1)
    1281 -#define MPP32_TDM0_RXQ MPP(32, 0x6, 0, 1, 1)
    1282 +#define MPP32_UA3_TDX MPP(32, 0x4, 0, 0, 1)
    1283 +#define MPP32_SYSRST_OUTn MPP(32, 0x5, 0, 0, 1)
    1284 +#define MPP32_TDM0_RXQ MPP(32, 0x6, 0, 0, 1)
    1285 #define MPP32_UNUSED MPP(32, 0x3, 0, 0, 1)
    1286
    1287
    1288 #define MPP33_GPIO MPP(33, 0x1, 1, 1, 1)
    1289 -#define MPP33_UA3_RDX MPP(33, 0x4, 1, 0, 1)
    1290 -#define MPP33_TDM0_TXQ MPP(33, 0x6, 0, 1, 1)
    1291 +#define MPP33_UA3_RDX MPP(33, 0x4, 0, 0, 1)
    1292 +#define MPP33_TDM0_TXQ MPP(33, 0x6, 0, 0, 1)
    1293 #define MPP33_UNUSED MPP(33, 0x3, 0, 0, 1)
    1294
    1295
    1296
    1297 #define MPP34_GPIO MPP(34, 0x1, 1, 1, 1)
    1298 -#define MPP34_UA2_TDX MPP(34, 0x4, 0, 1, 1)
    1299 -#define MPP34_TDM1_RXQ MPP(34, 0x6, 0, 1, 1)
    1300 +#define MPP34_UA2_TDX MPP(34, 0x4, 0, 0, 1)
    1301 +#define MPP34_TDM1_RXQ MPP(34, 0x6, 0, 0, 1)
    1302 #define MPP34_UNUSED MPP(34, 0x3, 0, 0, 1)
    1303
    1304
    1305
    1306 #define MPP35_GPIO MPP(35, 0x1, 1, 1, 1)
    1307 -#define MPP35_UA2_RDX MPP(35, 0x4, 1, 0, 1)
    1308 -#define MPP35_TDM1_TXQ MPP(35, 0x6, 0, 1, 1)
    1309 +#define MPP35_UA2_RDX MPP(35, 0x4, 0, 0, 1)
    1310 +#define MPP35_TDM1_TXQ MPP(35, 0x6, 0, 0, 1)
    1311 #define MPP35_UNUSED MPP(35, 0x3, 0, 0, 1)
    1312
    1313 #define MPP36_GPIO MPP(36, 0x1, 1, 1, 1)
    1314 -#define MPP36_UA0_CTSn MPP(36, 0x2, 1, 0, 1)
    1315 -#define MPP36_UA2_TDX MPP(36, 0x4, 0, 1, 1)
    1316 -#define MPP36_TDM0_SCSn MPP(36, 0x6, 0, 1, 1)
    1317 +#define MPP36_UA0_CTSn MPP(36, 0x2, 0, 0, 1)
    1318 +#define MPP36_UA2_TDX MPP(36, 0x4, 0, 0, 1)
    1319 +#define MPP36_TDM0_SCSn MPP(36, 0x6, 0, 0, 1)
    1320 #define MPP36_UNUSED MPP(36, 0x3, 0, 0, 1)
    1321
    1322
    1323 #define MPP37_GPIO MPP(37, 0x1, 1, 1, 1)
    1324 -#define MPP37_UA0_RTSn MPP(37, 0x2, 0, 1, 1)
    1325 -#define MPP37_UA2_RXD MPP(37, 0x4, 1, 0, 1)
    1326 -#define MPP37_SYSRST_OUTn MPP(37, 0x5, 0, 1, 1)
    1327 -#define MPP37_TDM_SCLK MPP(37, 0x6, 0, 1, 1)
    1328 +#define MPP37_UA0_RTSn MPP(37, 0x2, 0, 0, 1)
    1329 +#define MPP37_UA2_RXD MPP(37, 0x4, 0, 0, 1)
    1330 +#define MPP37_SYSRST_OUTn MPP(37, 0x5, 0, 0, 1)
    1331 +#define MPP37_TDM_SCLK MPP(37, 0x6, 0, 0, 1)
    1332 #define MPP37_UNUSED MPP(37, 0x3, 0, 0, 1)
    1333
    1334
    1335
    1336
    1337 #define MPP38_GPIO MPP(38, 0x1, 1, 1, 1)
    1338 -#define MPP38_UA1_CTSn MPP(38, 0x2, 1, 0, 1)
    1339 -#define MPP38_UA3_TXD MPP(38, 0x4, 0, 1, 1)
    1340 -#define MPP38_SYSRST_OUTn MPP(38, 0x5, 0, 1, 1)
    1341 -#define MPP38_TDM_SMOSI MPP(38, 0x6, 0, 1, 1)
    1342 +#define MPP38_UA1_CTSn MPP(38, 0x2, 0, 0, 1)
    1343 +#define MPP38_UA3_TXD MPP(38, 0x4, 0, 0, 1)
    1344 +#define MPP38_SYSRST_OUTn MPP(38, 0x5, 0, 0, 1)
    1345 +#define MPP38_TDM_SMOSI MPP(38, 0x6, 0, 0, 1)
    1346 #define MPP38_UNUSED MPP(38, 0x3, 0, 0, 1)
    1347
    1348
    1349
    1350
    1351 #define MPP39_GPIO MPP(39, 0x1, 1, 1, 1)
    1352 -#define MPP39_UA1_RTSn MPP(39, 0x2, 0, 1, 1)
    1353 -#define MPP39_UA3_RXD MPP(39, 0x4, 1, 0, 1)
    1354 -#define MPP39_SYSRST_OUTn MPP(39, 0x5, 0, 1, 1)
    1355 -#define MPP39_TDM_SMISO MPP(39, 0x6, 1, 0, 1)
    1356 +#define MPP39_UA1_RTSn MPP(39, 0x2, 0, 0, 1)
    1357 +#define MPP39_UA3_RXD MPP(39, 0x4, 0, 0, 1)
    1358 +#define MPP39_SYSRST_OUTn MPP(39, 0x5, 0, 0, 1)
    1359 +#define MPP39_TDM_SMISO MPP(39, 0x6, 0, 0, 1)
    1360 #define MPP39_UNUSED MPP(39, 0x3, 0, 0, 1)
    1361
    1362
    1363
    1364 #define MPP40_GPIO MPP(40, 0x1, 1, 1, 1)
    1365 -#define MPP40_TDM_INTn MPP(40, 0x6, 1, 0, 1)
    1366 +#define MPP40_TDM_INTn MPP(40, 0x6, 0, 0, 1)
    1367 #define MPP40_UNUSED MPP(40, 0x0, 0, 0, 1)
    1368
    1369
    1370
    1371 #define MPP41_GPIO MPP(41, 0x1, 1, 1, 1)
    1372 -#define MPP41_TDM_RSTn MPP(41, 0x6, 0, 1, 1)
    1373 +#define MPP41_TDM_RSTn MPP(41, 0x6, 0, 0, 1)
    1374 #define MPP41_UNUSED MPP(41, 0x0, 0, 0, 1)
    1375
    1376
    1377
    1378 #define MPP42_GPIO MPP(42, 0x1, 1, 1, 1)
    1379 -#define MPP42_TDM_PCLK MPP(42, 0x6, 1, 1, 1)
    1380 +#define MPP42_TDM_PCLK MPP(42, 0x6, 0, 0, 1)
    1381 #define MPP42_UNUSED MPP(42, 0x0, 0, 0, 1)
    1382
    1383
    1384
    1385 #define MPP43_GPIO MPP(43, 0x1, 1, 1, 1)
    1386 -#define MPP43_TDM_FSYNC MPP(43, 0x6, 1, 1, 1)
    1387 +#define MPP43_TDM_FSYNC MPP(43, 0x6, 0, 0, 1)
    1388 #define MPP43_UNUSED MPP(43, 0x0, 0, 0, 1)
    1389
    1390
    1391
    1392 #define MPP44_GPIO MPP(44, 0x1, 1, 1, 1)
    1393 -#define MPP44_TDM_DRX MPP(44, 0x6, 1, 0, 1)
    1394 +#define MPP44_TDM_DRX MPP(44, 0x6, 0, 0, 1)
    1395 #define MPP44_UNUSED MPP(44, 0x0, 0, 0, 1)
    1396
    1397
    1398
    1399 #define MPP45_GPIO MPP(45, 0x1, 1, 1, 1)
    1400 -#define MPP45_SATA0_ACTn MPP(45, 0x3, 0, 1, 1)
    1401 -#define MPP45_TDM_DRX MPP(45, 0x6, 0, 1, 1)
    1402 +#define MPP45_SATA0_ACTn MPP(45, 0x3, 0, 0, 1)
    1403 +#define MPP45_TDM_DRX MPP(45, 0x6, 0, 0, 1)
    1404 #define MPP45_UNUSED MPP(45, 0x0, 0, 0, 1)
    1405
    1406
    1407 #define MPP46_GPIO MPP(46, 0x1, 1, 1, 1)
    1408 -#define MPP46_TDM_SCSn MPP(46, 0x6, 0, 1, 1)
    1409 +#define MPP46_TDM_SCSn MPP(46, 0x6, 0, 0, 1)
    1410 #define MPP46_UNUSED MPP(46, 0x0, 0, 0, 1)
    1411
    1412
    1413 @@ -323,14 +323,14 @@
    1414
    1415
    1416 #define MPP48_GPIO MPP(48, 0x1, 1, 1, 1)
    1417 -#define MPP48_SATA1_ACTn MPP(48, 0x3, 0, 1, 1)
    1418 +#define MPP48_SATA1_ACTn MPP(48, 0x3, 0, 0, 1)
    1419 #define MPP48_UNUSED MPP(48, 0x2, 0, 0, 1)
    1420
    1421
    1422
    1423 #define MPP49_GPIO MPP(49, 0x1, 1, 1, 1)
    1424 -#define MPP49_SATA0_ACTn MPP(49, 0x3, 0, 1, 1)
    1425 -#define MPP49_M_BB MPP(49, 0x4, 1, 0, 1)
    1426 +#define MPP49_SATA0_ACTn MPP(49, 0x3, 0, 0, 1)
    1427 +#define MPP49_M_BB MPP(49, 0x4, 0, 0, 1)
    1428 #define MPP49_UNUSED MPP(49, 0x2, 0, 0, 1)
    1429
    1430
    1431 diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
    1432 index 5156468..02cd29a 100644
    1433 --- a/arch/arm/mach-omap2/board-4430sdp.c
    1434 +++ b/arch/arm/mach-omap2/board-4430sdp.c
    1435 @@ -52,8 +52,9 @@
    1436 #define ETH_KS8851_QUART 138
    1437 #define OMAP4_SFH7741_SENSOR_OUTPUT_GPIO 184
    1438 #define OMAP4_SFH7741_ENABLE_GPIO 188
    1439 -#define HDMI_GPIO_HPD 60 /* Hot plug pin for HDMI */
    1440 +#define HDMI_GPIO_CT_CP_HPD 60 /* HPD mode enable/disable */
    1441 #define HDMI_GPIO_LS_OE 41 /* Level shifter for HDMI */
    1442 +#define HDMI_GPIO_HPD 63 /* Hotplug detect */
    1443 #define DISPLAY_SEL_GPIO 59 /* LCD2/PicoDLP switch */
    1444 #define DLP_POWER_ON_GPIO 40
    1445
    1446 @@ -597,12 +598,8 @@ static void __init omap_sfh7741prox_init(void)
    1447
    1448 static void sdp4430_hdmi_mux_init(void)
    1449 {
    1450 - /* PAD0_HDMI_HPD_PAD1_HDMI_CEC */
    1451 - omap_mux_init_signal("hdmi_hpd",
    1452 - OMAP_PIN_INPUT_PULLUP);
    1453 omap_mux_init_signal("hdmi_cec",
    1454 OMAP_PIN_INPUT_PULLUP);
    1455 - /* PAD0_HDMI_DDC_SCL_PAD1_HDMI_DDC_SDA */
    1456 omap_mux_init_signal("hdmi_ddc_scl",
    1457 OMAP_PIN_INPUT_PULLUP);
    1458 omap_mux_init_signal("hdmi_ddc_sda",
    1459 @@ -610,8 +607,9 @@ static void sdp4430_hdmi_mux_init(void)
    1460 }
    1461
    1462 static struct gpio sdp4430_hdmi_gpios[] = {
    1463 - { HDMI_GPIO_HPD, GPIOF_OUT_INIT_HIGH, "hdmi_gpio_hpd" },
    1464 + { HDMI_GPIO_CT_CP_HPD, GPIOF_OUT_INIT_HIGH, "hdmi_gpio_ct_cp_hpd" },
    1465 { HDMI_GPIO_LS_OE, GPIOF_OUT_INIT_HIGH, "hdmi_gpio_ls_oe" },
    1466 + { HDMI_GPIO_HPD, GPIOF_DIR_IN, "hdmi_gpio_hpd" },
    1467 };
    1468
    1469 static int sdp4430_panel_enable_hdmi(struct omap_dss_device *dssdev)
    1470 @@ -628,8 +626,7 @@ static int sdp4430_panel_enable_hdmi(struct omap_dss_device *dssdev)
    1471
    1472 static void sdp4430_panel_disable_hdmi(struct omap_dss_device *dssdev)
    1473 {
    1474 - gpio_free(HDMI_GPIO_LS_OE);
    1475 - gpio_free(HDMI_GPIO_HPD);
    1476 + gpio_free_array(sdp4430_hdmi_gpios, ARRAY_SIZE(sdp4430_hdmi_gpios));
    1477 }
    1478
    1479 static struct nokia_dsi_panel_data dsi1_panel = {
    1480 @@ -745,6 +742,10 @@ static void sdp4430_lcd_init(void)
    1481 pr_err("%s: Could not get lcd2_reset_gpio\n", __func__);
    1482 }
    1483
    1484 +static struct omap_dss_hdmi_data sdp4430_hdmi_data = {
    1485 + .hpd_gpio = HDMI_GPIO_HPD,
    1486 +};
    1487 +
    1488 static struct omap_dss_device sdp4430_hdmi_device = {
    1489 .name = "hdmi",
    1490 .driver_name = "hdmi_panel",
    1491 @@ -752,6 +753,7 @@ static struct omap_dss_device sdp4430_hdmi_device = {
    1492 .platform_enable = sdp4430_panel_enable_hdmi,
    1493 .platform_disable = sdp4430_panel_disable_hdmi,
    1494 .channel = OMAP_DSS_CHANNEL_DIGIT,
    1495 + .data = &sdp4430_hdmi_data,
    1496 };
    1497
    1498 static struct picodlp_panel_data sdp4430_picodlp_pdata = {
    1499 @@ -829,6 +831,10 @@ static void omap_4430sdp_display_init(void)
    1500 sdp4430_hdmi_mux_init();
    1501 sdp4430_picodlp_init();
    1502 omap_display_init(&sdp4430_dss_data);
    1503 +
    1504 + omap_mux_init_gpio(HDMI_GPIO_LS_OE, OMAP_PIN_OUTPUT);
    1505 + omap_mux_init_gpio(HDMI_GPIO_CT_CP_HPD, OMAP_PIN_OUTPUT);
    1506 + omap_mux_init_gpio(HDMI_GPIO_HPD, OMAP_PIN_INPUT_PULLDOWN);
    1507 }
    1508
    1509 #ifdef CONFIG_OMAP_MUX
    1510 diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
    1511 index a8c2c42..51b1c93 100644
    1512 --- a/arch/arm/mach-omap2/board-omap4panda.c
    1513 +++ b/arch/arm/mach-omap2/board-omap4panda.c
    1514 @@ -51,8 +51,9 @@
    1515 #define GPIO_HUB_NRESET 62
    1516 #define GPIO_WIFI_PMENA 43
    1517 #define GPIO_WIFI_IRQ 53
    1518 -#define HDMI_GPIO_HPD 60 /* Hot plug pin for HDMI */
    1519 +#define HDMI_GPIO_CT_CP_HPD 60 /* HPD mode enable/disable */
    1520 #define HDMI_GPIO_LS_OE 41 /* Level shifter for HDMI */
    1521 +#define HDMI_GPIO_HPD 63 /* Hotplug detect */
    1522
    1523 /* wl127x BT, FM, GPS connectivity chip */
    1524 static int wl1271_gpios[] = {46, -1, -1};
    1525 @@ -481,12 +482,8 @@ int __init omap4_panda_dvi_init(void)
    1526
    1527 static void omap4_panda_hdmi_mux_init(void)
    1528 {
    1529 - /* PAD0_HDMI_HPD_PAD1_HDMI_CEC */
    1530 - omap_mux_init_signal("hdmi_hpd",
    1531 - OMAP_PIN_INPUT_PULLUP);
    1532 omap_mux_init_signal("hdmi_cec",
    1533 OMAP_PIN_INPUT_PULLUP);
    1534 - /* PAD0_HDMI_DDC_SCL_PAD1_HDMI_DDC_SDA */
    1535 omap_mux_init_signal("hdmi_ddc_scl",
    1536 OMAP_PIN_INPUT_PULLUP);
    1537 omap_mux_init_signal("hdmi_ddc_sda",
    1538 @@ -494,8 +491,9 @@ static void omap4_panda_hdmi_mux_init(void)
    1539 }
    1540
    1541 static struct gpio panda_hdmi_gpios[] = {
    1542 - { HDMI_GPIO_HPD, GPIOF_OUT_INIT_HIGH, "hdmi_gpio_hpd" },
    1543 + { HDMI_GPIO_CT_CP_HPD, GPIOF_OUT_INIT_HIGH, "hdmi_gpio_ct_cp_hpd" },
    1544 { HDMI_GPIO_LS_OE, GPIOF_OUT_INIT_HIGH, "hdmi_gpio_ls_oe" },
    1545 + { HDMI_GPIO_HPD, GPIOF_DIR_IN, "hdmi_gpio_hpd" },
    1546 };
    1547
    1548 static int omap4_panda_panel_enable_hdmi(struct omap_dss_device *dssdev)
    1549 @@ -512,10 +510,13 @@ static int omap4_panda_panel_enable_hdmi(struct omap_dss_device *dssdev)
    1550
    1551 static void omap4_panda_panel_disable_hdmi(struct omap_dss_device *dssdev)
    1552 {
    1553 - gpio_free(HDMI_GPIO_LS_OE);
    1554 - gpio_free(HDMI_GPIO_HPD);
    1555 + gpio_free_array(panda_hdmi_gpios, ARRAY_SIZE(panda_hdmi_gpios));
    1556 }
    1557
    1558 +static struct omap_dss_hdmi_data omap4_panda_hdmi_data = {
    1559 + .hpd_gpio = HDMI_GPIO_HPD,
    1560 +};
    1561 +
    1562 static struct omap_dss_device omap4_panda_hdmi_device = {
    1563 .name = "hdmi",
    1564 .driver_name = "hdmi_panel",
    1565 @@ -523,6 +524,7 @@ static struct omap_dss_device omap4_panda_hdmi_device = {
    1566 .platform_enable = omap4_panda_panel_enable_hdmi,
    1567 .platform_disable = omap4_panda_panel_disable_hdmi,
    1568 .channel = OMAP_DSS_CHANNEL_DIGIT,
    1569 + .data = &omap4_panda_hdmi_data,
    1570 };
    1571
    1572 static struct omap_dss_device *omap4_panda_dss_devices[] = {
    1573 @@ -546,6 +548,10 @@ void omap4_panda_display_init(void)
    1574
    1575 omap4_panda_hdmi_mux_init();
    1576 omap_display_init(&omap4_panda_dss_data);
    1577 +
    1578 + omap_mux_init_gpio(HDMI_GPIO_LS_OE, OMAP_PIN_OUTPUT);
    1579 + omap_mux_init_gpio(HDMI_GPIO_CT_CP_HPD, OMAP_PIN_OUTPUT);
    1580 + omap_mux_init_gpio(HDMI_GPIO_HPD, OMAP_PIN_INPUT_PULLDOWN);
    1581 }
    1582
    1583 static void __init omap4_panda_init(void)
    1584 diff --git a/arch/arm/mach-omap2/omap-iommu.c b/arch/arm/mach-omap2/omap-iommu.c
    1585 index b882204..ac49384 100644
    1586 --- a/arch/arm/mach-omap2/omap-iommu.c
    1587 +++ b/arch/arm/mach-omap2/omap-iommu.c
    1588 @@ -150,7 +150,8 @@ err_out:
    1589 platform_device_put(omap_iommu_pdev[i]);
    1590 return err;
    1591 }
    1592 -module_init(omap_iommu_init);
    1593 +/* must be ready before omap3isp is probed */
    1594 +subsys_initcall(omap_iommu_init);
    1595
    1596 static void __exit omap_iommu_exit(void)
    1597 {
    1598 diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
    1599 index 22ace0b..53b68b8 100644
    1600 --- a/arch/arm/mach-orion5x/common.c
    1601 +++ b/arch/arm/mach-orion5x/common.c
    1602 @@ -29,6 +29,7 @@
    1603 #include <mach/hardware.h>
    1604 #include <mach/orion5x.h>
    1605 #include <plat/orion_nand.h>
    1606 +#include <plat/ehci-orion.h>
    1607 #include <plat/time.h>
    1608 #include <plat/common.h>
    1609 #include "common.h"
    1610 @@ -72,7 +73,8 @@ void __init orion5x_map_io(void)
    1611 void __init orion5x_ehci0_init(void)
    1612 {
    1613 orion_ehci_init(&orion5x_mbus_dram_info,
    1614 - ORION5X_USB0_PHYS_BASE, IRQ_ORION5X_USB0_CTRL);
    1615 + ORION5X_USB0_PHYS_BASE, IRQ_ORION5X_USB0_CTRL,
    1616 + EHCI_PHY_ORION);
    1617 }
    1618
    1619
    1620 diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
    1621 index 40cc7aa..82ef81d 100644
    1622 --- a/arch/arm/mm/proc-v7.S
    1623 +++ b/arch/arm/mm/proc-v7.S
    1624 @@ -352,9 +352,7 @@ __v7_setup:
    1625 mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register
    1626 #endif
    1627 #ifdef CONFIG_ARM_ERRATA_743622
    1628 - teq r6, #0x20 @ present in r2p0
    1629 - teqne r6, #0x21 @ present in r2p1
    1630 - teqne r6, #0x22 @ present in r2p2
    1631 + teq r5, #0x00200000 @ only present in r2p*
    1632 mrceq p15, 0, r10, c15, c0, 1 @ read diagnostic register
    1633 orreq r10, r10, #1 << 6 @ set bit #6
    1634 mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register
    1635 diff --git a/arch/arm/plat-orion/common.c b/arch/arm/plat-orion/common.c
    1636 index 9e5451b..11dce87 100644
    1637 --- a/arch/arm/plat-orion/common.c
    1638 +++ b/arch/arm/plat-orion/common.c
    1639 @@ -806,10 +806,7 @@ void __init orion_xor1_init(unsigned long mapbase_low,
    1640 /*****************************************************************************
    1641 * EHCI
    1642 ****************************************************************************/
    1643 -static struct orion_ehci_data orion_ehci_data = {
    1644 - .phy_version = EHCI_PHY_NA,
    1645 -};
    1646 -
    1647 +static struct orion_ehci_data orion_ehci_data;
    1648 static u64 ehci_dmamask = DMA_BIT_MASK(32);
    1649
    1650
    1651 @@ -830,9 +827,11 @@ static struct platform_device orion_ehci = {
    1652
    1653 void __init orion_ehci_init(struct mbus_dram_target_info *mbus_dram_info,
    1654 unsigned long mapbase,
    1655 - unsigned long irq)
    1656 + unsigned long irq,
    1657 + enum orion_ehci_phy_ver phy_version)
    1658 {
    1659 orion_ehci_data.dram = mbus_dram_info;
    1660 + orion_ehci_data.phy_version = phy_version;
    1661 fill_resources(&orion_ehci, orion_ehci_resources, mapbase, SZ_4K - 1,
    1662 irq);
    1663
    1664 diff --git a/arch/arm/plat-orion/include/plat/common.h b/arch/arm/plat-orion/include/plat/common.h
    1665 index a63c357..a2c0e31 100644
    1666 --- a/arch/arm/plat-orion/include/plat/common.h
    1667 +++ b/arch/arm/plat-orion/include/plat/common.h
    1668 @@ -95,7 +95,8 @@ void __init orion_xor1_init(unsigned long mapbase_low,
    1669
    1670 void __init orion_ehci_init(struct mbus_dram_target_info *mbus_dram_info,
    1671 unsigned long mapbase,
    1672 - unsigned long irq);
    1673 + unsigned long irq,
    1674 + enum orion_ehci_phy_ver phy_version);
    1675
    1676 void __init orion_ehci_1_init(struct mbus_dram_target_info *mbus_dram_info,
    1677 unsigned long mapbase,
    1678 diff --git a/arch/arm/plat-orion/mpp.c b/arch/arm/plat-orion/mpp.c
    1679 index 9155343..3b1e17b 100644
    1680 --- a/arch/arm/plat-orion/mpp.c
    1681 +++ b/arch/arm/plat-orion/mpp.c
    1682 @@ -64,8 +64,7 @@ void __init orion_mpp_conf(unsigned int *mpp_list, unsigned int variant_mask,
    1683 gpio_mode |= GPIO_INPUT_OK;
    1684 if (*mpp_list & MPP_OUTPUT_MASK)
    1685 gpio_mode |= GPIO_OUTPUT_OK;
    1686 - if (sel != 0)
    1687 - gpio_mode = 0;
    1688 +
    1689 orion_gpio_set_valid(num, gpio_mode);
    1690 }
    1691
    1692 diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c
    1693 index 53754bc..8a90b6a 100644
    1694 --- a/arch/arm/plat-s3c24xx/dma.c
    1695 +++ b/arch/arm/plat-s3c24xx/dma.c
    1696 @@ -1249,7 +1249,7 @@ static void s3c2410_dma_resume(void)
    1697 struct s3c2410_dma_chan *cp = s3c2410_chans + dma_channels - 1;
    1698 int channel;
    1699
    1700 - for (channel = dma_channels - 1; channel >= 0; cp++, channel--)
    1701 + for (channel = dma_channels - 1; channel >= 0; cp--, channel--)
    1702 s3c2410_dma_resume_chan(cp);
    1703 }
    1704
    1705 diff --git a/arch/avr32/Kconfig b/arch/avr32/Kconfig
    1706 index 197e96f..3dea7231 100644
    1707 --- a/arch/avr32/Kconfig
    1708 +++ b/arch/avr32/Kconfig
    1709 @@ -8,6 +8,7 @@ config AVR32
    1710 select HAVE_KPROBES
    1711 select HAVE_GENERIC_HARDIRQS
    1712 select GENERIC_IRQ_PROBE
    1713 + select GENERIC_ATOMIC64
    1714 select HARDIRQS_SW_RESEND
    1715 select GENERIC_IRQ_SHOW
    1716 select ARCH_HAVE_NMI_SAFE_CMPXCHG
    1717 diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
    1718 index 373679b..f929db9 100644
    1719 --- a/arch/s390/Kconfig
    1720 +++ b/arch/s390/Kconfig
    1721 @@ -230,6 +230,9 @@ config COMPAT
    1722 config SYSVIPC_COMPAT
    1723 def_bool y if COMPAT && SYSVIPC
    1724
    1725 +config KEYS_COMPAT
    1726 + def_bool y if COMPAT && KEYS
    1727 +
    1728 config AUDIT_ARCH
    1729 def_bool y
    1730
    1731 diff --git a/arch/s390/include/asm/compat.h b/arch/s390/include/asm/compat.h
    1732 index 2e49748..234f1d8 100644
    1733 --- a/arch/s390/include/asm/compat.h
    1734 +++ b/arch/s390/include/asm/compat.h
    1735 @@ -172,13 +172,6 @@ static inline int is_compat_task(void)
    1736 return is_32bit_task();
    1737 }
    1738
    1739 -#else
    1740 -
    1741 -static inline int is_compat_task(void)
    1742 -{
    1743 - return 0;
    1744 -}
    1745 -
    1746 #endif
    1747
    1748 static inline void __user *arch_compat_alloc_user_space(long len)
    1749 diff --git a/arch/s390/kernel/process.c b/arch/s390/kernel/process.c
    1750 index 9451b21..53088e2 100644
    1751 --- a/arch/s390/kernel/process.c
    1752 +++ b/arch/s390/kernel/process.c
    1753 @@ -29,7 +29,6 @@
    1754 #include <asm/irq.h>
    1755 #include <asm/timer.h>
    1756 #include <asm/nmi.h>
    1757 -#include <asm/compat.h>
    1758 #include <asm/smp.h>
    1759 #include "entry.h"
    1760
    1761 diff --git a/arch/s390/kernel/ptrace.c b/arch/s390/kernel/ptrace.c
    1762 index 573bc29..afe82bc 100644
    1763 --- a/arch/s390/kernel/ptrace.c
    1764 +++ b/arch/s390/kernel/ptrace.c
    1765 @@ -20,8 +20,8 @@
    1766 #include <linux/regset.h>
    1767 #include <linux/tracehook.h>
    1768 #include <linux/seccomp.h>
    1769 +#include <linux/compat.h>
    1770 #include <trace/syscall.h>
    1771 -#include <asm/compat.h>
    1772 #include <asm/segment.h>
    1773 #include <asm/page.h>
    1774 #include <asm/pgtable.h>
    1775 diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c
    1776 index e54c4ff..773f55e 100644
    1777 --- a/arch/s390/kernel/setup.c
    1778 +++ b/arch/s390/kernel/setup.c
    1779 @@ -45,6 +45,7 @@
    1780 #include <linux/kexec.h>
    1781 #include <linux/crash_dump.h>
    1782 #include <linux/memory.h>
    1783 +#include <linux/compat.h>
    1784
    1785 #include <asm/ipl.h>
    1786 #include <asm/uaccess.h>
    1787 @@ -58,7 +59,6 @@
    1788 #include <asm/ptrace.h>
    1789 #include <asm/sections.h>
    1790 #include <asm/ebcdic.h>
    1791 -#include <asm/compat.h>
    1792 #include <asm/kvm_virtio.h>
    1793 #include <asm/diag.h>
    1794
    1795 diff --git a/arch/s390/kernel/signal.c b/arch/s390/kernel/signal.c
    1796 index 7f6f9f3..5086553 100644
    1797 --- a/arch/s390/kernel/signal.c
    1798 +++ b/arch/s390/kernel/signal.c
    1799 @@ -30,7 +30,6 @@
    1800 #include <asm/ucontext.h>
    1801 #include <asm/uaccess.h>
    1802 #include <asm/lowcore.h>
    1803 -#include <asm/compat.h>
    1804 #include "entry.h"
    1805
    1806 #define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
    1807 diff --git a/arch/s390/mm/fault.c b/arch/s390/mm/fault.c
    1808 index a9a3018..c7f0fbc 100644
    1809 --- a/arch/s390/mm/fault.c
    1810 +++ b/arch/s390/mm/fault.c
    1811 @@ -36,7 +36,6 @@
    1812 #include <asm/pgtable.h>
    1813 #include <asm/irq.h>
    1814 #include <asm/mmu_context.h>
    1815 -#include <asm/compat.h>
    1816 #include "../kernel/entry.h"
    1817
    1818 #ifndef CONFIG_64BIT
    1819 diff --git a/arch/s390/mm/mmap.c b/arch/s390/mm/mmap.c
    1820 index f09c748..a0155c0 100644
    1821 --- a/arch/s390/mm/mmap.c
    1822 +++ b/arch/s390/mm/mmap.c
    1823 @@ -29,8 +29,8 @@
    1824 #include <linux/mman.h>
    1825 #include <linux/module.h>
    1826 #include <linux/random.h>
    1827 +#include <linux/compat.h>
    1828 #include <asm/pgalloc.h>
    1829 -#include <asm/compat.h>
    1830
    1831 static unsigned long stack_maxrandom_size(void)
    1832 {
    1833 diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h
    1834 index f61c62f..50d7ff2 100644
    1835 --- a/arch/x86/include/asm/perf_event.h
    1836 +++ b/arch/x86/include/asm/perf_event.h
    1837 @@ -212,4 +212,12 @@ static inline perf_guest_switch_msr *perf_guest_get_msrs(int *nr)
    1838 static inline void perf_events_lapic_init(void) { }
    1839 #endif
    1840
    1841 +#if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_CPU_SUP_AMD)
    1842 + extern void amd_pmu_enable_virt(void);
    1843 + extern void amd_pmu_disable_virt(void);
    1844 +#else
    1845 + static inline void amd_pmu_enable_virt(void) { }
    1846 + static inline void amd_pmu_disable_virt(void) { }
    1847 +#endif
    1848 +
    1849 #endif /* _ASM_X86_PERF_EVENT_H */
    1850 diff --git a/arch/x86/kernel/cpu/perf_event.h b/arch/x86/kernel/cpu/perf_event.h
    1851 index b9698d4..02e0295 100644
    1852 --- a/arch/x86/kernel/cpu/perf_event.h
    1853 +++ b/arch/x86/kernel/cpu/perf_event.h
    1854 @@ -146,7 +146,9 @@ struct cpu_hw_events {
    1855 /*
    1856 * AMD specific bits
    1857 */
    1858 - struct amd_nb *amd_nb;
    1859 + struct amd_nb *amd_nb;
    1860 + /* Inverted mask of bits to clear in the perf_ctr ctrl registers */
    1861 + u64 perf_ctr_virt_mask;
    1862
    1863 void *kfree_on_online;
    1864 };
    1865 @@ -372,9 +374,11 @@ void x86_pmu_disable_all(void);
    1866 static inline void __x86_pmu_enable_event(struct hw_perf_event *hwc,
    1867 u64 enable_mask)
    1868 {
    1869 + u64 disable_mask = __this_cpu_read(cpu_hw_events.perf_ctr_virt_mask);
    1870 +
    1871 if (hwc->extra_reg.reg)
    1872 wrmsrl(hwc->extra_reg.reg, hwc->extra_reg.config);
    1873 - wrmsrl(hwc->config_base, hwc->config | enable_mask);
    1874 + wrmsrl(hwc->config_base, (hwc->config | enable_mask) & ~disable_mask);
    1875 }
    1876
    1877 void x86_pmu_enable_all(int added);
    1878 diff --git a/arch/x86/kernel/cpu/perf_event_amd.c b/arch/x86/kernel/cpu/perf_event_amd.c
    1879 index aeefd45..f64a039 100644
    1880 --- a/arch/x86/kernel/cpu/perf_event_amd.c
    1881 +++ b/arch/x86/kernel/cpu/perf_event_amd.c
    1882 @@ -1,4 +1,5 @@
    1883 #include <linux/perf_event.h>
    1884 +#include <linux/export.h>
    1885 #include <linux/types.h>
    1886 #include <linux/init.h>
    1887 #include <linux/slab.h>
    1888 @@ -357,7 +358,9 @@ static void amd_pmu_cpu_starting(int cpu)
    1889 struct amd_nb *nb;
    1890 int i, nb_id;
    1891
    1892 - if (boot_cpu_data.x86_max_cores < 2)
    1893 + cpuc->perf_ctr_virt_mask = AMD_PERFMON_EVENTSEL_HOSTONLY;
    1894 +
    1895 + if (boot_cpu_data.x86_max_cores < 2 || boot_cpu_data.x86 == 0x15)
    1896 return;
    1897
    1898 nb_id = amd_get_nb_id(cpu);
    1899 @@ -587,9 +590,9 @@ static __initconst const struct x86_pmu amd_pmu_f15h = {
    1900 .put_event_constraints = amd_put_event_constraints,
    1901
    1902 .cpu_prepare = amd_pmu_cpu_prepare,
    1903 - .cpu_starting = amd_pmu_cpu_starting,
    1904 .cpu_dead = amd_pmu_cpu_dead,
    1905 #endif
    1906 + .cpu_starting = amd_pmu_cpu_starting,
    1907 };
    1908
    1909 __init int amd_pmu_init(void)
    1910 @@ -621,3 +624,33 @@ __init int amd_pmu_init(void)
    1911
    1912 return 0;
    1913 }
    1914 +
    1915 +void amd_pmu_enable_virt(void)
    1916 +{
    1917 + struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
    1918 +
    1919 + cpuc->perf_ctr_virt_mask = 0;
    1920 +
    1921 + /* Reload all events */
    1922 + x86_pmu_disable_all();
    1923 + x86_pmu_enable_all(0);
    1924 +}
    1925 +EXPORT_SYMBOL_GPL(amd_pmu_enable_virt);
    1926 +
    1927 +void amd_pmu_disable_virt(void)
    1928 +{
    1929 + struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
    1930 +
    1931 + /*
    1932 + * We only mask out the Host-only bit so that host-only counting works
    1933 + * when SVM is disabled. If someone sets up a guest-only counter when
    1934 + * SVM is disabled the Guest-only bits still gets set and the counter
    1935 + * will not count anything.
    1936 + */
    1937 + cpuc->perf_ctr_virt_mask = AMD_PERFMON_EVENTSEL_HOSTONLY;
    1938 +
    1939 + /* Reload all events */
    1940 + x86_pmu_disable_all();
    1941 + x86_pmu_enable_all(0);
    1942 +}
    1943 +EXPORT_SYMBOL_GPL(amd_pmu_disable_virt);
    1944 diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
    1945 index e32243e..94a4672 100644
    1946 --- a/arch/x86/kvm/svm.c
    1947 +++ b/arch/x86/kvm/svm.c
    1948 @@ -29,6 +29,7 @@
    1949 #include <linux/ftrace_event.h>
    1950 #include <linux/slab.h>
    1951
    1952 +#include <asm/perf_event.h>
    1953 #include <asm/tlbflush.h>
    1954 #include <asm/desc.h>
    1955 #include <asm/kvm_para.h>
    1956 @@ -575,6 +576,8 @@ static void svm_hardware_disable(void *garbage)
    1957 wrmsrl(MSR_AMD64_TSC_RATIO, TSC_RATIO_DEFAULT);
    1958
    1959 cpu_svm_disable();
    1960 +
    1961 + amd_pmu_disable_virt();
    1962 }
    1963
    1964 static int svm_hardware_enable(void *garbage)
    1965 @@ -622,6 +625,8 @@ static int svm_hardware_enable(void *garbage)
    1966
    1967 svm_init_erratum_383();
    1968
    1969 + amd_pmu_enable_virt();
    1970 +
    1971 return 0;
    1972 }
    1973
    1974 diff --git a/block/bsg.c b/block/bsg.c
    1975 index 702f131..c0ab25c 100644
    1976 --- a/block/bsg.c
    1977 +++ b/block/bsg.c
    1978 @@ -985,7 +985,8 @@ void bsg_unregister_queue(struct request_queue *q)
    1979
    1980 mutex_lock(&bsg_mutex);
    1981 idr_remove(&bsg_minor_idr, bcd->minor);
    1982 - sysfs_remove_link(&q->kobj, "bsg");
    1983 + if (q->kobj.sd)
    1984 + sysfs_remove_link(&q->kobj, "bsg");
    1985 device_unregister(bcd->class_dev);
    1986 bcd->class_dev = NULL;
    1987 kref_put(&bcd->ref, bsg_kref_release_function);
    1988 diff --git a/drivers/acpi/sleep.c b/drivers/acpi/sleep.c
    1989 index 6d9a3ab..0a7ed69 100644
    1990 --- a/drivers/acpi/sleep.c
    1991 +++ b/drivers/acpi/sleep.c
    1992 @@ -476,6 +476,22 @@ static struct dmi_system_id __initdata acpisleep_dmi_table[] = {
    1993 DMI_MATCH(DMI_PRODUCT_NAME, "VGN-FW520F"),
    1994 },
    1995 },
    1996 + {
    1997 + .callback = init_nvs_nosave,
    1998 + .ident = "Asus K54C",
    1999 + .matches = {
    2000 + DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
    2001 + DMI_MATCH(DMI_PRODUCT_NAME, "K54C"),
    2002 + },
    2003 + },
    2004 + {
    2005 + .callback = init_nvs_nosave,
    2006 + .ident = "Asus K54HR",
    2007 + .matches = {
    2008 + DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
    2009 + DMI_MATCH(DMI_PRODUCT_NAME, "K54HR"),
    2010 + },
    2011 + },
    2012 {},
    2013 };
    2014 #endif /* CONFIG_SUSPEND */
    2015 diff --git a/drivers/crypto/mv_cesa.c b/drivers/crypto/mv_cesa.c
    2016 index dcd8bab..fe79635 100644
    2017 --- a/drivers/crypto/mv_cesa.c
    2018 +++ b/drivers/crypto/mv_cesa.c
    2019 @@ -714,6 +714,7 @@ static int mv_hash_final(struct ahash_request *req)
    2020 {
    2021 struct mv_req_hash_ctx *ctx = ahash_request_ctx(req);
    2022
    2023 + ahash_request_set_crypt(req, NULL, req->result, 0);
    2024 mv_update_hash_req_ctx(ctx, 1, 0);
    2025 return mv_handle_req(&req->base);
    2026 }
    2027 diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
    2028 index a26d5b0..1608d2a 100644
    2029 --- a/drivers/gpu/drm/i915/i915_reg.h
    2030 +++ b/drivers/gpu/drm/i915/i915_reg.h
    2031 @@ -2886,6 +2886,20 @@
    2032 #define DISP_TILE_SURFACE_SWIZZLING (1<<13)
    2033 #define DISP_FBC_WM_DIS (1<<15)
    2034
    2035 +/* GEN7 chicken */
    2036 +#define GEN7_COMMON_SLICE_CHICKEN1 0x7010
    2037 +# define GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC ((1<<10) | (1<<26))
    2038 +
    2039 +#define GEN7_L3CNTLREG1 0xB01C
    2040 +#define GEN7_WA_FOR_GEN7_L3_CONTROL 0x3C4FFF8C
    2041 +
    2042 +#define GEN7_L3_CHICKEN_MODE_REGISTER 0xB030
    2043 +#define GEN7_WA_L3_CHICKEN_MODE 0x20000000
    2044 +
    2045 +/* WaCatErrorRejectionIssue */
    2046 +#define GEN7_SQ_CHICKEN_MBCUNIT_CONFIG 0x9030
    2047 +#define GEN7_SQ_CHICKEN_MBCUNIT_SQINTMOB (1<<11)
    2048 +
    2049 /* PCH */
    2050
    2051 /* south display engine interrupt */
    2052 @@ -3476,6 +3490,7 @@
    2053 #define GT_FIFO_NUM_RESERVED_ENTRIES 20
    2054
    2055 #define GEN6_UCGCTL2 0x9404
    2056 +# define GEN6_RCZUNIT_CLOCK_GATE_DISABLE (1 << 13)
    2057 # define GEN6_RCPBUNIT_CLOCK_GATE_DISABLE (1 << 12)
    2058 # define GEN6_RCCUNIT_CLOCK_GATE_DISABLE (1 << 11)
    2059
    2060 diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
    2061 index daa5743..9ec9755 100644
    2062 --- a/drivers/gpu/drm/i915/intel_display.c
    2063 +++ b/drivers/gpu/drm/i915/intel_display.c
    2064 @@ -5876,14 +5876,14 @@ static void ironlake_write_eld(struct drm_connector *connector,
    2065 int aud_cntl_st;
    2066 int aud_cntrl_st2;
    2067
    2068 - if (IS_IVYBRIDGE(connector->dev)) {
    2069 - hdmiw_hdmiedid = GEN7_HDMIW_HDMIEDID_A;
    2070 - aud_cntl_st = GEN7_AUD_CNTRL_ST_A;
    2071 - aud_cntrl_st2 = GEN7_AUD_CNTRL_ST2;
    2072 - } else {
    2073 + if (HAS_PCH_IBX(connector->dev)) {
    2074 hdmiw_hdmiedid = GEN5_HDMIW_HDMIEDID_A;
    2075 aud_cntl_st = GEN5_AUD_CNTL_ST_A;
    2076 aud_cntrl_st2 = GEN5_AUD_CNTL_ST2;
    2077 + } else {
    2078 + hdmiw_hdmiedid = GEN7_HDMIW_HDMIEDID_A;
    2079 + aud_cntl_st = GEN7_AUD_CNTRL_ST_A;
    2080 + aud_cntrl_st2 = GEN7_AUD_CNTRL_ST2;
    2081 }
    2082
    2083 i = to_intel_crtc(crtc)->pipe;
    2084 @@ -5965,7 +5965,7 @@ void intel_crtc_load_lut(struct drm_crtc *crtc)
    2085 int i;
    2086
    2087 /* The clocks have to be on to load the palette. */
    2088 - if (!crtc->enabled)
    2089 + if (!crtc->enabled || !intel_crtc->active)
    2090 return;
    2091
    2092 /* use legacy palette for Ironlake */
    2093 @@ -8248,8 +8248,28 @@ static void ivybridge_init_clock_gating(struct drm_device *dev)
    2094 I915_WRITE(WM2_LP_ILK, 0);
    2095 I915_WRITE(WM1_LP_ILK, 0);
    2096
    2097 + /* According to the spec, bit 13 (RCZUNIT) must be set on IVB.
    2098 + * This implements the WaDisableRCZUnitClockGating workaround.
    2099 + */
    2100 + I915_WRITE(GEN6_UCGCTL2, GEN6_RCZUNIT_CLOCK_GATE_DISABLE);
    2101 +
    2102 I915_WRITE(ILK_DSPCLK_GATE, IVB_VRHUNIT_CLK_GATE);
    2103
    2104 + /* Apply the WaDisableRHWOOptimizationForRenderHang workaround. */
    2105 + I915_WRITE(GEN7_COMMON_SLICE_CHICKEN1,
    2106 + GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC);
    2107 +
    2108 + /* WaApplyL3ControlAndL3ChickenMode requires those two on Ivy Bridge */
    2109 + I915_WRITE(GEN7_L3CNTLREG1,
    2110 + GEN7_WA_FOR_GEN7_L3_CONTROL);
    2111 + I915_WRITE(GEN7_L3_CHICKEN_MODE_REGISTER,
    2112 + GEN7_WA_L3_CHICKEN_MODE);
    2113 +
    2114 + /* This is required by WaCatErrorRejectionIssue */
    2115 + I915_WRITE(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG,
    2116 + I915_READ(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG) |
    2117 + GEN7_SQ_CHICKEN_MBCUNIT_SQINTMOB);
    2118 +
    2119 for_each_pipe(pipe) {
    2120 I915_WRITE(DSPCNTR(pipe),
    2121 I915_READ(DSPCNTR(pipe)) |
    2122 diff --git a/drivers/gpu/drm/radeon/r600_blit_shaders.c b/drivers/gpu/drm/radeon/r600_blit_shaders.c
    2123 index 2d1f6c5..73e2c7c 100644
    2124 --- a/drivers/gpu/drm/radeon/r600_blit_shaders.c
    2125 +++ b/drivers/gpu/drm/radeon/r600_blit_shaders.c
    2126 @@ -314,6 +314,10 @@ const u32 r6xx_default_state[] =
    2127 0x00000000, /* VGT_VTX_CNT_EN */
    2128
    2129 0xc0016900,
    2130 + 0x000000d4,
    2131 + 0x00000000, /* SX_MISC */
    2132 +
    2133 + 0xc0016900,
    2134 0x000002c8,
    2135 0x00000000, /* VGT_STRMOUT_BUFFER_EN */
    2136
    2137 @@ -626,6 +630,10 @@ const u32 r7xx_default_state[] =
    2138 0x00000000, /* VGT_VTX_CNT_EN */
    2139
    2140 0xc0016900,
    2141 + 0x000000d4,
    2142 + 0x00000000, /* SX_MISC */
    2143 +
    2144 + 0xc0016900,
    2145 0x000002c8,
    2146 0x00000000, /* VGT_STRMOUT_BUFFER_EN */
    2147
    2148 diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h
    2149 index 00cabb3..3c3daec 100644
    2150 --- a/drivers/hid/hid-ids.h
    2151 +++ b/drivers/hid/hid-ids.h
    2152 @@ -59,6 +59,9 @@
    2153 #define USB_VENDOR_ID_AIRCABLE 0x16CA
    2154 #define USB_DEVICE_ID_AIRCABLE1 0x1502
    2155
    2156 +#define USB_VENDOR_ID_AIREN 0x1a2c
    2157 +#define USB_DEVICE_ID_AIREN_SLIMPLUS 0x0002
    2158 +
    2159 #define USB_VENDOR_ID_ALCOR 0x058f
    2160 #define USB_DEVICE_ID_ALCOR_USBRS232 0x9720
    2161
    2162 diff --git a/drivers/hid/usbhid/hid-quirks.c b/drivers/hid/usbhid/hid-quirks.c
    2163 index 5028d60..1fe6b80 100644
    2164 --- a/drivers/hid/usbhid/hid-quirks.c
    2165 +++ b/drivers/hid/usbhid/hid-quirks.c
    2166 @@ -53,6 +53,7 @@ static const struct hid_blacklist {
    2167 { USB_VENDOR_ID_PLAYDOTCOM, USB_DEVICE_ID_PLAYDOTCOM_EMS_USBII, HID_QUIRK_MULTI_INPUT },
    2168 { USB_VENDOR_ID_TOUCHPACK, USB_DEVICE_ID_TOUCHPACK_RTS, HID_QUIRK_MULTI_INPUT },
    2169
    2170 + { USB_VENDOR_ID_AIREN, USB_DEVICE_ID_AIREN_SLIMPLUS, HID_QUIRK_NOGET },
    2171 { USB_VENDOR_ID_ATEN, USB_DEVICE_ID_ATEN_UC100KM, HID_QUIRK_NOGET },
    2172 { USB_VENDOR_ID_ATEN, USB_DEVICE_ID_ATEN_CS124U, HID_QUIRK_NOGET },
    2173 { USB_VENDOR_ID_ATEN, USB_DEVICE_ID_ATEN_2PORTKVM, HID_QUIRK_NOGET },
    2174 diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
    2175 index 91be41f..83e3e9d 100644
    2176 --- a/drivers/hwmon/Kconfig
    2177 +++ b/drivers/hwmon/Kconfig
    2178 @@ -497,8 +497,9 @@ config SENSORS_JC42
    2179 If you say yes here, you get support for JEDEC JC42.4 compliant
    2180 temperature sensors, which are used on many DDR3 memory modules for
    2181 mobile devices and servers. Support will include, but not be limited
    2182 - to, ADT7408, CAT34TS02, CAT6095, MAX6604, MCP9805, MCP98242, MCP98243,
    2183 - MCP9843, SE97, SE98, STTS424(E), TSE2002B3, and TS3000B3.
    2184 + to, ADT7408, AT30TS00, CAT34TS02, CAT6095, MAX6604, MCP9804, MCP9805,
    2185 + MCP98242, MCP98243, MCP9843, SE97, SE98, STTS424(E), STTS2002,
    2186 + STTS3000, TSE2002B3, TSE2002GB2, TS3000B3, and TS3000GB2.
    2187
    2188 This driver can also be built as a module. If so, the module
    2189 will be called jc42.
    2190 diff --git a/drivers/hwmon/jc42.c b/drivers/hwmon/jc42.c
    2191 index 2d3d728..0274a05 100644
    2192 --- a/drivers/hwmon/jc42.c
    2193 +++ b/drivers/hwmon/jc42.c
    2194 @@ -64,6 +64,7 @@ static const unsigned short normal_i2c[] = {
    2195
    2196 /* Manufacturer IDs */
    2197 #define ADT_MANID 0x11d4 /* Analog Devices */
    2198 +#define ATMEL_MANID 0x001f /* Atmel */
    2199 #define MAX_MANID 0x004d /* Maxim */
    2200 #define IDT_MANID 0x00b3 /* IDT */
    2201 #define MCP_MANID 0x0054 /* Microchip */
    2202 @@ -77,15 +78,25 @@ static const unsigned short normal_i2c[] = {
    2203 #define ADT7408_DEVID 0x0801
    2204 #define ADT7408_DEVID_MASK 0xffff
    2205
    2206 +/* Atmel */
    2207 +#define AT30TS00_DEVID 0x8201
    2208 +#define AT30TS00_DEVID_MASK 0xffff
    2209 +
    2210 /* IDT */
    2211 #define TS3000B3_DEVID 0x2903 /* Also matches TSE2002B3 */
    2212 #define TS3000B3_DEVID_MASK 0xffff
    2213
    2214 +#define TS3000GB2_DEVID 0x2912 /* Also matches TSE2002GB2 */
    2215 +#define TS3000GB2_DEVID_MASK 0xffff
    2216 +
    2217 /* Maxim */
    2218 #define MAX6604_DEVID 0x3e00
    2219 #define MAX6604_DEVID_MASK 0xffff
    2220
    2221 /* Microchip */
    2222 +#define MCP9804_DEVID 0x0200
    2223 +#define MCP9804_DEVID_MASK 0xfffc
    2224 +
    2225 #define MCP98242_DEVID 0x2000
    2226 #define MCP98242_DEVID_MASK 0xfffc
    2227
    2228 @@ -113,6 +124,12 @@ static const unsigned short normal_i2c[] = {
    2229 #define STTS424E_DEVID 0x0000
    2230 #define STTS424E_DEVID_MASK 0xfffe
    2231
    2232 +#define STTS2002_DEVID 0x0300
    2233 +#define STTS2002_DEVID_MASK 0xffff
    2234 +
    2235 +#define STTS3000_DEVID 0x0200
    2236 +#define STTS3000_DEVID_MASK 0xffff
    2237 +
    2238 static u16 jc42_hysteresis[] = { 0, 1500, 3000, 6000 };
    2239
    2240 struct jc42_chips {
    2241 @@ -123,8 +140,11 @@ struct jc42_chips {
    2242
    2243 static struct jc42_chips jc42_chips[] = {
    2244 { ADT_MANID, ADT7408_DEVID, ADT7408_DEVID_MASK },
    2245 + { ATMEL_MANID, AT30TS00_DEVID, AT30TS00_DEVID_MASK },
    2246 { IDT_MANID, TS3000B3_DEVID, TS3000B3_DEVID_MASK },
    2247 + { IDT_MANID, TS3000GB2_DEVID, TS3000GB2_DEVID_MASK },
    2248 { MAX_MANID, MAX6604_DEVID, MAX6604_DEVID_MASK },
    2249 + { MCP_MANID, MCP9804_DEVID, MCP9804_DEVID_MASK },
    2250 { MCP_MANID, MCP98242_DEVID, MCP98242_DEVID_MASK },
    2251 { MCP_MANID, MCP98243_DEVID, MCP98243_DEVID_MASK },
    2252 { MCP_MANID, MCP9843_DEVID, MCP9843_DEVID_MASK },
    2253 @@ -133,6 +153,8 @@ static struct jc42_chips jc42_chips[] = {
    2254 { NXP_MANID, SE98_DEVID, SE98_DEVID_MASK },
    2255 { STM_MANID, STTS424_DEVID, STTS424_DEVID_MASK },
    2256 { STM_MANID, STTS424E_DEVID, STTS424E_DEVID_MASK },
    2257 + { STM_MANID, STTS2002_DEVID, STTS2002_DEVID_MASK },
    2258 + { STM_MANID, STTS3000_DEVID, STTS3000_DEVID_MASK },
    2259 };
    2260
    2261 /* Each client has this additional data */
    2262 @@ -159,10 +181,12 @@ static struct jc42_data *jc42_update_device(struct device *dev);
    2263
    2264 static const struct i2c_device_id jc42_id[] = {
    2265 { "adt7408", 0 },
    2266 + { "at30ts00", 0 },
    2267 { "cat94ts02", 0 },
    2268 { "cat6095", 0 },
    2269 { "jc42", 0 },
    2270 { "max6604", 0 },
    2271 + { "mcp9804", 0 },
    2272 { "mcp9805", 0 },
    2273 { "mcp98242", 0 },
    2274 { "mcp98243", 0 },
    2275 @@ -171,8 +195,10 @@ static const struct i2c_device_id jc42_id[] = {
    2276 { "se97b", 0 },
    2277 { "se98", 0 },
    2278 { "stts424", 0 },
    2279 - { "tse2002b3", 0 },
    2280 - { "ts3000b3", 0 },
    2281 + { "stts2002", 0 },
    2282 + { "stts3000", 0 },
    2283 + { "tse2002", 0 },
    2284 + { "ts3000", 0 },
    2285 { }
    2286 };
    2287 MODULE_DEVICE_TABLE(i2c, jc42_id);
    2288 diff --git a/drivers/hwmon/pmbus/pmbus_core.c b/drivers/hwmon/pmbus/pmbus_core.c
    2289 index 00460d8..d89b339 100644
    2290 --- a/drivers/hwmon/pmbus/pmbus_core.c
    2291 +++ b/drivers/hwmon/pmbus/pmbus_core.c
    2292 @@ -54,7 +54,8 @@
    2293 lcrit_alarm, crit_alarm */
    2294 #define PMBUS_IOUT_BOOLEANS_PER_PAGE 3 /* alarm, lcrit_alarm,
    2295 crit_alarm */
    2296 -#define PMBUS_POUT_BOOLEANS_PER_PAGE 2 /* alarm, crit_alarm */
    2297 +#define PMBUS_POUT_BOOLEANS_PER_PAGE 3 /* cap_alarm, alarm, crit_alarm
    2298 + */
    2299 #define PMBUS_MAX_BOOLEANS_PER_FAN 2 /* alarm, fault */
    2300 #define PMBUS_MAX_BOOLEANS_PER_TEMP 4 /* min_alarm, max_alarm,
    2301 lcrit_alarm, crit_alarm */
    2302 diff --git a/drivers/hwmon/pmbus/zl6100.c b/drivers/hwmon/pmbus/zl6100.c
    2303 index 2bc9800..ba296fd 100644
    2304 --- a/drivers/hwmon/pmbus/zl6100.c
    2305 +++ b/drivers/hwmon/pmbus/zl6100.c
    2306 @@ -33,6 +33,7 @@ enum chips { zl2004, zl2006, zl2008, zl2105, zl2106, zl6100, zl6105 };
    2307 struct zl6100_data {
    2308 int id;
    2309 ktime_t access; /* chip access time */
    2310 + int delay; /* Delay between chip accesses in uS */
    2311 struct pmbus_driver_info info;
    2312 };
    2313
    2314 @@ -49,10 +50,10 @@ MODULE_PARM_DESC(delay, "Delay between chip accesses in uS");
    2315 /* Some chips need a delay between accesses */
    2316 static inline void zl6100_wait(const struct zl6100_data *data)
    2317 {
    2318 - if (delay) {
    2319 + if (data->delay) {
    2320 s64 delta = ktime_us_delta(ktime_get(), data->access);
    2321 - if (delta < delay)
    2322 - udelay(delay - delta);
    2323 + if (delta < data->delay)
    2324 + udelay(data->delay - delta);
    2325 }
    2326 }
    2327
    2328 @@ -184,8 +185,9 @@ static int zl6100_probe(struct i2c_client *client,
    2329 * can be cleared later for additional chips if tests show that it
    2330 * is not needed (in other words, better be safe than sorry).
    2331 */
    2332 + data->delay = delay;
    2333 if (data->id == zl2004 || data->id == zl6105)
    2334 - delay = 0;
    2335 + data->delay = 0;
    2336
    2337 /*
    2338 * Since there was a direct I2C device access above, wait before
    2339 diff --git a/drivers/i2c/busses/i2c-mxs.c b/drivers/i2c/busses/i2c-mxs.c
    2340 index 7e78f7c..3d471d5 100644
    2341 --- a/drivers/i2c/busses/i2c-mxs.c
    2342 +++ b/drivers/i2c/busses/i2c-mxs.c
    2343 @@ -72,6 +72,7 @@
    2344
    2345 #define MXS_I2C_QUEUESTAT (0x70)
    2346 #define MXS_I2C_QUEUESTAT_RD_QUEUE_EMPTY 0x00002000
    2347 +#define MXS_I2C_QUEUESTAT_WRITE_QUEUE_CNT_MASK 0x0000001F
    2348
    2349 #define MXS_I2C_QUEUECMD (0x80)
    2350
    2351 @@ -219,14 +220,14 @@ static int mxs_i2c_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg,
    2352 int ret;
    2353 int flags;
    2354
    2355 - init_completion(&i2c->cmd_complete);
    2356 -
    2357 dev_dbg(i2c->dev, "addr: 0x%04x, len: %d, flags: 0x%x, stop: %d\n",
    2358 msg->addr, msg->len, msg->flags, stop);
    2359
    2360 if (msg->len == 0)
    2361 return -EINVAL;
    2362
    2363 + init_completion(&i2c->cmd_complete);
    2364 +
    2365 flags = stop ? MXS_I2C_CTRL0_POST_SEND_STOP : 0;
    2366
    2367 if (msg->flags & I2C_M_RD)
    2368 @@ -286,6 +287,7 @@ static irqreturn_t mxs_i2c_isr(int this_irq, void *dev_id)
    2369 {
    2370 struct mxs_i2c_dev *i2c = dev_id;
    2371 u32 stat = readl(i2c->regs + MXS_I2C_CTRL1) & MXS_I2C_IRQ_MASK;
    2372 + bool is_last_cmd;
    2373
    2374 if (!stat)
    2375 return IRQ_NONE;
    2376 @@ -300,9 +302,14 @@ static irqreturn_t mxs_i2c_isr(int this_irq, void *dev_id)
    2377 else
    2378 i2c->cmd_err = 0;
    2379
    2380 - complete(&i2c->cmd_complete);
    2381 + is_last_cmd = (readl(i2c->regs + MXS_I2C_QUEUESTAT) &
    2382 + MXS_I2C_QUEUESTAT_WRITE_QUEUE_CNT_MASK) == 0;
    2383 +
    2384 + if (is_last_cmd || i2c->cmd_err)
    2385 + complete(&i2c->cmd_complete);
    2386
    2387 writel(stat, i2c->regs + MXS_I2C_CTRL1_CLR);
    2388 +
    2389 return IRQ_HANDLED;
    2390 }
    2391
    2392 diff --git a/drivers/input/mouse/alps.c b/drivers/input/mouse/alps.c
    2393 index 003587c..9c40c11 100644
    2394 --- a/drivers/input/mouse/alps.c
    2395 +++ b/drivers/input/mouse/alps.c
    2396 @@ -421,7 +421,9 @@ static const struct alps_model_info *alps_get_model(struct psmouse *psmouse, int
    2397
    2398 /*
    2399 * First try "E6 report".
    2400 - * ALPS should return 0,0,10 or 0,0,100
    2401 + * ALPS should return 0,0,10 or 0,0,100 if no buttons are pressed.
    2402 + * The bits 0-2 of the first byte will be 1s if some buttons are
    2403 + * pressed.
    2404 */
    2405 param[0] = 0;
    2406 if (ps2_command(ps2dev, param, PSMOUSE_CMD_SETRES) ||
    2407 @@ -437,7 +439,8 @@ static const struct alps_model_info *alps_get_model(struct psmouse *psmouse, int
    2408 psmouse_dbg(psmouse, "E6 report: %2.2x %2.2x %2.2x",
    2409 param[0], param[1], param[2]);
    2410
    2411 - if (param[0] != 0 || param[1] != 0 || (param[2] != 10 && param[2] != 100))
    2412 + if ((param[0] & 0xf8) != 0 || param[1] != 0 ||
    2413 + (param[2] != 10 && param[2] != 100))
    2414 return NULL;
    2415
    2416 /*
    2417 diff --git a/drivers/iommu/amd_iommu_init.c b/drivers/iommu/amd_iommu_init.c
    2418 index 82d2410..5c74179 100644
    2419 --- a/drivers/iommu/amd_iommu_init.c
    2420 +++ b/drivers/iommu/amd_iommu_init.c
    2421 @@ -268,7 +268,7 @@ static void iommu_set_exclusion_range(struct amd_iommu *iommu)
    2422 }
    2423
    2424 /* Programs the physical address of the device table into the IOMMU hardware */
    2425 -static void __init iommu_set_device_table(struct amd_iommu *iommu)
    2426 +static void iommu_set_device_table(struct amd_iommu *iommu)
    2427 {
    2428 u64 entry;
    2429
    2430 diff --git a/drivers/iommu/omap-iommu.c b/drivers/iommu/omap-iommu.c
    2431 index 8f32b2b..aba706c 100644
    2432 --- a/drivers/iommu/omap-iommu.c
    2433 +++ b/drivers/iommu/omap-iommu.c
    2434 @@ -1229,7 +1229,8 @@ static int __init omap_iommu_init(void)
    2435
    2436 return platform_driver_register(&omap_iommu_driver);
    2437 }
    2438 -module_init(omap_iommu_init);
    2439 +/* must be ready before omap3isp is probed */
    2440 +subsys_initcall(omap_iommu_init);
    2441
    2442 static void __exit omap_iommu_exit(void)
    2443 {
    2444 diff --git a/drivers/md/dm-flakey.c b/drivers/md/dm-flakey.c
    2445 index 9fb18c1..b280c43 100644
    2446 --- a/drivers/md/dm-flakey.c
    2447 +++ b/drivers/md/dm-flakey.c
    2448 @@ -323,7 +323,7 @@ static int flakey_end_io(struct dm_target *ti, struct bio *bio,
    2449 * Corrupt successful READs while in down state.
    2450 * If flags were specified, only corrupt those that match.
    2451 */
    2452 - if (!error && bio_submitted_while_down &&
    2453 + if (fc->corrupt_bio_byte && !error && bio_submitted_while_down &&
    2454 (bio_data_dir(bio) == READ) && (fc->corrupt_bio_rw == READ) &&
    2455 all_corrupt_bio_flags_match(bio, fc))
    2456 corrupt_bio_data(bio, fc);
    2457 diff --git a/drivers/md/dm-io.c b/drivers/md/dm-io.c
    2458 index ad2eba4..ea5dd28 100644
    2459 --- a/drivers/md/dm-io.c
    2460 +++ b/drivers/md/dm-io.c
    2461 @@ -296,6 +296,8 @@ static void do_region(int rw, unsigned region, struct dm_io_region *where,
    2462 unsigned offset;
    2463 unsigned num_bvecs;
    2464 sector_t remaining = where->count;
    2465 + struct request_queue *q = bdev_get_queue(where->bdev);
    2466 + sector_t discard_sectors;
    2467
    2468 /*
    2469 * where->count may be zero if rw holds a flush and we need to
    2470 @@ -305,9 +307,12 @@ static void do_region(int rw, unsigned region, struct dm_io_region *where,
    2471 /*
    2472 * Allocate a suitably sized-bio.
    2473 */
    2474 - num_bvecs = dm_sector_div_up(remaining,
    2475 - (PAGE_SIZE >> SECTOR_SHIFT));
    2476 - num_bvecs = min_t(int, bio_get_nr_vecs(where->bdev), num_bvecs);
    2477 + if (rw & REQ_DISCARD)
    2478 + num_bvecs = 1;
    2479 + else
    2480 + num_bvecs = min_t(int, bio_get_nr_vecs(where->bdev),
    2481 + dm_sector_div_up(remaining, (PAGE_SIZE >> SECTOR_SHIFT)));
    2482 +
    2483 bio = bio_alloc_bioset(GFP_NOIO, num_bvecs, io->client->bios);
    2484 bio->bi_sector = where->sector + (where->count - remaining);
    2485 bio->bi_bdev = where->bdev;
    2486 @@ -315,10 +320,14 @@ static void do_region(int rw, unsigned region, struct dm_io_region *where,
    2487 bio->bi_destructor = dm_bio_destructor;
    2488 store_io_and_region_in_bio(bio, io, region);
    2489
    2490 - /*
    2491 - * Try and add as many pages as possible.
    2492 - */
    2493 - while (remaining) {
    2494 + if (rw & REQ_DISCARD) {
    2495 + discard_sectors = min_t(sector_t, q->limits.max_discard_sectors, remaining);
    2496 + bio->bi_size = discard_sectors << SECTOR_SHIFT;
    2497 + remaining -= discard_sectors;
    2498 + } else while (remaining) {
    2499 + /*
    2500 + * Try and add as many pages as possible.
    2501 + */
    2502 dp->get_page(dp, &page, &len, &offset);
    2503 len = min(len, to_bytes(remaining));
    2504 if (!bio_add_page(bio, page, len, offset))
    2505 diff --git a/drivers/md/dm-ioctl.c b/drivers/md/dm-ioctl.c
    2506 index 31c2dc2..1ce84ed 100644
    2507 --- a/drivers/md/dm-ioctl.c
    2508 +++ b/drivers/md/dm-ioctl.c
    2509 @@ -1437,7 +1437,7 @@ static int target_message(struct dm_ioctl *param, size_t param_size)
    2510
    2511 if (!argc) {
    2512 DMWARN("Empty message received.");
    2513 - goto out;
    2514 + goto out_argv;
    2515 }
    2516
    2517 table = dm_get_live_table(md);
    2518 diff --git a/drivers/md/dm-raid.c b/drivers/md/dm-raid.c
    2519 index c2907d8..d2a3223 100644
    2520 --- a/drivers/md/dm-raid.c
    2521 +++ b/drivers/md/dm-raid.c
    2522 @@ -667,7 +667,14 @@ static int super_load(struct md_rdev *rdev, struct md_rdev *refdev)
    2523 return ret;
    2524
    2525 sb = page_address(rdev->sb_page);
    2526 - if (sb->magic != cpu_to_le32(DM_RAID_MAGIC)) {
    2527 +
    2528 + /*
    2529 + * Two cases that we want to write new superblocks and rebuild:
    2530 + * 1) New device (no matching magic number)
    2531 + * 2) Device specified for rebuild (!In_sync w/ offset == 0)
    2532 + */
    2533 + if ((sb->magic != cpu_to_le32(DM_RAID_MAGIC)) ||
    2534 + (!test_bit(In_sync, &rdev->flags) && !rdev->recovery_offset)) {
    2535 super_sync(rdev->mddev, rdev);
    2536
    2537 set_bit(FirstUse, &rdev->flags);
    2538 @@ -744,11 +751,8 @@ static int super_init_validation(struct mddev *mddev, struct md_rdev *rdev)
    2539 */
    2540 rdev_for_each(r, t, mddev) {
    2541 if (!test_bit(In_sync, &r->flags)) {
    2542 - if (!test_bit(FirstUse, &r->flags))
    2543 - DMERR("Superblock area of "
    2544 - "rebuild device %d should have been "
    2545 - "cleared.", r->raid_disk);
    2546 - set_bit(FirstUse, &r->flags);
    2547 + DMINFO("Device %d specified for rebuild: "
    2548 + "Clearing superblock", r->raid_disk);
    2549 rebuilds++;
    2550 } else if (test_bit(FirstUse, &r->flags))
    2551 new_devs++;
    2552 @@ -970,6 +974,7 @@ static int raid_ctr(struct dm_target *ti, unsigned argc, char **argv)
    2553
    2554 INIT_WORK(&rs->md.event_work, do_table_event);
    2555 ti->private = rs;
    2556 + ti->num_flush_requests = 1;
    2557
    2558 mutex_lock(&rs->md.reconfig_mutex);
    2559 ret = md_run(&rs->md);
    2560 diff --git a/drivers/md/dm-thin-metadata.c b/drivers/md/dm-thin-metadata.c
    2561 index 59c4f04..237571a 100644
    2562 --- a/drivers/md/dm-thin-metadata.c
    2563 +++ b/drivers/md/dm-thin-metadata.c
    2564 @@ -385,6 +385,7 @@ static int init_pmd(struct dm_pool_metadata *pmd,
    2565 data_sm = dm_sm_disk_create(tm, nr_blocks);
    2566 if (IS_ERR(data_sm)) {
    2567 DMERR("sm_disk_create failed");
    2568 + dm_tm_unlock(tm, sblock);
    2569 r = PTR_ERR(data_sm);
    2570 goto bad;
    2571 }
    2572 @@ -789,6 +790,11 @@ int dm_pool_metadata_close(struct dm_pool_metadata *pmd)
    2573 return 0;
    2574 }
    2575
    2576 +/*
    2577 + * __open_device: Returns @td corresponding to device with id @dev,
    2578 + * creating it if @create is set and incrementing @td->open_count.
    2579 + * On failure, @td is undefined.
    2580 + */
    2581 static int __open_device(struct dm_pool_metadata *pmd,
    2582 dm_thin_id dev, int create,
    2583 struct dm_thin_device **td)
    2584 @@ -799,10 +805,16 @@ static int __open_device(struct dm_pool_metadata *pmd,
    2585 struct disk_device_details details_le;
    2586
    2587 /*
    2588 - * Check the device isn't already open.
    2589 + * If the device is already open, return it.
    2590 */
    2591 list_for_each_entry(td2, &pmd->thin_devices, list)
    2592 if (td2->id == dev) {
    2593 + /*
    2594 + * May not create an already-open device.
    2595 + */
    2596 + if (create)
    2597 + return -EEXIST;
    2598 +
    2599 td2->open_count++;
    2600 *td = td2;
    2601 return 0;
    2602 @@ -817,6 +829,9 @@ static int __open_device(struct dm_pool_metadata *pmd,
    2603 if (r != -ENODATA || !create)
    2604 return r;
    2605
    2606 + /*
    2607 + * Create new device.
    2608 + */
    2609 changed = 1;
    2610 details_le.mapped_blocks = 0;
    2611 details_le.transaction_id = cpu_to_le64(pmd->trans_id);
    2612 @@ -882,12 +897,10 @@ static int __create_thin(struct dm_pool_metadata *pmd,
    2613
    2614 r = __open_device(pmd, dev, 1, &td);
    2615 if (r) {
    2616 - __close_device(td);
    2617 dm_btree_remove(&pmd->tl_info, pmd->root, &key, &pmd->root);
    2618 dm_btree_del(&pmd->bl_info, dev_root);
    2619 return r;
    2620 }
    2621 - td->changed = 1;
    2622 __close_device(td);
    2623
    2624 return r;
    2625 @@ -967,14 +980,14 @@ static int __create_snap(struct dm_pool_metadata *pmd,
    2626 goto bad;
    2627
    2628 r = __set_snapshot_details(pmd, td, origin, pmd->time);
    2629 + __close_device(td);
    2630 +
    2631 if (r)
    2632 goto bad;
    2633
    2634 - __close_device(td);
    2635 return 0;
    2636
    2637 bad:
    2638 - __close_device(td);
    2639 dm_btree_remove(&pmd->tl_info, pmd->root, &key, &pmd->root);
    2640 dm_btree_remove(&pmd->details_info, pmd->details_root,
    2641 &key, &pmd->details_root);
    2642 @@ -1211,6 +1224,8 @@ static int __remove(struct dm_thin_device *td, dm_block_t block)
    2643 if (r)
    2644 return r;
    2645
    2646 + td->mapped_blocks--;
    2647 + td->changed = 1;
    2648 pmd->need_commit = 1;
    2649
    2650 return 0;
    2651 diff --git a/drivers/mfd/cs5535-mfd.c b/drivers/mfd/cs5535-mfd.c
    2652 index 155fa04..e488a78 100644
    2653 --- a/drivers/mfd/cs5535-mfd.c
    2654 +++ b/drivers/mfd/cs5535-mfd.c
    2655 @@ -179,7 +179,7 @@ static struct pci_device_id cs5535_mfd_pci_tbl[] = {
    2656 };
    2657 MODULE_DEVICE_TABLE(pci, cs5535_mfd_pci_tbl);
    2658
    2659 -static struct pci_driver cs5535_mfd_drv = {
    2660 +static struct pci_driver cs5535_mfd_driver = {
    2661 .name = DRV_NAME,
    2662 .id_table = cs5535_mfd_pci_tbl,
    2663 .probe = cs5535_mfd_probe,
    2664 @@ -188,12 +188,12 @@ static struct pci_driver cs5535_mfd_drv = {
    2665
    2666 static int __init cs5535_mfd_init(void)
    2667 {
    2668 - return pci_register_driver(&cs5535_mfd_drv);
    2669 + return pci_register_driver(&cs5535_mfd_driver);
    2670 }
    2671
    2672 static void __exit cs5535_mfd_exit(void)
    2673 {
    2674 - pci_unregister_driver(&cs5535_mfd_drv);
    2675 + pci_unregister_driver(&cs5535_mfd_driver);
    2676 }
    2677
    2678 module_init(cs5535_mfd_init);
    2679 diff --git a/drivers/mfd/mfd-core.c b/drivers/mfd/mfd-core.c
    2680 index 0f59228..411f523 100644
    2681 --- a/drivers/mfd/mfd-core.c
    2682 +++ b/drivers/mfd/mfd-core.c
    2683 @@ -123,7 +123,7 @@ static int mfd_add_device(struct device *parent, int id,
    2684 }
    2685
    2686 if (!cell->ignore_resource_conflicts) {
    2687 - ret = acpi_check_resource_conflict(res);
    2688 + ret = acpi_check_resource_conflict(&res[r]);
    2689 if (ret)
    2690 goto fail_res;
    2691 }
    2692 diff --git a/drivers/mfd/wm8994-core.c b/drivers/mfd/wm8994-core.c
    2693 index 61894fc..9302d21 100644
    2694 --- a/drivers/mfd/wm8994-core.c
    2695 +++ b/drivers/mfd/wm8994-core.c
    2696 @@ -252,6 +252,20 @@ static int wm8994_suspend(struct device *dev)
    2697 break;
    2698 }
    2699
    2700 + switch (wm8994->type) {
    2701 + case WM1811:
    2702 + ret = wm8994_reg_read(wm8994, WM8994_ANTIPOP_2);
    2703 + if (ret < 0) {
    2704 + dev_err(dev, "Failed to read jackdet: %d\n", ret);
    2705 + } else if (ret & WM1811_JACKDET_MODE_MASK) {
    2706 + dev_dbg(dev, "CODEC still active, ignoring suspend\n");
    2707 + return 0;
    2708 + }
    2709 + break;
    2710 + default:
    2711 + break;
    2712 + }
    2713 +
    2714 /* Disable LDO pulldowns while the device is suspended if we
    2715 * don't know that something will be driving them. */
    2716 if (!wm8994->ldo_ena_always_driven)
    2717 diff --git a/drivers/misc/cs5535-mfgpt.c b/drivers/misc/cs5535-mfgpt.c
    2718 index bc685bf..87a390d 100644
    2719 --- a/drivers/misc/cs5535-mfgpt.c
    2720 +++ b/drivers/misc/cs5535-mfgpt.c
    2721 @@ -262,7 +262,7 @@ static void __init reset_all_timers(void)
    2722 * In other cases (such as with VSAless OpenFirmware), the system firmware
    2723 * leaves timers available for us to use.
    2724 */
    2725 -static int __init scan_timers(struct cs5535_mfgpt_chip *mfgpt)
    2726 +static int __devinit scan_timers(struct cs5535_mfgpt_chip *mfgpt)
    2727 {
    2728 struct cs5535_mfgpt_timer timer = { .chip = mfgpt };
    2729 unsigned long flags;
    2730 diff --git a/drivers/mmc/host/atmel-mci.c b/drivers/mmc/host/atmel-mci.c
    2731 index 72bc756..9896933 100644
    2732 --- a/drivers/mmc/host/atmel-mci.c
    2733 +++ b/drivers/mmc/host/atmel-mci.c
    2734 @@ -1944,12 +1944,12 @@ static bool atmci_filter(struct dma_chan *chan, void *slave)
    2735 }
    2736 }
    2737
    2738 -static void atmci_configure_dma(struct atmel_mci *host)
    2739 +static bool atmci_configure_dma(struct atmel_mci *host)
    2740 {
    2741 struct mci_platform_data *pdata;
    2742
    2743 if (host == NULL)
    2744 - return;
    2745 + return false;
    2746
    2747 pdata = host->pdev->dev.platform_data;
    2748
    2749 @@ -1966,12 +1966,15 @@ static void atmci_configure_dma(struct atmel_mci *host)
    2750 host->dma.chan =
    2751 dma_request_channel(mask, atmci_filter, pdata->dma_slave);
    2752 }
    2753 - if (!host->dma.chan)
    2754 - dev_notice(&host->pdev->dev, "DMA not available, using PIO\n");
    2755 - else
    2756 + if (!host->dma.chan) {
    2757 + dev_warn(&host->pdev->dev, "no DMA channel available\n");
    2758 + return false;
    2759 + } else {
    2760 dev_info(&host->pdev->dev,
    2761 "Using %s for DMA transfers\n",
    2762 dma_chan_name(host->dma.chan));
    2763 + return true;
    2764 + }
    2765 }
    2766
    2767 static inline unsigned int atmci_get_version(struct atmel_mci *host)
    2768 @@ -2081,8 +2084,7 @@ static int __init atmci_probe(struct platform_device *pdev)
    2769
    2770 /* Get MCI capabilities and set operations according to it */
    2771 atmci_get_cap(host);
    2772 - if (host->caps.has_dma) {
    2773 - dev_info(&pdev->dev, "using DMA\n");
    2774 + if (host->caps.has_dma && atmci_configure_dma(host)) {
    2775 host->prepare_data = &atmci_prepare_data_dma;
    2776 host->submit_data = &atmci_submit_data_dma;
    2777 host->stop_transfer = &atmci_stop_transfer_dma;
    2778 @@ -2092,15 +2094,12 @@ static int __init atmci_probe(struct platform_device *pdev)
    2779 host->submit_data = &atmci_submit_data_pdc;
    2780 host->stop_transfer = &atmci_stop_transfer_pdc;
    2781 } else {
    2782 - dev_info(&pdev->dev, "no DMA, no PDC\n");
    2783 + dev_info(&pdev->dev, "using PIO\n");
    2784 host->prepare_data = &atmci_prepare_data;
    2785 host->submit_data = &atmci_submit_data;
    2786 host->stop_transfer = &atmci_stop_transfer;
    2787 }
    2788
    2789 - if (host->caps.has_dma)
    2790 - atmci_configure_dma(host);
    2791 -
    2792 platform_set_drvdata(pdev, host);
    2793
    2794 /* We need at least one slot to succeed */
    2795 diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
    2796 index 38ebc4e..4540e37 100644
    2797 --- a/drivers/mmc/host/sdhci-esdhc-imx.c
    2798 +++ b/drivers/mmc/host/sdhci-esdhc-imx.c
    2799 @@ -269,8 +269,9 @@ static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg)
    2800 imx_data->scratchpad = val;
    2801 return;
    2802 case SDHCI_COMMAND:
    2803 - if ((host->cmd->opcode == MMC_STOP_TRANSMISSION)
    2804 - && (imx_data->flags & ESDHC_FLAG_MULTIBLK_NO_INT))
    2805 + if ((host->cmd->opcode == MMC_STOP_TRANSMISSION ||
    2806 + host->cmd->opcode == MMC_SET_BLOCK_COUNT) &&
    2807 + (imx_data->flags & ESDHC_FLAG_MULTIBLK_NO_INT))
    2808 val |= SDHCI_CMD_ABORTCMD;
    2809
    2810 if (is_imx6q_usdhc(imx_data)) {
    2811 diff --git a/drivers/net/usb/cdc_ether.c b/drivers/net/usb/cdc_ether.c
    2812 index 99ed6eb..4fd4144 100644
    2813 --- a/drivers/net/usb/cdc_ether.c
    2814 +++ b/drivers/net/usb/cdc_ether.c
    2815 @@ -570,6 +570,13 @@ static const struct usb_device_id products [] = {
    2816 .driver_info = 0,
    2817 },
    2818
    2819 +/* Logitech Harmony 900 - uses the pseudo-MDLM (BLAN) driver */
    2820 +{
    2821 + USB_DEVICE_AND_INTERFACE_INFO(0x046d, 0xc11f, USB_CLASS_COMM,
    2822 + USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
    2823 + .driver_info = 0,
    2824 +},
    2825 +
    2826 /*
    2827 * WHITELIST!!!
    2828 *
    2829 diff --git a/drivers/net/usb/usbnet.c b/drivers/net/usb/usbnet.c
    2830 index fae0fbd..81b96e3 100644
    2831 --- a/drivers/net/usb/usbnet.c
    2832 +++ b/drivers/net/usb/usbnet.c
    2833 @@ -589,6 +589,7 @@ static int unlink_urbs (struct usbnet *dev, struct sk_buff_head *q)
    2834 entry = (struct skb_data *) skb->cb;
    2835 urb = entry->urb;
    2836
    2837 + spin_unlock_irqrestore(&q->lock, flags);
    2838 // during some PM-driven resume scenarios,
    2839 // these (async) unlinks complete immediately
    2840 retval = usb_unlink_urb (urb);
    2841 @@ -596,6 +597,7 @@ static int unlink_urbs (struct usbnet *dev, struct sk_buff_head *q)
    2842 netdev_dbg(dev->net, "unlink urb err, %d\n", retval);
    2843 else
    2844 count++;
    2845 + spin_lock_irqsave(&q->lock, flags);
    2846 }
    2847 spin_unlock_irqrestore (&q->lock, flags);
    2848 return count;
    2849 diff --git a/drivers/net/usb/zaurus.c b/drivers/net/usb/zaurus.c
    2850 index 1a2234c..246b3bb 100644
    2851 --- a/drivers/net/usb/zaurus.c
    2852 +++ b/drivers/net/usb/zaurus.c
    2853 @@ -349,6 +349,13 @@ static const struct usb_device_id products [] = {
    2854 ZAURUS_MASTER_INTERFACE,
    2855 .driver_info = OLYMPUS_MXL_INFO,
    2856 },
    2857 +
    2858 +/* Logitech Harmony 900 - uses the pseudo-MDLM (BLAN) driver */
    2859 +{
    2860 + USB_DEVICE_AND_INTERFACE_INFO(0x046d, 0xc11f, USB_CLASS_COMM,
    2861 + USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
    2862 + .driver_info = (unsigned long) &bogus_mdlm_info,
    2863 +},
    2864 { }, // END
    2865 };
    2866 MODULE_DEVICE_TABLE(usb, products);
    2867 diff --git a/drivers/net/wireless/ath/ath9k/ar5008_phy.c b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
    2868 index f199e9e..0a3c7c8 100644
    2869 --- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c
    2870 +++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
    2871 @@ -489,8 +489,6 @@ static int ar5008_hw_rf_alloc_ext_banks(struct ath_hw *ah)
    2872 ATH_ALLOC_BANK(ah->analogBank6Data, ah->iniBank6.ia_rows);
    2873 ATH_ALLOC_BANK(ah->analogBank6TPCData, ah->iniBank6TPC.ia_rows);
    2874 ATH_ALLOC_BANK(ah->analogBank7Data, ah->iniBank7.ia_rows);
    2875 - ATH_ALLOC_BANK(ah->addac5416_21,
    2876 - ah->iniAddac.ia_rows * ah->iniAddac.ia_columns);
    2877 ATH_ALLOC_BANK(ah->bank6Temp, ah->iniBank6.ia_rows);
    2878
    2879 return 0;
    2880 @@ -519,7 +517,6 @@ static void ar5008_hw_rf_free_ext_banks(struct ath_hw *ah)
    2881 ATH_FREE_BANK(ah->analogBank6Data);
    2882 ATH_FREE_BANK(ah->analogBank6TPCData);
    2883 ATH_FREE_BANK(ah->analogBank7Data);
    2884 - ATH_FREE_BANK(ah->addac5416_21);
    2885 ATH_FREE_BANK(ah->bank6Temp);
    2886
    2887 #undef ATH_FREE_BANK
    2888 @@ -805,27 +802,7 @@ static int ar5008_hw_process_ini(struct ath_hw *ah,
    2889 if (ah->eep_ops->set_addac)
    2890 ah->eep_ops->set_addac(ah, chan);
    2891
    2892 - if (AR_SREV_5416_22_OR_LATER(ah)) {
    2893 - REG_WRITE_ARRAY(&ah->iniAddac, 1, regWrites);
    2894 - } else {
    2895 - struct ar5416IniArray temp;
    2896 - u32 addacSize =
    2897 - sizeof(u32) * ah->iniAddac.ia_rows *
    2898 - ah->iniAddac.ia_columns;
    2899 -
    2900 - /* For AR5416 2.0/2.1 */
    2901 - memcpy(ah->addac5416_21,
    2902 - ah->iniAddac.ia_array, addacSize);
    2903 -
    2904 - /* override CLKDRV value at [row, column] = [31, 1] */
    2905 - (ah->addac5416_21)[31 * ah->iniAddac.ia_columns + 1] = 0;
    2906 -
    2907 - temp.ia_array = ah->addac5416_21;
    2908 - temp.ia_columns = ah->iniAddac.ia_columns;
    2909 - temp.ia_rows = ah->iniAddac.ia_rows;
    2910 - REG_WRITE_ARRAY(&temp, 1, regWrites);
    2911 - }
    2912 -
    2913 + REG_WRITE_ARRAY(&ah->iniAddac, 1, regWrites);
    2914 REG_WRITE(ah, AR_PHY_ADC_SERIAL_CTL, AR_PHY_SEL_INTERNAL_ADDAC);
    2915
    2916 ENABLE_REGWRITE_BUFFER(ah);
    2917 diff --git a/drivers/net/wireless/ath/ath9k/ar9002_hw.c b/drivers/net/wireless/ath/ath9k/ar9002_hw.c
    2918 index 11f192a..d190411 100644
    2919 --- a/drivers/net/wireless/ath/ath9k/ar9002_hw.c
    2920 +++ b/drivers/net/wireless/ath/ath9k/ar9002_hw.c
    2921 @@ -180,6 +180,25 @@ static void ar9002_hw_init_mode_regs(struct ath_hw *ah)
    2922 INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac,
    2923 ARRAY_SIZE(ar5416Addac), 2);
    2924 }
    2925 +
    2926 + /* iniAddac needs to be modified for these chips */
    2927 + if (AR_SREV_9160(ah) || !AR_SREV_5416_22_OR_LATER(ah)) {
    2928 + struct ar5416IniArray *addac = &ah->iniAddac;
    2929 + u32 size = sizeof(u32) * addac->ia_rows * addac->ia_columns;
    2930 + u32 *data;
    2931 +
    2932 + data = kmalloc(size, GFP_KERNEL);
    2933 + if (!data)
    2934 + return;
    2935 +
    2936 + memcpy(data, addac->ia_array, size);
    2937 + addac->ia_array = data;
    2938 +
    2939 + if (!AR_SREV_5416_22_OR_LATER(ah)) {
    2940 + /* override CLKDRV value */
    2941 + INI_RA(addac, 31,1) = 0;
    2942 + }
    2943 + }
    2944 }
    2945
    2946 /* Support for Japan ch.14 (2484) spread */
    2947 diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
    2948 index f389b3c..1bd8edf 100644
    2949 --- a/drivers/net/wireless/ath/ath9k/hw.h
    2950 +++ b/drivers/net/wireless/ath/ath9k/hw.h
    2951 @@ -772,7 +772,6 @@ struct ath_hw {
    2952 u32 *analogBank6Data;
    2953 u32 *analogBank6TPCData;
    2954 u32 *analogBank7Data;
    2955 - u32 *addac5416_21;
    2956 u32 *bank6Temp;
    2957
    2958 u8 txpower_limit;
    2959 diff --git a/drivers/net/wireless/ath/carl9170/tx.c b/drivers/net/wireless/ath/carl9170/tx.c
    2960 index 59472e1..f6384af 100644
    2961 --- a/drivers/net/wireless/ath/carl9170/tx.c
    2962 +++ b/drivers/net/wireless/ath/carl9170/tx.c
    2963 @@ -1234,6 +1234,7 @@ static bool carl9170_tx_ps_drop(struct ar9170 *ar, struct sk_buff *skb)
    2964 {
    2965 struct ieee80211_sta *sta;
    2966 struct carl9170_sta_info *sta_info;
    2967 + struct ieee80211_tx_info *tx_info;
    2968
    2969 rcu_read_lock();
    2970 sta = __carl9170_get_tx_sta(ar, skb);
    2971 @@ -1241,16 +1242,18 @@ static bool carl9170_tx_ps_drop(struct ar9170 *ar, struct sk_buff *skb)
    2972 goto out_rcu;
    2973
    2974 sta_info = (void *) sta->drv_priv;
    2975 - if (unlikely(sta_info->sleeping)) {
    2976 - struct ieee80211_tx_info *tx_info;
    2977 + tx_info = IEEE80211_SKB_CB(skb);
    2978
    2979 + if (unlikely(sta_info->sleeping) &&
    2980 + !(tx_info->flags & (IEEE80211_TX_CTL_POLL_RESPONSE |
    2981 + IEEE80211_TX_CTL_CLEAR_PS_FILT))) {
    2982 rcu_read_unlock();
    2983
    2984 - tx_info = IEEE80211_SKB_CB(skb);
    2985 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
    2986 atomic_dec(&ar->tx_ampdu_upload);
    2987
    2988 tx_info->flags |= IEEE80211_TX_STAT_TX_FILTERED;
    2989 + carl9170_release_dev_space(ar, skb);
    2990 carl9170_tx_status(ar, skb, false);
    2991 return true;
    2992 }
    2993 diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-sta.c b/drivers/net/wireless/iwlwifi/iwl-agn-sta.c
    2994 index 4b2aa1d..5cfb3d1 100644
    2995 --- a/drivers/net/wireless/iwlwifi/iwl-agn-sta.c
    2996 +++ b/drivers/net/wireless/iwlwifi/iwl-agn-sta.c
    2997 @@ -1211,6 +1211,7 @@ int iwl_remove_dynamic_key(struct iwl_priv *priv,
    2998 unsigned long flags;
    2999 struct iwl_addsta_cmd sta_cmd;
    3000 u8 sta_id = iwlagn_key_sta_id(priv, ctx->vif, sta);
    3001 + __le16 key_flags;
    3002
    3003 /* if station isn't there, neither is the key */
    3004 if (sta_id == IWL_INVALID_STATION)
    3005 @@ -1236,7 +1237,14 @@ int iwl_remove_dynamic_key(struct iwl_priv *priv,
    3006 IWL_ERR(priv, "offset %d not used in uCode key table.\n",
    3007 keyconf->hw_key_idx);
    3008
    3009 - sta_cmd.key.key_flags = STA_KEY_FLG_NO_ENC | STA_KEY_FLG_INVALID;
    3010 + key_flags = cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
    3011 + key_flags |= STA_KEY_FLG_MAP_KEY_MSK | STA_KEY_FLG_NO_ENC |
    3012 + STA_KEY_FLG_INVALID;
    3013 +
    3014 + if (!(keyconf->flags & IEEE80211_KEY_FLAG_PAIRWISE))
    3015 + key_flags |= STA_KEY_MULTICAST_MSK;
    3016 +
    3017 + sta_cmd.key.key_flags = key_flags;
    3018 sta_cmd.key.key_offset = WEP_INVALID_OFFSET;
    3019 sta_cmd.sta.modify_mask = STA_MODIFY_KEY_MASK;
    3020 sta_cmd.mode = STA_CONTROL_MODIFY_MSK;
    3021 diff --git a/drivers/net/wireless/rtlwifi/rtl8192cu/sw.c b/drivers/net/wireless/rtlwifi/rtl8192cu/sw.c
    3022 index c244f2f..94a3e17 100644
    3023 --- a/drivers/net/wireless/rtlwifi/rtl8192cu/sw.c
    3024 +++ b/drivers/net/wireless/rtlwifi/rtl8192cu/sw.c
    3025 @@ -275,6 +275,8 @@ static struct usb_device_id rtl8192c_usb_ids[] = {
    3026 {RTL_USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8191, rtl92cu_hal_cfg)},
    3027
    3028 /****** 8188CU ********/
    3029 + /* RTL8188CTV */
    3030 + {RTL_USB_DEVICE(USB_VENDER_ID_REALTEK, 0x018a, rtl92cu_hal_cfg)},
    3031 /* 8188CE-VAU USB minCard */
    3032 {RTL_USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8170, rtl92cu_hal_cfg)},
    3033 /* 8188cu 1*1 dongle */
    3034 @@ -291,14 +293,14 @@ static struct usb_device_id rtl8192c_usb_ids[] = {
    3035 {RTL_USB_DEVICE(USB_VENDER_ID_REALTEK, 0x817e, rtl92cu_hal_cfg)},
    3036 /* 8188RU in Alfa AWUS036NHR */
    3037 {RTL_USB_DEVICE(USB_VENDER_ID_REALTEK, 0x817f, rtl92cu_hal_cfg)},
    3038 + /* RTL8188CUS-VL */
    3039 + {RTL_USB_DEVICE(USB_VENDER_ID_REALTEK, 0x818a, rtl92cu_hal_cfg)},
    3040 /* 8188 Combo for BC4 */
    3041 {RTL_USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8754, rtl92cu_hal_cfg)},
    3042
    3043 /****** 8192CU ********/
    3044 - /* 8191cu 1*2 */
    3045 - {RTL_USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8177, rtl92cu_hal_cfg)},
    3046 /* 8192cu 2*2 */
    3047 - {RTL_USB_DEVICE(USB_VENDER_ID_REALTEK, 0x817b, rtl92cu_hal_cfg)},
    3048 + {RTL_USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8178, rtl92cu_hal_cfg)},
    3049 /* 8192CE-VAU USB minCard */
    3050 {RTL_USB_DEVICE(USB_VENDER_ID_REALTEK, 0x817c, rtl92cu_hal_cfg)},
    3051
    3052 @@ -309,13 +311,17 @@ static struct usb_device_id rtl8192c_usb_ids[] = {
    3053 {RTL_USB_DEVICE(0x07b8, 0x8188, rtl92cu_hal_cfg)}, /*Abocom - Abocom*/
    3054 {RTL_USB_DEVICE(0x07b8, 0x8189, rtl92cu_hal_cfg)}, /*Funai - Abocom*/
    3055 {RTL_USB_DEVICE(0x0846, 0x9041, rtl92cu_hal_cfg)}, /*NetGear WNA1000M*/
    3056 - {RTL_USB_DEVICE(0x0Df6, 0x0052, rtl92cu_hal_cfg)}, /*Sitecom - Edimax*/
    3057 + {RTL_USB_DEVICE(0x0df6, 0x0052, rtl92cu_hal_cfg)}, /*Sitecom - Edimax*/
    3058 + {RTL_USB_DEVICE(0x0df6, 0x005c, rtl92cu_hal_cfg)}, /*Sitecom - Edimax*/
    3059 {RTL_USB_DEVICE(0x0eb0, 0x9071, rtl92cu_hal_cfg)}, /*NO Brand - Etop*/
    3060 /* HP - Lite-On ,8188CUS Slim Combo */
    3061 {RTL_USB_DEVICE(0x103c, 0x1629, rtl92cu_hal_cfg)},
    3062 {RTL_USB_DEVICE(0x13d3, 0x3357, rtl92cu_hal_cfg)}, /* AzureWave */
    3063 {RTL_USB_DEVICE(0x2001, 0x3308, rtl92cu_hal_cfg)}, /*D-Link - Alpha*/
    3064 + {RTL_USB_DEVICE(0x2019, 0x4902, rtl92cu_hal_cfg)}, /*Planex - Etop*/
    3065 {RTL_USB_DEVICE(0x2019, 0xab2a, rtl92cu_hal_cfg)}, /*Planex - Abocom*/
    3066 + /*SW-WF02-AD15 -Abocom*/
    3067 + {RTL_USB_DEVICE(0x2019, 0xab2e, rtl92cu_hal_cfg)},
    3068 {RTL_USB_DEVICE(0x2019, 0xed17, rtl92cu_hal_cfg)}, /*PCI - Edimax*/
    3069 {RTL_USB_DEVICE(0x20f4, 0x648b, rtl92cu_hal_cfg)}, /*TRENDnet - Cameo*/
    3070 {RTL_USB_DEVICE(0x7392, 0x7811, rtl92cu_hal_cfg)}, /*Edimax - Edimax*/
    3071 @@ -326,14 +332,36 @@ static struct usb_device_id rtl8192c_usb_ids[] = {
    3072 {RTL_USB_DEVICE(0x4855, 0x0091, rtl92cu_hal_cfg)}, /* NetweeN-Feixun */
    3073 {RTL_USB_DEVICE(0x9846, 0x9041, rtl92cu_hal_cfg)}, /* Netgear Cameo */
    3074
    3075 + /****** 8188 RU ********/
    3076 + /* Netcore */
    3077 + {RTL_USB_DEVICE(USB_VENDER_ID_REALTEK, 0x317f, rtl92cu_hal_cfg)},
    3078 +
    3079 + /****** 8188CUS Slim Solo********/
    3080 + {RTL_USB_DEVICE(0x04f2, 0xaff7, rtl92cu_hal_cfg)}, /*Xavi*/
    3081 + {RTL_USB_DEVICE(0x04f2, 0xaff9, rtl92cu_hal_cfg)}, /*Xavi*/
    3082 + {RTL_USB_DEVICE(0x04f2, 0xaffa, rtl92cu_hal_cfg)}, /*Xavi*/
    3083 +
    3084 + /****** 8188CUS Slim Combo ********/
    3085 + {RTL_USB_DEVICE(0x04f2, 0xaff8, rtl92cu_hal_cfg)}, /*Xavi*/
    3086 + {RTL_USB_DEVICE(0x04f2, 0xaffb, rtl92cu_hal_cfg)}, /*Xavi*/
    3087 + {RTL_USB_DEVICE(0x04f2, 0xaffc, rtl92cu_hal_cfg)}, /*Xavi*/
    3088 + {RTL_USB_DEVICE(0x2019, 0x1201, rtl92cu_hal_cfg)}, /*Planex-Vencer*/
    3089 +
    3090 /****** 8192CU ********/
    3091 + {RTL_USB_DEVICE(0x050d, 0x2102, rtl92cu_hal_cfg)}, /*Belcom-Sercomm*/
    3092 + {RTL_USB_DEVICE(0x050d, 0x2103, rtl92cu_hal_cfg)}, /*Belcom-Edimax*/
    3093 {RTL_USB_DEVICE(0x0586, 0x341f, rtl92cu_hal_cfg)}, /*Zyxel -Abocom*/
    3094 {RTL_USB_DEVICE(0x07aa, 0x0056, rtl92cu_hal_cfg)}, /*ATKK-Gemtek*/
    3095 {RTL_USB_DEVICE(0x07b8, 0x8178, rtl92cu_hal_cfg)}, /*Funai -Abocom*/
    3096 + {RTL_USB_DEVICE(0x0846, 0x9021, rtl92cu_hal_cfg)}, /*Netgear-Sercomm*/
    3097 + {RTL_USB_DEVICE(0x0b05, 0x17ab, rtl92cu_hal_cfg)}, /*ASUS-Edimax*/
    3098 + {RTL_USB_DEVICE(0x0df6, 0x0061, rtl92cu_hal_cfg)}, /*Sitecom-Edimax*/
    3099 + {RTL_USB_DEVICE(0x0e66, 0x0019, rtl92cu_hal_cfg)}, /*Hawking-Edimax*/
    3100 {RTL_USB_DEVICE(0x2001, 0x3307, rtl92cu_hal_cfg)}, /*D-Link-Cameo*/
    3101 {RTL_USB_DEVICE(0x2001, 0x3309, rtl92cu_hal_cfg)}, /*D-Link-Alpha*/
    3102 {RTL_USB_DEVICE(0x2001, 0x330a, rtl92cu_hal_cfg)}, /*D-Link-Alpha*/
    3103 {RTL_USB_DEVICE(0x2019, 0xab2b, rtl92cu_hal_cfg)}, /*Planex -Abocom*/
    3104 + {RTL_USB_DEVICE(0x20f4, 0x624d, rtl92cu_hal_cfg)}, /*TRENDNet*/
    3105 {RTL_USB_DEVICE(0x7392, 0x7822, rtl92cu_hal_cfg)}, /*Edimax -Edimax*/
    3106 {}
    3107 };
    3108 diff --git a/drivers/rapidio/devices/tsi721.c b/drivers/rapidio/devices/tsi721.c
    3109 index 691b1ab..30d2072 100644
    3110 --- a/drivers/rapidio/devices/tsi721.c
    3111 +++ b/drivers/rapidio/devices/tsi721.c
    3112 @@ -410,13 +410,14 @@ static void tsi721_db_dpc(struct work_struct *work)
    3113 */
    3114 mport = priv->mport;
    3115
    3116 - wr_ptr = ioread32(priv->regs + TSI721_IDQ_WP(IDB_QUEUE));
    3117 - rd_ptr = ioread32(priv->regs + TSI721_IDQ_RP(IDB_QUEUE));
    3118 + wr_ptr = ioread32(priv->regs + TSI721_IDQ_WP(IDB_QUEUE)) % IDB_QSIZE;
    3119 + rd_ptr = ioread32(priv->regs + TSI721_IDQ_RP(IDB_QUEUE)) % IDB_QSIZE;
    3120
    3121 while (wr_ptr != rd_ptr) {
    3122 idb_entry = (u64 *)(priv->idb_base +
    3123 (TSI721_IDB_ENTRY_SIZE * rd_ptr));
    3124 rd_ptr++;
    3125 + rd_ptr %= IDB_QSIZE;
    3126 idb.msg = *idb_entry;
    3127 *idb_entry = 0;
    3128
    3129 diff --git a/drivers/regulator/88pm8607.c b/drivers/regulator/88pm8607.c
    3130 index ca0d608..1cead1d 100644
    3131 --- a/drivers/regulator/88pm8607.c
    3132 +++ b/drivers/regulator/88pm8607.c
    3133 @@ -196,7 +196,7 @@ static const unsigned int LDO12_suspend_table[] = {
    3134 };
    3135
    3136 static const unsigned int LDO13_table[] = {
    3137 - 1300000, 1800000, 2000000, 2500000, 2800000, 3000000, 0, 0,
    3138 + 1200000, 1300000, 1800000, 2000000, 2500000, 2800000, 3000000, 0,
    3139 };
    3140
    3141 static const unsigned int LDO13_suspend_table[] = {
    3142 @@ -389,10 +389,10 @@ static struct pm8607_regulator_info pm8607_regulator_info[] = {
    3143 PM8607_LDO( 7, LDO7, 0, 3, SUPPLIES_EN12, 1),
    3144 PM8607_LDO( 8, LDO8, 0, 3, SUPPLIES_EN12, 2),
    3145 PM8607_LDO( 9, LDO9, 0, 3, SUPPLIES_EN12, 3),
    3146 - PM8607_LDO(10, LDO10, 0, 3, SUPPLIES_EN12, 4),
    3147 + PM8607_LDO(10, LDO10, 0, 4, SUPPLIES_EN12, 4),
    3148 PM8607_LDO(12, LDO12, 0, 4, SUPPLIES_EN12, 5),
    3149 PM8607_LDO(13, VIBRATOR_SET, 1, 3, VIBRATOR_SET, 0),
    3150 - PM8607_LDO(14, LDO14, 0, 4, SUPPLIES_EN12, 6),
    3151 + PM8607_LDO(14, LDO14, 0, 3, SUPPLIES_EN12, 6),
    3152 };
    3153
    3154 static int __devinit pm8607_regulator_probe(struct platform_device *pdev)
    3155 diff --git a/drivers/s390/block/dasd_eckd.c b/drivers/s390/block/dasd_eckd.c
    3156 index 6ab2968..fe9dacc 100644
    3157 --- a/drivers/s390/block/dasd_eckd.c
    3158 +++ b/drivers/s390/block/dasd_eckd.c
    3159 @@ -18,12 +18,12 @@
    3160 #include <linux/hdreg.h> /* HDIO_GETGEO */
    3161 #include <linux/bio.h>
    3162 #include <linux/module.h>
    3163 +#include <linux/compat.h>
    3164 #include <linux/init.h>
    3165
    3166 #include <asm/debug.h>
    3167 #include <asm/idals.h>
    3168 #include <asm/ebcdic.h>
    3169 -#include <asm/compat.h>
    3170 #include <asm/io.h>
    3171 #include <asm/uaccess.h>
    3172 #include <asm/cio.h>
    3173 diff --git a/drivers/s390/block/dasd_ioctl.c b/drivers/s390/block/dasd_ioctl.c
    3174 index f1a2016..792c69e 100644
    3175 --- a/drivers/s390/block/dasd_ioctl.c
    3176 +++ b/drivers/s390/block/dasd_ioctl.c
    3177 @@ -13,6 +13,7 @@
    3178 #define KMSG_COMPONENT "dasd"
    3179
    3180 #include <linux/interrupt.h>
    3181 +#include <linux/compat.h>
    3182 #include <linux/major.h>
    3183 #include <linux/fs.h>
    3184 #include <linux/blkpg.h>
    3185 diff --git a/drivers/s390/char/fs3270.c b/drivers/s390/char/fs3270.c
    3186 index e712981..9117045 100644
    3187 --- a/drivers/s390/char/fs3270.c
    3188 +++ b/drivers/s390/char/fs3270.c
    3189 @@ -11,6 +11,7 @@
    3190 #include <linux/console.h>
    3191 #include <linux/init.h>
    3192 #include <linux/interrupt.h>
    3193 +#include <linux/compat.h>
    3194 #include <linux/module.h>
    3195 #include <linux/list.h>
    3196 #include <linux/slab.h>
    3197 diff --git a/drivers/s390/char/vmcp.c b/drivers/s390/char/vmcp.c
    3198 index 75bde6a..89c03e6 100644
    3199 --- a/drivers/s390/char/vmcp.c
    3200 +++ b/drivers/s390/char/vmcp.c
    3201 @@ -13,6 +13,7 @@
    3202
    3203 #include <linux/fs.h>
    3204 #include <linux/init.h>
    3205 +#include <linux/compat.h>
    3206 #include <linux/kernel.h>
    3207 #include <linux/miscdevice.h>
    3208 #include <linux/slab.h>
    3209 diff --git a/drivers/s390/cio/chsc_sch.c b/drivers/s390/cio/chsc_sch.c
    3210 index 0c87b0f..8f9a1a3 100644
    3211 --- a/drivers/s390/cio/chsc_sch.c
    3212 +++ b/drivers/s390/cio/chsc_sch.c
    3213 @@ -8,6 +8,7 @@
    3214 */
    3215
    3216 #include <linux/slab.h>
    3217 +#include <linux/compat.h>
    3218 #include <linux/device.h>
    3219 #include <linux/module.h>
    3220 #include <linux/uaccess.h>
    3221 diff --git a/drivers/s390/cio/qdio_main.c b/drivers/s390/cio/qdio_main.c
    3222 index 3ef8d07..770a740 100644
    3223 --- a/drivers/s390/cio/qdio_main.c
    3224 +++ b/drivers/s390/cio/qdio_main.c
    3225 @@ -167,7 +167,7 @@ again:
    3226 DBF_ERROR("%4x EQBS ERROR", SCH_NO(q));
    3227 DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
    3228 q->handler(q->irq_ptr->cdev, QDIO_ERROR_ACTIVATE_CHECK_CONDITION,
    3229 - 0, -1, -1, q->irq_ptr->int_parm);
    3230 + q->nr, q->first_to_kick, count, q->irq_ptr->int_parm);
    3231 return 0;
    3232 }
    3233
    3234 @@ -215,7 +215,7 @@ again:
    3235 DBF_ERROR("%4x SQBS ERROR", SCH_NO(q));
    3236 DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
    3237 q->handler(q->irq_ptr->cdev, QDIO_ERROR_ACTIVATE_CHECK_CONDITION,
    3238 - 0, -1, -1, q->irq_ptr->int_parm);
    3239 + q->nr, q->first_to_kick, count, q->irq_ptr->int_parm);
    3240 return 0;
    3241 }
    3242
    3243 diff --git a/drivers/s390/scsi/zfcp_cfdc.c b/drivers/s390/scsi/zfcp_cfdc.c
    3244 index 303dde0..fab2c25 100644
    3245 --- a/drivers/s390/scsi/zfcp_cfdc.c
    3246 +++ b/drivers/s390/scsi/zfcp_cfdc.c
    3247 @@ -11,6 +11,7 @@
    3248 #define KMSG_COMPONENT "zfcp"
    3249 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
    3250
    3251 +#include <linux/compat.h>
    3252 #include <linux/slab.h>
    3253 #include <linux/types.h>
    3254 #include <linux/miscdevice.h>
    3255 diff --git a/drivers/scsi/osd/osd_uld.c b/drivers/scsi/osd/osd_uld.c
    3256 index b31a8e3..d4ed9eb 100644
    3257 --- a/drivers/scsi/osd/osd_uld.c
    3258 +++ b/drivers/scsi/osd/osd_uld.c
    3259 @@ -69,10 +69,10 @@
    3260 #ifndef SCSI_OSD_MAJOR
    3261 # define SCSI_OSD_MAJOR 260
    3262 #endif
    3263 -#define SCSI_OSD_MAX_MINOR 64
    3264 +#define SCSI_OSD_MAX_MINOR MINORMASK
    3265
    3266 static const char osd_name[] = "osd";
    3267 -static const char *osd_version_string = "open-osd 0.2.0";
    3268 +static const char *osd_version_string = "open-osd 0.2.1";
    3269
    3270 MODULE_AUTHOR("Boaz Harrosh <bharrosh@panasas.com>");
    3271 MODULE_DESCRIPTION("open-osd Upper-Layer-Driver osd.ko");
    3272 diff --git a/drivers/spi/spi-topcliff-pch.c b/drivers/spi/spi-topcliff-pch.c
    3273 index 6a80749..027b6d0 100644
    3274 --- a/drivers/spi/spi-topcliff-pch.c
    3275 +++ b/drivers/spi/spi-topcliff-pch.c
    3276 @@ -1717,7 +1717,7 @@ static int pch_spi_resume(struct pci_dev *pdev)
    3277
    3278 #endif
    3279
    3280 -static struct pci_driver pch_spi_pcidev = {
    3281 +static struct pci_driver pch_spi_pcidev_driver = {
    3282 .name = "pch_spi",
    3283 .id_table = pch_spi_pcidev_id,
    3284 .probe = pch_spi_probe,
    3285 @@ -1733,7 +1733,7 @@ static int __init pch_spi_init(void)
    3286 if (ret)
    3287 return ret;
    3288
    3289 - ret = pci_register_driver(&pch_spi_pcidev);
    3290 + ret = pci_register_driver(&pch_spi_pcidev_driver);
    3291 if (ret)
    3292 return ret;
    3293
    3294 @@ -1743,7 +1743,7 @@ module_init(pch_spi_init);
    3295
    3296 static void __exit pch_spi_exit(void)
    3297 {
    3298 - pci_unregister_driver(&pch_spi_pcidev);
    3299 + pci_unregister_driver(&pch_spi_pcidev_driver);
    3300 platform_driver_unregister(&pch_spi_pd_driver);
    3301 }
    3302 module_exit(pch_spi_exit);
    3303 diff --git a/drivers/staging/media/lirc/lirc_serial.c b/drivers/staging/media/lirc/lirc_serial.c
    3304 index 8a060a8..1501e4e 100644
    3305 --- a/drivers/staging/media/lirc/lirc_serial.c
    3306 +++ b/drivers/staging/media/lirc/lirc_serial.c
    3307 @@ -836,25 +836,22 @@ static int hardware_init_port(void)
    3308 return 0;
    3309 }
    3310
    3311 -static int init_port(void)
    3312 +static int __devinit lirc_serial_probe(struct platform_device *dev)
    3313 {
    3314 int i, nlow, nhigh, result;
    3315
    3316 result = request_irq(irq, irq_handler,
    3317 (share_irq ? IRQF_SHARED : 0),
    3318 LIRC_DRIVER_NAME, (void *)&hardware);
    3319 -
    3320 - switch (result) {
    3321 - case -EBUSY:
    3322 - printk(KERN_ERR LIRC_DRIVER_NAME ": IRQ %d busy\n", irq);
    3323 - return -EBUSY;
    3324 - case -EINVAL:
    3325 - printk(KERN_ERR LIRC_DRIVER_NAME
    3326 - ": Bad irq number or handler\n");
    3327 - return -EINVAL;
    3328 - default:
    3329 - break;
    3330 - };
    3331 + if (result < 0) {
    3332 + if (result == -EBUSY)
    3333 + printk(KERN_ERR LIRC_DRIVER_NAME ": IRQ %d busy\n",
    3334 + irq);
    3335 + else if (result == -EINVAL)
    3336 + printk(KERN_ERR LIRC_DRIVER_NAME
    3337 + ": Bad irq number or handler\n");
    3338 + return result;
    3339 + }
    3340
    3341 /* Reserve io region. */
    3342 /*
    3343 @@ -875,11 +872,14 @@ static int init_port(void)
    3344 ": or compile the serial port driver as module and\n");
    3345 printk(KERN_WARNING LIRC_DRIVER_NAME
    3346 ": make sure this module is loaded first\n");
    3347 - return -EBUSY;
    3348 + result = -EBUSY;
    3349 + goto exit_free_irq;
    3350 }
    3351
    3352 - if (hardware_init_port() < 0)
    3353 - return -EINVAL;
    3354 + if (hardware_init_port() < 0) {
    3355 + result = -EINVAL;
    3356 + goto exit_release_region;
    3357 + }
    3358
    3359 /* Initialize pulse/space widths */
    3360 init_timing_params(duty_cycle, freq);
    3361 @@ -911,6 +911,28 @@ static int init_port(void)
    3362
    3363 dprintk("Interrupt %d, port %04x obtained\n", irq, io);
    3364 return 0;
    3365 +
    3366 +exit_release_region:
    3367 + if (iommap != 0)
    3368 + release_mem_region(iommap, 8 << ioshift);
    3369 + else
    3370 + release_region(io, 8);
    3371 +exit_free_irq:
    3372 + free_irq(irq, (void *)&hardware);
    3373 +
    3374 + return result;
    3375 +}
    3376 +
    3377 +static int __devexit lirc_serial_remove(struct platform_device *dev)
    3378 +{
    3379 + free_irq(irq, (void *)&hardware);
    3380 +
    3381 + if (iommap != 0)
    3382 + release_mem_region(iommap, 8 << ioshift);
    3383 + else
    3384 + release_region(io, 8);
    3385 +
    3386 + return 0;
    3387 }
    3388
    3389 static int set_use_inc(void *data)
    3390 @@ -1076,16 +1098,6 @@ static struct lirc_driver driver = {
    3391
    3392 static struct platform_device *lirc_serial_dev;
    3393
    3394 -static int __devinit lirc_serial_probe(struct platform_device *dev)
    3395 -{
    3396 - return 0;
    3397 -}
    3398 -
    3399 -static int __devexit lirc_serial_remove(struct platform_device *dev)
    3400 -{
    3401 - return 0;
    3402 -}
    3403 -
    3404 static int lirc_serial_suspend(struct platform_device *dev,
    3405 pm_message_t state)
    3406 {
    3407 @@ -1112,10 +1124,8 @@ static int lirc_serial_resume(struct platform_device *dev)
    3408 {
    3409 unsigned long flags;
    3410
    3411 - if (hardware_init_port() < 0) {
    3412 - lirc_serial_exit();
    3413 + if (hardware_init_port() < 0)
    3414 return -EINVAL;
    3415 - }
    3416
    3417 spin_lock_irqsave(&hardware[type].lock, flags);
    3418 /* Enable Interrupt */
    3419 @@ -1188,10 +1198,6 @@ static int __init lirc_serial_init_module(void)
    3420 {
    3421 int result;
    3422
    3423 - result = lirc_serial_init();
    3424 - if (result)
    3425 - return result;
    3426 -
    3427 switch (type) {
    3428 case LIRC_HOMEBREW:
    3429 case LIRC_IRDEO:
    3430 @@ -1211,8 +1217,7 @@ static int __init lirc_serial_init_module(void)
    3431 break;
    3432 #endif
    3433 default:
    3434 - result = -EINVAL;
    3435 - goto exit_serial_exit;
    3436 + return -EINVAL;
    3437 }
    3438 if (!softcarrier) {
    3439 switch (type) {
    3440 @@ -1228,37 +1233,26 @@ static int __init lirc_serial_init_module(void)
    3441 }
    3442 }
    3443
    3444 - result = init_port();
    3445 - if (result < 0)
    3446 - goto exit_serial_exit;
    3447 + result = lirc_serial_init();
    3448 + if (result)
    3449 + return result;
    3450 +
    3451 driver.features = hardware[type].features;
    3452 driver.dev = &lirc_serial_dev->dev;
    3453 driver.minor = lirc_register_driver(&driver);
    3454 if (driver.minor < 0) {
    3455 printk(KERN_ERR LIRC_DRIVER_NAME
    3456 ": register_chrdev failed!\n");
    3457 - result = -EIO;
    3458 - goto exit_release;
    3459 + lirc_serial_exit();
    3460 + return -EIO;
    3461 }
    3462 return 0;
    3463 -exit_release:
    3464 - release_region(io, 8);
    3465 -exit_serial_exit:
    3466 - lirc_serial_exit();
    3467 - return result;
    3468 }
    3469
    3470 static void __exit lirc_serial_exit_module(void)
    3471 {
    3472 - lirc_serial_exit();
    3473 -
    3474 - free_irq(irq, (void *)&hardware);
    3475 -
    3476 - if (iommap != 0)
    3477 - release_mem_region(iommap, 8 << ioshift);
    3478 - else
    3479 - release_region(io, 8);
    3480 lirc_unregister_driver(driver.minor);
    3481 + lirc_serial_exit();
    3482 dprintk("cleaned up module\n");
    3483 }
    3484
    3485 diff --git a/drivers/tty/Kconfig b/drivers/tty/Kconfig
    3486 index b3d1741..830cd62 100644
    3487 --- a/drivers/tty/Kconfig
    3488 +++ b/drivers/tty/Kconfig
    3489 @@ -365,7 +365,7 @@ config PPC_EPAPR_HV_BYTECHAN
    3490
    3491 config PPC_EARLY_DEBUG_EHV_BC
    3492 bool "Early console (udbg) support for ePAPR hypervisors"
    3493 - depends on PPC_EPAPR_HV_BYTECHAN
    3494 + depends on PPC_EPAPR_HV_BYTECHAN=y
    3495 help
    3496 Select this option to enable early console (a.k.a. "udbg") support
    3497 via an ePAPR byte channel. You also need to choose the byte channel
    3498 diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c
    3499 index c56378c..7099c31 100644
    3500 --- a/drivers/video/omap2/dss/hdmi.c
    3501 +++ b/drivers/video/omap2/dss/hdmi.c
    3502 @@ -490,6 +490,7 @@ bool omapdss_hdmi_detect(void)
    3503
    3504 int omapdss_hdmi_display_enable(struct omap_dss_device *dssdev)
    3505 {
    3506 + struct omap_dss_hdmi_data *priv = dssdev->data;
    3507 int r = 0;
    3508
    3509 DSSDBG("ENTER hdmi_display_enable\n");
    3510 @@ -502,6 +503,8 @@ int omapdss_hdmi_display_enable(struct omap_dss_device *dssdev)
    3511 goto err0;
    3512 }
    3513
    3514 + hdmi.ip_data.hpd_gpio = priv->hpd_gpio;
    3515 +
    3516 r = omap_dss_start_device(dssdev);
    3517 if (r) {
    3518 DSSERR("failed to start device\n");
    3519 diff --git a/drivers/video/omap2/dss/ti_hdmi.h b/drivers/video/omap2/dss/ti_hdmi.h
    3520 index 2c3443d..ec337b5d 100644
    3521 --- a/drivers/video/omap2/dss/ti_hdmi.h
    3522 +++ b/drivers/video/omap2/dss/ti_hdmi.h
    3523 @@ -121,6 +121,10 @@ struct hdmi_ip_data {
    3524 const struct ti_hdmi_ip_ops *ops;
    3525 struct hdmi_config cfg;
    3526 struct hdmi_pll_info pll_data;
    3527 +
    3528 + /* ti_hdmi_4xxx_ip private data. These should be in a separate struct */
    3529 + int hpd_gpio;
    3530 + bool phy_tx_enabled;
    3531 };
    3532 int ti_hdmi_4xxx_phy_enable(struct hdmi_ip_data *ip_data);
    3533 void ti_hdmi_4xxx_phy_disable(struct hdmi_ip_data *ip_data);
    3534 diff --git a/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c b/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c
    3535 index e1a6ce5..aad48a1 100644
    3536 --- a/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c
    3537 +++ b/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c
    3538 @@ -28,6 +28,7 @@
    3539 #include <linux/delay.h>
    3540 #include <linux/string.h>
    3541 #include <linux/seq_file.h>
    3542 +#include <linux/gpio.h>
    3543
    3544 #include "ti_hdmi_4xxx_ip.h"
    3545 #include "dss.h"
    3546 @@ -223,6 +224,49 @@ void ti_hdmi_4xxx_pll_disable(struct hdmi_ip_data *ip_data)
    3547 hdmi_set_pll_pwr(ip_data, HDMI_PLLPWRCMD_ALLOFF);
    3548 }
    3549
    3550 +static int hdmi_check_hpd_state(struct hdmi_ip_data *ip_data)
    3551 +{
    3552 + unsigned long flags;
    3553 + bool hpd;
    3554 + int r;
    3555 + /* this should be in ti_hdmi_4xxx_ip private data */
    3556 + static DEFINE_SPINLOCK(phy_tx_lock);
    3557 +
    3558 + spin_lock_irqsave(&phy_tx_lock, flags);
    3559 +
    3560 + hpd = gpio_get_value(ip_data->hpd_gpio);
    3561 +
    3562 + if (hpd == ip_data->phy_tx_enabled) {
    3563 + spin_unlock_irqrestore(&phy_tx_lock, flags);
    3564 + return 0;
    3565 + }
    3566 +
    3567 + if (hpd)
    3568 + r = hdmi_set_phy_pwr(ip_data, HDMI_PHYPWRCMD_TXON);
    3569 + else
    3570 + r = hdmi_set_phy_pwr(ip_data, HDMI_PHYPWRCMD_LDOON);
    3571 +
    3572 + if (r) {
    3573 + DSSERR("Failed to %s PHY TX power\n",
    3574 + hpd ? "enable" : "disable");
    3575 + goto err;
    3576 + }
    3577 +
    3578 + ip_data->phy_tx_enabled = hpd;
    3579 +err:
    3580 + spin_unlock_irqrestore(&phy_tx_lock, flags);
    3581 + return r;
    3582 +}
    3583 +
    3584 +static irqreturn_t hpd_irq_handler(int irq, void *data)
    3585 +{
    3586 + struct hdmi_ip_data *ip_data = data;
    3587 +
    3588 + hdmi_check_hpd_state(ip_data);
    3589 +
    3590 + return IRQ_HANDLED;
    3591 +}
    3592 +
    3593 int ti_hdmi_4xxx_phy_enable(struct hdmi_ip_data *ip_data)
    3594 {
    3595 u16 r = 0;
    3596 @@ -232,10 +276,6 @@ int ti_hdmi_4xxx_phy_enable(struct hdmi_ip_data *ip_data)
    3597 if (r)
    3598 return r;
    3599
    3600 - r = hdmi_set_phy_pwr(ip_data, HDMI_PHYPWRCMD_TXON);
    3601 - if (r)
    3602 - return r;
    3603 -
    3604 /*
    3605 * Read address 0 in order to get the SCP reset done completed
    3606 * Dummy access performed to make sure reset is done
    3607 @@ -257,12 +297,32 @@ int ti_hdmi_4xxx_phy_enable(struct hdmi_ip_data *ip_data)
    3608 /* Write to phy address 3 to change the polarity control */
    3609 REG_FLD_MOD(phy_base, HDMI_TXPHY_PAD_CFG_CTRL, 0x1, 27, 27);
    3610
    3611 + r = request_threaded_irq(gpio_to_irq(ip_data->hpd_gpio),
    3612 + NULL, hpd_irq_handler,
    3613 + IRQF_DISABLED | IRQF_TRIGGER_RISING |
    3614 + IRQF_TRIGGER_FALLING, "hpd", ip_data);
    3615 + if (r) {
    3616 + DSSERR("HPD IRQ request failed\n");
    3617 + hdmi_set_phy_pwr(ip_data, HDMI_PHYPWRCMD_OFF);
    3618 + return r;
    3619 + }
    3620 +
    3621 + r = hdmi_check_hpd_state(ip_data);
    3622 + if (r) {
    3623 + free_irq(gpio_to_irq(ip_data->hpd_gpio), ip_data);
    3624 + hdmi_set_phy_pwr(ip_data, HDMI_PHYPWRCMD_OFF);
    3625 + return r;
    3626 + }
    3627 +
    3628 return 0;
    3629 }
    3630
    3631 void ti_hdmi_4xxx_phy_disable(struct hdmi_ip_data *ip_data)
    3632 {
    3633 + free_irq(gpio_to_irq(ip_data->hpd_gpio), ip_data);
    3634 +
    3635 hdmi_set_phy_pwr(ip_data, HDMI_PHYPWRCMD_OFF);
    3636 + ip_data->phy_tx_enabled = false;
    3637 }
    3638
    3639 static int hdmi_core_ddc_init(struct hdmi_ip_data *ip_data)
    3640 @@ -419,14 +479,7 @@ int ti_hdmi_4xxx_read_edid(struct hdmi_ip_data *ip_data,
    3641
    3642 bool ti_hdmi_4xxx_detect(struct hdmi_ip_data *ip_data)
    3643 {
    3644 - int r;
    3645 -
    3646 - void __iomem *base = hdmi_core_sys_base(ip_data);
    3647 -
    3648 - /* HPD */
    3649 - r = REG_GET(base, HDMI_CORE_SYS_SYS_STAT, 1, 1);
    3650 -
    3651 - return r == 1;
    3652 + return gpio_get_value(ip_data->hpd_gpio);
    3653 }
    3654
    3655 static void hdmi_core_init(struct hdmi_core_video_config *video_cfg,
    3656 diff --git a/drivers/video/via/hw.c b/drivers/video/via/hw.c
    3657 index d5aaca9..8497727 100644
    3658 --- a/drivers/video/via/hw.c
    3659 +++ b/drivers/video/via/hw.c
    3660 @@ -1810,7 +1810,11 @@ static void hw_init(void)
    3661 break;
    3662 }
    3663
    3664 + /* magic required on VX900 for correct modesetting on IGA1 */
    3665 + via_write_reg_mask(VIACR, 0x45, 0x00, 0x01);
    3666 +
    3667 /* probably this should go to the scaling code one day */
    3668 + via_write_reg_mask(VIACR, 0xFD, 0, 0x80); /* VX900 hw scale on IGA2 */
    3669 viafb_write_regx(scaling_parameters, ARRAY_SIZE(scaling_parameters));
    3670
    3671 /* Fill VPIT Parameters */
    3672 diff --git a/drivers/watchdog/hpwdt.c b/drivers/watchdog/hpwdt.c
    3673 index 8464ea1..3c166d3 100644
    3674 --- a/drivers/watchdog/hpwdt.c
    3675 +++ b/drivers/watchdog/hpwdt.c
    3676 @@ -231,7 +231,7 @@ static int __devinit cru_detect(unsigned long map_entry,
    3677
    3678 cmn_regs.u1.reax = CRU_BIOS_SIGNATURE_VALUE;
    3679
    3680 - set_memory_x((unsigned long)bios32_entrypoint, (2 * PAGE_SIZE));
    3681 + set_memory_x((unsigned long)bios32_map, 2);
    3682 asminline_call(&cmn_regs, bios32_entrypoint);
    3683
    3684 if (cmn_regs.u1.ral != 0) {
    3685 @@ -250,7 +250,8 @@ static int __devinit cru_detect(unsigned long map_entry,
    3686 cru_rom_addr =
    3687 ioremap(cru_physical_address, cru_length);
    3688 if (cru_rom_addr) {
    3689 - set_memory_x((unsigned long)cru_rom_addr, cru_length);
    3690 + set_memory_x((unsigned long)cru_rom_addr & PAGE_MASK,
    3691 + (cru_length + PAGE_SIZE - 1) >> PAGE_SHIFT);
    3692 retval = 0;
    3693 }
    3694 }
    3695 diff --git a/fs/aio.c b/fs/aio.c
    3696 index 969beb0..67e4b90 100644
    3697 --- a/fs/aio.c
    3698 +++ b/fs/aio.c
    3699 @@ -490,6 +490,8 @@ static void kiocb_batch_free(struct kioctx *ctx, struct kiocb_batch *batch)
    3700 kmem_cache_free(kiocb_cachep, req);
    3701 ctx->reqs_active--;
    3702 }
    3703 + if (unlikely(!ctx->reqs_active && ctx->dead))
    3704 + wake_up_all(&ctx->wait);
    3705 spin_unlock_irq(&ctx->ctx_lock);
    3706 }
    3707
    3708 diff --git a/fs/autofs4/autofs_i.h b/fs/autofs4/autofs_i.h
    3709 index 326dc08..308a98b 100644
    3710 --- a/fs/autofs4/autofs_i.h
    3711 +++ b/fs/autofs4/autofs_i.h
    3712 @@ -110,6 +110,7 @@ struct autofs_sb_info {
    3713 int sub_version;
    3714 int min_proto;
    3715 int max_proto;
    3716 + int compat_daemon;
    3717 unsigned long exp_timeout;
    3718 unsigned int type;
    3719 int reghost_enabled;
    3720 diff --git a/fs/autofs4/dev-ioctl.c b/fs/autofs4/dev-ioctl.c
    3721 index 509fe1e..56bac70 100644
    3722 --- a/fs/autofs4/dev-ioctl.c
    3723 +++ b/fs/autofs4/dev-ioctl.c
    3724 @@ -385,6 +385,7 @@ static int autofs_dev_ioctl_setpipefd(struct file *fp,
    3725 sbi->pipefd = pipefd;
    3726 sbi->pipe = pipe;
    3727 sbi->catatonic = 0;
    3728 + sbi->compat_daemon = is_compat_task();
    3729 }
    3730 out:
    3731 mutex_unlock(&sbi->wq_mutex);
    3732 diff --git a/fs/autofs4/inode.c b/fs/autofs4/inode.c
    3733 index 8179f1a..98a5695 100644
    3734 --- a/fs/autofs4/inode.c
    3735 +++ b/fs/autofs4/inode.c
    3736 @@ -19,6 +19,7 @@
    3737 #include <linux/parser.h>
    3738 #include <linux/bitops.h>
    3739 #include <linux/magic.h>
    3740 +#include <linux/compat.h>
    3741 #include "autofs_i.h"
    3742 #include <linux/module.h>
    3743
    3744 @@ -224,6 +225,7 @@ int autofs4_fill_super(struct super_block *s, void *data, int silent)
    3745 set_autofs_type_indirect(&sbi->type);
    3746 sbi->min_proto = 0;
    3747 sbi->max_proto = 0;
    3748 + sbi->compat_daemon = is_compat_task();
    3749 mutex_init(&sbi->wq_mutex);
    3750 spin_lock_init(&sbi->fs_lock);
    3751 sbi->queues = NULL;
    3752 diff --git a/fs/autofs4/waitq.c b/fs/autofs4/waitq.c
    3753 index e1fbdee..6861f61 100644
    3754 --- a/fs/autofs4/waitq.c
    3755 +++ b/fs/autofs4/waitq.c
    3756 @@ -90,7 +90,24 @@ static int autofs4_write(struct file *file, const void *addr, int bytes)
    3757
    3758 return (bytes > 0);
    3759 }
    3760 -
    3761 +
    3762 +/*
    3763 + * The autofs_v5 packet was misdesigned.
    3764 + *
    3765 + * The packets are identical on x86-32 and x86-64, but have different
    3766 + * alignment. Which means that 'sizeof()' will give different results.
    3767 + * Fix it up for the case of running 32-bit user mode on a 64-bit kernel.
    3768 + */
    3769 +static noinline size_t autofs_v5_packet_size(struct autofs_sb_info *sbi)
    3770 +{
    3771 + size_t pktsz = sizeof(struct autofs_v5_packet);
    3772 +#if defined(CONFIG_X86_64) && defined(CONFIG_COMPAT)
    3773 + if (sbi->compat_daemon > 0)
    3774 + pktsz -= 4;
    3775 +#endif
    3776 + return pktsz;
    3777 +}
    3778 +
    3779 static void autofs4_notify_daemon(struct autofs_sb_info *sbi,
    3780 struct autofs_wait_queue *wq,
    3781 int type)
    3782 @@ -147,8 +164,7 @@ static void autofs4_notify_daemon(struct autofs_sb_info *sbi,
    3783 {
    3784 struct autofs_v5_packet *packet = &pkt.v5_pkt.v5_packet;
    3785
    3786 - pktsz = sizeof(*packet);
    3787 -
    3788 + pktsz = autofs_v5_packet_size(sbi);
    3789 packet->wait_queue_token = wq->wait_queue_token;
    3790 packet->len = wq->name.len;
    3791 memcpy(packet->name, wq->name.name, wq->name.len);
    3792 diff --git a/fs/binfmt_elf.c b/fs/binfmt_elf.c
    3793 index 21ac5ee..6ff96c6 100644
    3794 --- a/fs/binfmt_elf.c
    3795 +++ b/fs/binfmt_elf.c
    3796 @@ -1421,7 +1421,7 @@ static int fill_thread_core_info(struct elf_thread_core_info *t,
    3797 for (i = 1; i < view->n; ++i) {
    3798 const struct user_regset *regset = &view->regsets[i];
    3799 do_thread_regset_writeback(t->task, regset);
    3800 - if (regset->core_note_type &&
    3801 + if (regset->core_note_type && regset->get &&
    3802 (!regset->active || regset->active(t->task, regset))) {
    3803 int ret;
    3804 size_t size = regset->n * regset->size;
    3805 diff --git a/fs/cifs/dir.c b/fs/cifs/dir.c
    3806 index e4c3334..bf68b4f 100644
    3807 --- a/fs/cifs/dir.c
    3808 +++ b/fs/cifs/dir.c
    3809 @@ -584,10 +584,26 @@ cifs_lookup(struct inode *parent_dir_inode, struct dentry *direntry,
    3810 * If either that or op not supported returned, follow
    3811 * the normal lookup.
    3812 */
    3813 - if ((rc == 0) || (rc == -ENOENT))
    3814 + switch (rc) {
    3815 + case 0:
    3816 + /*
    3817 + * The server may allow us to open things like
    3818 + * FIFOs, but the client isn't set up to deal
    3819 + * with that. If it's not a regular file, just
    3820 + * close it and proceed as if it were a normal
    3821 + * lookup.
    3822 + */
    3823 + if (newInode && !S_ISREG(newInode->i_mode)) {
    3824 + CIFSSMBClose(xid, pTcon, fileHandle);
    3825 + break;
    3826 + }
    3827 + case -ENOENT:
    3828 posix_open = true;
    3829 - else if ((rc == -EINVAL) || (rc != -EOPNOTSUPP))
    3830 + case -EOPNOTSUPP:
    3831 + break;
    3832 + default:
    3833 pTcon->broken_posix_open = true;
    3834 + }
    3835 }
    3836 if (!posix_open)
    3837 rc = cifs_get_inode_info_unix(&newInode, full_path,
    3838 diff --git a/include/linux/compat.h b/include/linux/compat.h
    3839 index 66ed067..d42bd48 100644
    3840 --- a/include/linux/compat.h
    3841 +++ b/include/linux/compat.h
    3842 @@ -561,5 +561,9 @@ asmlinkage ssize_t compat_sys_process_vm_writev(compat_pid_t pid,
    3843 unsigned long liovcnt, const struct compat_iovec __user *rvec,
    3844 unsigned long riovcnt, unsigned long flags);
    3845
    3846 +#else
    3847 +
    3848 +#define is_compat_task() (0)
    3849 +
    3850 #endif /* CONFIG_COMPAT */
    3851 #endif /* _LINUX_COMPAT_H */
    3852 diff --git a/include/linux/regset.h b/include/linux/regset.h
    3853 index 8abee65..686f373 100644
    3854 --- a/include/linux/regset.h
    3855 +++ b/include/linux/regset.h
    3856 @@ -335,8 +335,11 @@ static inline int copy_regset_to_user(struct task_struct *target,
    3857 {
    3858 const struct user_regset *regset = &view->regsets[setno];
    3859
    3860 + if (!regset->get)
    3861 + return -EOPNOTSUPP;
    3862 +
    3863 if (!access_ok(VERIFY_WRITE, data, size))
    3864 - return -EIO;
    3865 + return -EFAULT;
    3866
    3867 return regset->get(target, regset, offset, size, NULL, data);
    3868 }
    3869 @@ -358,8 +361,11 @@ static inline int copy_regset_from_user(struct task_struct *target,
    3870 {
    3871 const struct user_regset *regset = &view->regsets[setno];
    3872
    3873 + if (!regset->set)
    3874 + return -EOPNOTSUPP;
    3875 +
    3876 if (!access_ok(VERIFY_READ, data, size))
    3877 - return -EIO;
    3878 + return -EFAULT;
    3879
    3880 return regset->set(target, regset, offset, size, NULL, data);
    3881 }
    3882 diff --git a/include/video/omapdss.h b/include/video/omapdss.h
    3883 index 378c7ed..6582c45 100644
    3884 --- a/include/video/omapdss.h
    3885 +++ b/include/video/omapdss.h
    3886 @@ -575,6 +575,11 @@ struct omap_dss_device {
    3887 int (*get_backlight)(struct omap_dss_device *dssdev);
    3888 };
    3889
    3890 +struct omap_dss_hdmi_data
    3891 +{
    3892 + int hpd_gpio;
    3893 +};
    3894 +
    3895 struct omap_dss_driver {
    3896 struct device_driver driver;
    3897
    3898 diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c
    3899 index cf2d7ae..ae95cd2 100644
    3900 --- a/kernel/irq/manage.c
    3901 +++ b/kernel/irq/manage.c
    3902 @@ -985,6 +985,11 @@ __setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new)
    3903
    3904 /* add new interrupt at end of irq queue */
    3905 do {
    3906 + /*
    3907 + * Or all existing action->thread_mask bits,
    3908 + * so we can find the next zero bit for this
    3909 + * new action.
    3910 + */
    3911 thread_mask |= old->thread_mask;
    3912 old_ptr = &old->next;
    3913 old = *old_ptr;
    3914 @@ -993,14 +998,41 @@ __setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new)
    3915 }
    3916
    3917 /*
    3918 - * Setup the thread mask for this irqaction. Unlikely to have
    3919 - * 32 resp 64 irqs sharing one line, but who knows.
    3920 + * Setup the thread mask for this irqaction for ONESHOT. For
    3921 + * !ONESHOT irqs the thread mask is 0 so we can avoid a
    3922 + * conditional in irq_wake_thread().
    3923 */
    3924 - if (new->flags & IRQF_ONESHOT && thread_mask == ~0UL) {
    3925 - ret = -EBUSY;
    3926 - goto out_mask;
    3927 + if (new->flags & IRQF_ONESHOT) {
    3928 + /*
    3929 + * Unlikely to have 32 resp 64 irqs sharing one line,
    3930 + * but who knows.
    3931 + */
    3932 + if (thread_mask == ~0UL) {
    3933 + ret = -EBUSY;
    3934 + goto out_mask;
    3935 + }
    3936 + /*
    3937 + * The thread_mask for the action is or'ed to
    3938 + * desc->thread_active to indicate that the
    3939 + * IRQF_ONESHOT thread handler has been woken, but not
    3940 + * yet finished. The bit is cleared when a thread
    3941 + * completes. When all threads of a shared interrupt
    3942 + * line have completed desc->threads_active becomes
    3943 + * zero and the interrupt line is unmasked. See
    3944 + * handle.c:irq_wake_thread() for further information.
    3945 + *
    3946 + * If no thread is woken by primary (hard irq context)
    3947 + * interrupt handlers, then desc->threads_active is
    3948 + * also checked for zero to unmask the irq line in the
    3949 + * affected hard irq flow handlers
    3950 + * (handle_[fasteoi|level]_irq).
    3951 + *
    3952 + * The new action gets the first zero bit of
    3953 + * thread_mask assigned. See the loop above which or's
    3954 + * all existing action->thread_mask bits.
    3955 + */
    3956 + new->thread_mask = 1 << ffz(thread_mask);
    3957 }
    3958 - new->thread_mask = 1 << ffz(thread_mask);
    3959
    3960 if (!shared) {
    3961 init_waitqueue_head(&desc->wait_for_threads);
    3962 diff --git a/kernel/kprobes.c b/kernel/kprobes.c
    3963 index faa39d1..bc90b87 100644
    3964 --- a/kernel/kprobes.c
    3965 +++ b/kernel/kprobes.c
    3966 @@ -1334,8 +1334,10 @@ int __kprobes register_kprobe(struct kprobe *p)
    3967 if (!kernel_text_address((unsigned long) p->addr) ||
    3968 in_kprobes_functions((unsigned long) p->addr) ||
    3969 ftrace_text_reserved(p->addr, p->addr) ||
    3970 - jump_label_text_reserved(p->addr, p->addr))
    3971 - goto fail_with_jump_label;
    3972 + jump_label_text_reserved(p->addr, p->addr)) {
    3973 + ret = -EINVAL;
    3974 + goto cannot_probe;
    3975 + }
    3976
    3977 /* User can pass only KPROBE_FLAG_DISABLED to register_kprobe */
    3978 p->flags &= KPROBE_FLAG_DISABLED;
    3979 @@ -1352,7 +1354,7 @@ int __kprobes register_kprobe(struct kprobe *p)
    3980 * its code to prohibit unexpected unloading.
    3981 */
    3982 if (unlikely(!try_module_get(probed_mod)))
    3983 - goto fail_with_jump_label;
    3984 + goto cannot_probe;
    3985
    3986 /*
    3987 * If the module freed .init.text, we couldn't insert
    3988 @@ -1361,7 +1363,7 @@ int __kprobes register_kprobe(struct kprobe *p)
    3989 if (within_module_init((unsigned long)p->addr, probed_mod) &&
    3990 probed_mod->state != MODULE_STATE_COMING) {
    3991 module_put(probed_mod);
    3992 - goto fail_with_jump_label;
    3993 + goto cannot_probe;
    3994 }
    3995 /* ret will be updated by following code */
    3996 }
    3997 @@ -1409,7 +1411,7 @@ out:
    3998
    3999 return ret;
    4000
    4001 -fail_with_jump_label:
    4002 +cannot_probe:
    4003 preempt_enable();
    4004 jump_label_unlock();
    4005 return ret;
    4006 diff --git a/mm/huge_memory.c b/mm/huge_memory.c
    4007 index 33141f5..8f005e9 100644
    4008 --- a/mm/huge_memory.c
    4009 +++ b/mm/huge_memory.c
    4010 @@ -642,6 +642,7 @@ static int __do_huge_pmd_anonymous_page(struct mm_struct *mm,
    4011 set_pmd_at(mm, haddr, pmd, entry);
    4012 prepare_pmd_huge_pte(pgtable, mm);
    4013 add_mm_counter(mm, MM_ANONPAGES, HPAGE_PMD_NR);
    4014 + mm->nr_ptes++;
    4015 spin_unlock(&mm->page_table_lock);
    4016 }
    4017
    4018 @@ -760,6 +761,7 @@ int copy_huge_pmd(struct mm_struct *dst_mm, struct mm_struct *src_mm,
    4019 pmd = pmd_mkold(pmd_wrprotect(pmd));
    4020 set_pmd_at(dst_mm, addr, dst_pmd, pmd);
    4021 prepare_pmd_huge_pte(pgtable, dst_mm);
    4022 + dst_mm->nr_ptes++;
    4023
    4024 ret = 0;
    4025 out_unlock:
    4026 @@ -858,7 +860,6 @@ static int do_huge_pmd_wp_page_fallback(struct mm_struct *mm,
    4027 }
    4028 kfree(pages);
    4029
    4030 - mm->nr_ptes++;
    4031 smp_wmb(); /* make pte visible before pmd */
    4032 pmd_populate(mm, pmd, pgtable);
    4033 page_remove_rmap(page);
    4034 @@ -1017,6 +1018,7 @@ int zap_huge_pmd(struct mmu_gather *tlb, struct vm_area_struct *vma,
    4035 VM_BUG_ON(page_mapcount(page) < 0);
    4036 add_mm_counter(tlb->mm, MM_ANONPAGES, -HPAGE_PMD_NR);
    4037 VM_BUG_ON(!PageHead(page));
    4038 + tlb->mm->nr_ptes--;
    4039 spin_unlock(&tlb->mm->page_table_lock);
    4040 tlb_remove_page(tlb, page);
    4041 pte_free(tlb->mm, pgtable);
    4042 @@ -1356,7 +1358,6 @@ static int __split_huge_page_map(struct page *page,
    4043 pte_unmap(pte);
    4044 }
    4045
    4046 - mm->nr_ptes++;
    4047 smp_wmb(); /* make pte visible before pmd */
    4048 /*
    4049 * Up to this point the pmd is present and huge and
    4050 @@ -1969,7 +1970,6 @@ static void collapse_huge_page(struct mm_struct *mm,
    4051 set_pmd_at(mm, address, pmd, _pmd);
    4052 update_mmu_cache(vma, address, _pmd);
    4053 prepare_pmd_huge_pte(pgtable, mm);
    4054 - mm->nr_ptes--;
    4055 spin_unlock(&mm->page_table_lock);
    4056
    4057 #ifndef CONFIG_NUMA
    4058 diff --git a/mm/memcontrol.c b/mm/memcontrol.c
    4059 index f538e9b..de67e91 100644
    4060 --- a/mm/memcontrol.c
    4061 +++ b/mm/memcontrol.c
    4062 @@ -4502,6 +4502,9 @@ static void mem_cgroup_usage_unregister_event(struct cgroup *cgrp,
    4063 */
    4064 BUG_ON(!thresholds);
    4065
    4066 + if (!thresholds->primary)
    4067 + goto unlock;
    4068 +
    4069 usage = mem_cgroup_usage(memcg, type == _MEMSWAP);
    4070
    4071 /* Check if a threshold crossed before removing */
    4072 @@ -4550,7 +4553,7 @@ swap_buffers:
    4073
    4074 /* To be sure that nobody uses thresholds */
    4075 synchronize_rcu();
    4076 -
    4077 +unlock:
    4078 mutex_unlock(&memcg->thresholds_lock);
    4079 }
    4080
    4081 diff --git a/mm/nommu.c b/mm/nommu.c
    4082 index ee7e57e..f59e170 100644
    4083 --- a/mm/nommu.c
    4084 +++ b/mm/nommu.c
    4085 @@ -779,8 +779,6 @@ static void delete_vma_from_mm(struct vm_area_struct *vma)
    4086
    4087 if (vma->vm_next)
    4088 vma->vm_next->vm_prev = vma->vm_prev;
    4089 -
    4090 - vma->vm_mm = NULL;
    4091 }
    4092
    4093 /*
    4094 diff --git a/net/mac80211/rate.c b/net/mac80211/rate.c
    4095 index 5a5a776..7d84b87 100644
    4096 --- a/net/mac80211/rate.c
    4097 +++ b/net/mac80211/rate.c
    4098 @@ -344,7 +344,7 @@ void rate_control_get_rate(struct ieee80211_sub_if_data *sdata,
    4099 for (i = 0; i < IEEE80211_TX_MAX_RATES; i++) {
    4100 info->control.rates[i].idx = -1;
    4101 info->control.rates[i].flags = 0;
    4102 - info->control.rates[i].count = 1;
    4103 + info->control.rates[i].count = 0;
    4104 }
    4105
    4106 if (sdata->local->hw.flags & IEEE80211_HW_HAS_RATE_CONTROL)
    4107 diff --git a/sound/pci/hda/hda_codec.c b/sound/pci/hda/hda_codec.c
    4108 index 05c8768..f3be54e 100644
    4109 --- a/sound/pci/hda/hda_codec.c
    4110 +++ b/sound/pci/hda/hda_codec.c
    4111 @@ -1795,7 +1795,11 @@ static void put_vol_mute(struct hda_codec *codec, struct hda_amp_info *info,
    4112 parm = ch ? AC_AMP_SET_RIGHT : AC_AMP_SET_LEFT;
    4113 parm |= direction == HDA_OUTPUT ? AC_AMP_SET_OUTPUT : AC_AMP_SET_INPUT;
    4114 parm |= index << AC_AMP_SET_INDEX_SHIFT;
    4115 - parm |= val;
    4116 + if ((val & HDA_AMP_MUTE) && !(info->amp_caps & AC_AMPCAP_MUTE) &&
    4117 + (info->amp_caps & AC_AMPCAP_MIN_MUTE))
    4118 + ; /* set the zero value as a fake mute */
    4119 + else
    4120 + parm |= val;
    4121 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_AMP_GAIN_MUTE, parm);
    4122 info->vol[ch] = val;
    4123 }
    4124 @@ -2062,7 +2066,7 @@ int snd_hda_mixer_amp_tlv(struct snd_kcontrol *kcontrol, int op_flag,
    4125 val1 = -((caps & AC_AMPCAP_OFFSET) >> AC_AMPCAP_OFFSET_SHIFT);
    4126 val1 += ofs;
    4127 val1 = ((int)val1) * ((int)val2);
    4128 - if (min_mute)
    4129 + if (min_mute || (caps & AC_AMPCAP_MIN_MUTE))
    4130 val2 |= TLV_DB_SCALE_MUTE;
    4131 if (put_user(SNDRV_CTL_TLVT_DB_SCALE, _tlv))
    4132 return -EFAULT;
    4133 diff --git a/sound/pci/hda/hda_codec.h b/sound/pci/hda/hda_codec.h
    4134 index 5644711..71f6744 100644
    4135 --- a/sound/pci/hda/hda_codec.h
    4136 +++ b/sound/pci/hda/hda_codec.h
    4137 @@ -298,6 +298,9 @@ enum {
    4138 #define AC_AMPCAP_MUTE (1<<31) /* mute capable */
    4139 #define AC_AMPCAP_MUTE_SHIFT 31
    4140
    4141 +/* driver-specific amp-caps: using bits 24-30 */
    4142 +#define AC_AMPCAP_MIN_MUTE (1 << 30) /* min-volume = mute */
    4143 +
    4144 /* Connection list */
    4145 #define AC_CLIST_LENGTH (0x7f<<0)
    4146 #define AC_CLIST_LONG (1<<7)
    4147 diff --git a/sound/pci/hda/patch_conexant.c b/sound/pci/hda/patch_conexant.c
    4148 index 08bad5b..ae94929 100644
    4149 --- a/sound/pci/hda/patch_conexant.c
    4150 +++ b/sound/pci/hda/patch_conexant.c
    4151 @@ -4132,7 +4132,8 @@ static int cx_auto_add_volume_idx(struct hda_codec *codec, const char *basename,
    4152 err = snd_hda_ctl_add(codec, nid, kctl);
    4153 if (err < 0)
    4154 return err;
    4155 - if (!(query_amp_caps(codec, nid, hda_dir) & AC_AMPCAP_MUTE))
    4156 + if (!(query_amp_caps(codec, nid, hda_dir) &
    4157 + (AC_AMPCAP_MUTE | AC_AMPCAP_MIN_MUTE)))
    4158 break;
    4159 }
    4160 return 0;
    4161 @@ -4425,6 +4426,22 @@ static const struct snd_pci_quirk cxt_fixups[] = {
    4162 {}
    4163 };
    4164
    4165 +/* add "fake" mute amp-caps to DACs on cx5051 so that mixer mute switches
    4166 + * can be created (bko#42825)
    4167 + */
    4168 +static void add_cx5051_fake_mutes(struct hda_codec *codec)
    4169 +{
    4170 + static hda_nid_t out_nids[] = {
    4171 + 0x10, 0x11, 0
    4172 + };
    4173 + hda_nid_t *p;
    4174 +
    4175 + for (p = out_nids; *p; p++)
    4176 + snd_hda_override_amp_caps(codec, *p, HDA_OUTPUT,
    4177 + AC_AMPCAP_MIN_MUTE |
    4178 + query_amp_caps(codec, *p, HDA_OUTPUT));
    4179 +}
    4180 +
    4181 static int patch_conexant_auto(struct hda_codec *codec)
    4182 {
    4183 struct conexant_spec *spec;
    4184 @@ -4443,6 +4460,9 @@ static int patch_conexant_auto(struct hda_codec *codec)
    4185 case 0x14f15045:
    4186 spec->single_adc_amp = 1;
    4187 break;
    4188 + case 0x14f15051:
    4189 + add_cx5051_fake_mutes(codec);
    4190 + break;
    4191 }
    4192
    4193 apply_pin_fixup(codec, cxt_fixups, cxt_pincfg_tbl);
    4194 diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c
    4195 index c4c8d78..3d8fbf4 100644
    4196 --- a/sound/pci/hda/patch_realtek.c
    4197 +++ b/sound/pci/hda/patch_realtek.c
    4198 @@ -3695,7 +3695,7 @@ static void alc_auto_init_input_src(struct hda_codec *codec)
    4199 else
    4200 nums = spec->num_adc_nids;
    4201 for (c = 0; c < nums; c++)
    4202 - alc_mux_select(codec, 0, spec->cur_mux[c], true);
    4203 + alc_mux_select(codec, c, spec->cur_mux[c], true);
    4204 }
    4205
    4206 /* add mic boosts if needed */
    4207 diff --git a/sound/pci/hda/patch_sigmatel.c b/sound/pci/hda/patch_sigmatel.c
    4208 index ccdac27..ed67698 100644
    4209 --- a/sound/pci/hda/patch_sigmatel.c
    4210 +++ b/sound/pci/hda/patch_sigmatel.c
    4211 @@ -4719,7 +4719,7 @@ static void stac92xx_hp_detect(struct hda_codec *codec)
    4212 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
    4213 if (no_hp_sensing(spec, i))
    4214 continue;
    4215 - if (presence)
    4216 + if (1 /*presence*/)
    4217 stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
    4218 #if 0 /* FIXME */
    4219 /* Resetting the pinctl like below may lead to (a sort of) regressions
    4220 diff --git a/sound/soc/imx/imx-ssi.c b/sound/soc/imx/imx-ssi.c
    4221 index 4c05e2b..971eaf0 100644
    4222 --- a/sound/soc/imx/imx-ssi.c
    4223 +++ b/sound/soc/imx/imx-ssi.c
    4224 @@ -112,7 +112,7 @@ static int imx_ssi_set_dai_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt)
    4225 break;
    4226 case SND_SOC_DAIFMT_DSP_A:
    4227 /* data on rising edge of bclk, frame high 1clk before data */
    4228 - strcr |= SSI_STCR_TFSL | SSI_STCR_TEFS;
    4229 + strcr |= SSI_STCR_TFSL | SSI_STCR_TXBIT0 | SSI_STCR_TEFS;
    4230 break;
    4231 }
    4232
    4233 diff --git a/sound/soc/soc-dapm.c b/sound/soc/soc-dapm.c
    4234 index f42e8b9..ea909c5 100644
    4235 --- a/sound/soc/soc-dapm.c
    4236 +++ b/sound/soc/soc-dapm.c
    4237 @@ -2982,9 +2982,13 @@ static void soc_dapm_shutdown_codec(struct snd_soc_dapm_context *dapm)
    4238 * standby.
    4239 */
    4240 if (powerdown) {
    4241 - snd_soc_dapm_set_bias_level(dapm, SND_SOC_BIAS_PREPARE);
    4242 + if (dapm->bias_level == SND_SOC_BIAS_ON)
    4243 + snd_soc_dapm_set_bias_level(dapm,
    4244 + SND_SOC_BIAS_PREPARE);
    4245 dapm_seq_run(dapm, &down_list, 0, false);
    4246 - snd_soc_dapm_set_bias_level(dapm, SND_SOC_BIAS_STANDBY);
    4247 + if (dapm->bias_level == SND_SOC_BIAS_PREPARE)
    4248 + snd_soc_dapm_set_bias_level(dapm,
    4249 + SND_SOC_BIAS_STANDBY);
    4250 }
    4251 }
    4252
    4253 @@ -2997,7 +3001,9 @@ void snd_soc_dapm_shutdown(struct snd_soc_card *card)
    4254
    4255 list_for_each_entry(codec, &card->codec_dev_list, list) {
    4256 soc_dapm_shutdown_codec(&codec->dapm);
    4257 - snd_soc_dapm_set_bias_level(&codec->dapm, SND_SOC_BIAS_OFF);
    4258 + if (codec->dapm.bias_level == SND_SOC_BIAS_STANDBY)
    4259 + snd_soc_dapm_set_bias_level(&codec->dapm,
    4260 + SND_SOC_BIAS_OFF);
    4261 }
    4262 }
    4263