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    Annotation of /trunk/kernel-magellan/patches-4.11/0105-4.11.6-all-fixes.patch

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    Revision 2945 - (hide annotations) (download)
    Mon Jun 19 08:32:13 2017 UTC (6 years, 10 months ago) by niro
    File size: 17606 byte(s) 
    -linux-4.11.6
    1 niro 2945 diff --git a/Makefile b/Makefile
    2     index 5b3a81d3262e..e46e99cbe5d1 100644
    3     --- a/Makefile
    4     +++ b/Makefile
    5     @@ -1,6 +1,6 @@
    6     VERSION = 4
    7     PATCHLEVEL = 11
    8     -SUBLEVEL = 5
    9     +SUBLEVEL = 6
    10     EXTRAVERSION =
    11     NAME = Fearless Coyote
    12    
    13     diff --git a/arch/s390/kernel/entry.S b/arch/s390/kernel/entry.S
    14     index f3920d684b0e..61d945297449 100644
    15     --- a/arch/s390/kernel/entry.S
    16     +++ b/arch/s390/kernel/entry.S
    17     @@ -233,12 +233,17 @@ ENTRY(sie64a)
    18     lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
    19     .Lsie_done:
    20     # some program checks are suppressing. C code (e.g. do_protection_exception)
    21     -# will rewind the PSW by the ILC, which is 4 bytes in case of SIE. Other
    22     -# instructions between sie64a and .Lsie_done should not cause program
    23     -# interrupts. So lets use a nop (47 00 00 00) as a landing pad.
    24     +# will rewind the PSW by the ILC, which is often 4 bytes in case of SIE. There
    25     +# are some corner cases (e.g. runtime instrumentation) where ILC is unpredictable.
    26     +# Other instructions between sie64a and .Lsie_done should not cause program
    27     +# interrupts. So lets use 3 nops as a landing pad for all possible rewinds.
    28     # See also .Lcleanup_sie
    29     -.Lrewind_pad:
    30     - nop 0
    31     +.Lrewind_pad6:
    32     + nopr 7
    33     +.Lrewind_pad4:
    34     + nopr 7
    35     +.Lrewind_pad2:
    36     + nopr 7
    37     .globl sie_exit
    38     sie_exit:
    39     lg %r14,__SF_EMPTY+8(%r15) # load guest register save area
    40     @@ -251,7 +256,9 @@ sie_exit:
    41     stg %r14,__SF_EMPTY+16(%r15) # set exit reason code
    42     j sie_exit
    43    
    44     - EX_TABLE(.Lrewind_pad,.Lsie_fault)
    45     + EX_TABLE(.Lrewind_pad6,.Lsie_fault)
    46     + EX_TABLE(.Lrewind_pad4,.Lsie_fault)
    47     + EX_TABLE(.Lrewind_pad2,.Lsie_fault)
    48     EX_TABLE(sie_exit,.Lsie_fault)
    49     EXPORT_SYMBOL(sie64a)
    50     EXPORT_SYMBOL(sie_exit)
    51     diff --git a/arch/x86/platform/efi/efi-bgrt.c b/arch/x86/platform/efi/efi-bgrt.c
    52     index 8bf27323f7a3..b58233e4ed71 100644
    53     --- a/arch/x86/platform/efi/efi-bgrt.c
    54     +++ b/arch/x86/platform/efi/efi-bgrt.c
    55     @@ -27,6 +27,26 @@ struct bmp_header {
    56     u32 size;
    57     } __packed;
    58    
    59     +static bool efi_bgrt_addr_valid(u64 addr)
    60     +{
    61     + efi_memory_desc_t *md;
    62     +
    63     + for_each_efi_memory_desc(md) {
    64     + u64 size;
    65     + u64 end;
    66     +
    67     + if (md->type != EFI_BOOT_SERVICES_DATA)
    68     + continue;
    69     +
    70     + size = md->num_pages << EFI_PAGE_SHIFT;
    71     + end = md->phys_addr + size;
    72     + if (addr >= md->phys_addr && addr < end)
    73     + return true;
    74     + }
    75     +
    76     + return false;
    77     +}
    78     +
    79     void __init efi_bgrt_init(struct acpi_table_header *table)
    80     {
    81     void *image;
    82     @@ -36,7 +56,7 @@ void __init efi_bgrt_init(struct acpi_table_header *table)
    83     if (acpi_disabled)
    84     return;
    85    
    86     - if (!efi_enabled(EFI_BOOT))
    87     + if (!efi_enabled(EFI_MEMMAP))
    88     return;
    89    
    90     if (table->length < sizeof(bgrt_tab)) {
    91     @@ -65,6 +85,10 @@ void __init efi_bgrt_init(struct acpi_table_header *table)
    92     goto out;
    93     }
    94    
    95     + if (!efi_bgrt_addr_valid(bgrt->image_address)) {
    96     + pr_notice("Ignoring BGRT: invalid image address\n");
    97     + goto out;
    98     + }
    99     image = early_memremap(bgrt->image_address, sizeof(bmp_header));
    100     if (!image) {
    101     pr_notice("Ignoring BGRT: failed to map image header memory\n");
    102     diff --git a/arch/xtensa/include/asm/irq.h b/arch/xtensa/include/asm/irq.h
    103     index f71f88ea7646..19707db966f1 100644
    104     --- a/arch/xtensa/include/asm/irq.h
    105     +++ b/arch/xtensa/include/asm/irq.h
    106     @@ -29,7 +29,8 @@ static inline void variant_irq_disable(unsigned int irq) { }
    107     # define PLATFORM_NR_IRQS 0
    108     #endif
    109     #define XTENSA_NR_IRQS XCHAL_NUM_INTERRUPTS
    110     -#define NR_IRQS (XTENSA_NR_IRQS + VARIANT_NR_IRQS + PLATFORM_NR_IRQS)
    111     +#define NR_IRQS (XTENSA_NR_IRQS + VARIANT_NR_IRQS + PLATFORM_NR_IRQS + 1)
    112     +#define XTENSA_PIC_LINUX_IRQ(hwirq) ((hwirq) + 1)
    113    
    114     #if VARIANT_NR_IRQS == 0
    115     static inline void variant_init_irq(void) { }
    116     diff --git a/arch/xtensa/kernel/irq.c b/arch/xtensa/kernel/irq.c
    117     index a265edd6ac37..99341028cc77 100644
    118     --- a/arch/xtensa/kernel/irq.c
    119     +++ b/arch/xtensa/kernel/irq.c
    120     @@ -34,11 +34,6 @@ asmlinkage void do_IRQ(int hwirq, struct pt_regs *regs)
    121     {
    122     int irq = irq_find_mapping(NULL, hwirq);
    123    
    124     - if (hwirq >= NR_IRQS) {
    125     - printk(KERN_EMERG "%s: cannot handle IRQ %d\n",
    126     - __func__, hwirq);
    127     - }
    128     -
    129     #ifdef CONFIG_DEBUG_STACKOVERFLOW
    130     /* Debugging check for stack overflow: is there less than 1KB free? */
    131     {
    132     diff --git a/arch/xtensa/platforms/xtfpga/include/platform/hardware.h b/arch/xtensa/platforms/xtfpga/include/platform/hardware.h
    133     index dbeea2b440a1..1fda7e20dfcb 100644
    134     --- a/arch/xtensa/platforms/xtfpga/include/platform/hardware.h
    135     +++ b/arch/xtensa/platforms/xtfpga/include/platform/hardware.h
    136     @@ -24,16 +24,18 @@
    137    
    138     /* Interrupt configuration. */
    139    
    140     -#define PLATFORM_NR_IRQS 10
    141     +#define PLATFORM_NR_IRQS 0
    142    
    143     /* Default assignment of LX60 devices to external interrupts. */
    144    
    145     #ifdef CONFIG_XTENSA_MX
    146     #define DUART16552_INTNUM XCHAL_EXTINT3_NUM
    147     #define OETH_IRQ XCHAL_EXTINT4_NUM
    148     +#define C67X00_IRQ XCHAL_EXTINT8_NUM
    149     #else
    150     #define DUART16552_INTNUM XCHAL_EXTINT0_NUM
    151     #define OETH_IRQ XCHAL_EXTINT1_NUM
    152     +#define C67X00_IRQ XCHAL_EXTINT5_NUM
    153     #endif
    154    
    155     /*
    156     @@ -63,5 +65,5 @@
    157    
    158     #define C67X00_PADDR (XCHAL_KIO_PADDR + 0x0D0D0000)
    159     #define C67X00_SIZE 0x10
    160     -#define C67X00_IRQ 5
    161     +
    162     #endif /* __XTENSA_XTAVNET_HARDWARE_H */
    163     diff --git a/arch/xtensa/platforms/xtfpga/setup.c b/arch/xtensa/platforms/xtfpga/setup.c
    164     index 779be723eb2b..42285f35d313 100644
    165     --- a/arch/xtensa/platforms/xtfpga/setup.c
    166     +++ b/arch/xtensa/platforms/xtfpga/setup.c
    167     @@ -175,8 +175,8 @@ static struct resource ethoc_res[] = {
    168     .flags = IORESOURCE_MEM,
    169     },
    170     [2] = { /* IRQ number */
    171     - .start = OETH_IRQ,
    172     - .end = OETH_IRQ,
    173     + .start = XTENSA_PIC_LINUX_IRQ(OETH_IRQ),
    174     + .end = XTENSA_PIC_LINUX_IRQ(OETH_IRQ),
    175     .flags = IORESOURCE_IRQ,
    176     },
    177     };
    178     @@ -213,8 +213,8 @@ static struct resource c67x00_res[] = {
    179     .flags = IORESOURCE_MEM,
    180     },
    181     [1] = { /* IRQ number */
    182     - .start = C67X00_IRQ,
    183     - .end = C67X00_IRQ,
    184     + .start = XTENSA_PIC_LINUX_IRQ(C67X00_IRQ),
    185     + .end = XTENSA_PIC_LINUX_IRQ(C67X00_IRQ),
    186     .flags = IORESOURCE_IRQ,
    187     },
    188     };
    189     @@ -247,7 +247,7 @@ static struct resource serial_resource = {
    190     static struct plat_serial8250_port serial_platform_data[] = {
    191     [0] = {
    192     .mapbase = DUART16552_PADDR,
    193     - .irq = DUART16552_INTNUM,
    194     + .irq = XTENSA_PIC_LINUX_IRQ(DUART16552_INTNUM),
    195     .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
    196     UPF_IOREMAP,
    197     .iotype = XCHAL_HAVE_BE ? UPIO_MEM32BE : UPIO_MEM32,
    198     diff --git a/block/partitions/msdos.c b/block/partitions/msdos.c
    199     index 93e7c1b32edd..5610cd537da7 100644
    200     --- a/block/partitions/msdos.c
    201     +++ b/block/partitions/msdos.c
    202     @@ -300,6 +300,8 @@ static void parse_bsd(struct parsed_partitions *state,
    203     continue;
    204     bsd_start = le32_to_cpu(p->p_offset);
    205     bsd_size = le32_to_cpu(p->p_size);
    206     + if (memcmp(flavour, "bsd\0", 4) == 0)
    207     + bsd_start += offset;
    208     if (offset == bsd_start && size == bsd_size)
    209     /* full parent partition, we have it already */
    210     continue;
    211     diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
    212     index 66dbb3c4c6d8..edacd31ae1a1 100644
    213     --- a/drivers/gpu/drm/i915/i915_drv.c
    214     +++ b/drivers/gpu/drm/i915/i915_drv.c
    215     @@ -1206,6 +1206,15 @@ int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent)
    216     goto out_free_priv;
    217    
    218     pci_set_drvdata(pdev, &dev_priv->drm);
    219     + /*
    220     + * Disable the system suspend direct complete optimization, which can
    221     + * leave the device suspended skipping the driver's suspend handlers
    222     + * if the device was already runtime suspended. This is needed due to
    223     + * the difference in our runtime and system suspend sequence and
    224     + * becaue the HDA driver may require us to enable the audio power
    225     + * domain during system suspend.
    226     + */
    227     + pdev->dev_flags |= PCI_DEV_FLAGS_NEEDS_RESUME;
    228    
    229     ret = i915_driver_init_early(dev_priv, ent);
    230     if (ret < 0)
    231     @@ -1243,10 +1252,6 @@ int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent)
    232    
    233     dev_priv->ipc_enabled = false;
    234    
    235     - /* Everything is in place, we can now relax! */
    236     - DRM_INFO("Initialized %s %d.%d.%d %s for %s on minor %d\n",
    237     - driver.name, driver.major, driver.minor, driver.patchlevel,
    238     - driver.date, pci_name(pdev), dev_priv->drm.primary->index);
    239     if (IS_ENABLED(CONFIG_DRM_I915_DEBUG))
    240     DRM_INFO("DRM_I915_DEBUG enabled\n");
    241     if (IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM))
    242     diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
    243     index 96e45a4d5441..6eb83684b97b 100644
    244     --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
    245     +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
    246     @@ -755,10 +755,6 @@ static bool gen8_ppgtt_clear_pt(struct i915_address_space *vm,
    247     GEM_BUG_ON(pte_end > GEN8_PTES);
    248    
    249     bitmap_clear(pt->used_ptes, pte, num_entries);
    250     - if (USES_FULL_PPGTT(vm->i915)) {
    251     - if (bitmap_empty(pt->used_ptes, GEN8_PTES))
    252     - return true;
    253     - }
    254    
    255     pt_vaddr = kmap_px(pt);
    256    
    257     @@ -798,9 +794,6 @@ static bool gen8_ppgtt_clear_pd(struct i915_address_space *vm,
    258     }
    259     }
    260    
    261     - if (bitmap_empty(pd->used_pdes, I915_PDES))
    262     - return true;
    263     -
    264     return false;
    265     }
    266    
    267     @@ -829,9 +822,6 @@ static bool gen8_ppgtt_clear_pdp(struct i915_address_space *vm,
    268    
    269     mark_tlbs_dirty(ppgtt);
    270    
    271     - if (bitmap_empty(pdp->used_pdpes, I915_PDPES_PER_PDP(dev_priv)))
    272     - return true;
    273     -
    274     return false;
    275     }
    276    
    277     @@ -3292,7 +3282,8 @@ void i915_ggtt_enable_guc(struct drm_i915_private *i915)
    278    
    279     void i915_ggtt_disable_guc(struct drm_i915_private *i915)
    280     {
    281     - i915->ggtt.invalidate = gen6_ggtt_invalidate;
    282     + if (i915->ggtt.invalidate == guc_ggtt_invalidate)
    283     + i915->ggtt.invalidate = gen6_ggtt_invalidate;
    284     }
    285    
    286     void i915_gem_restore_gtt_mappings(struct drm_i915_private *dev_priv)
    287     diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
    288     index 9bbbd4e83e3c..9bfe9520e7a8 100644
    289     --- a/drivers/gpu/drm/i915/i915_pci.c
    290     +++ b/drivers/gpu/drm/i915/i915_pci.c
    291     @@ -389,7 +389,6 @@ static const struct intel_device_info intel_skylake_gt3_info = {
    292     .has_hw_contexts = 1, \
    293     .has_logical_ring_contexts = 1, \
    294     .has_guc = 1, \
    295     - .has_decoupled_mmio = 1, \
    296     .has_aliasing_ppgtt = 1, \
    297     .has_full_ppgtt = 1, \
    298     .has_full_48bit_ppgtt = 1, \
    299     diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
    300     index ed1f4f272b4f..5370dbec7a7d 100644
    301     --- a/drivers/gpu/drm/i915/intel_display.c
    302     +++ b/drivers/gpu/drm/i915/intel_display.c
    303     @@ -13808,6 +13808,15 @@ static void update_scanline_offset(struct intel_crtc *crtc)
    304     * type. For DP ports it behaves like most other platforms, but on HDMI
    305     * there's an extra 1 line difference. So we need to add two instead of
    306     * one to the value.
    307     + *
    308     + * On VLV/CHV DSI the scanline counter would appear to increment
    309     + * approx. 1/3 of a scanline before start of vblank. Unfortunately
    310     + * that means we can't tell whether we're in vblank or not while
    311     + * we're on that particular line. We must still set scanline_offset
    312     + * to 1 so that the vblank timestamps come out correct when we query
    313     + * the scanline counter from within the vblank interrupt handler.
    314     + * However if queried just before the start of vblank we'll get an
    315     + * answer that's slightly in the future.
    316     */
    317     if (IS_GEN2(dev_priv)) {
    318     const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
    319     diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c
    320     index 89fe5c8464df..96414399bed7 100644
    321     --- a/drivers/gpu/drm/i915/intel_fbc.c
    322     +++ b/drivers/gpu/drm/i915/intel_fbc.c
    323     @@ -82,20 +82,10 @@ static unsigned int get_crtc_fence_y_offset(struct intel_crtc *crtc)
    324     static void intel_fbc_get_plane_source_size(struct intel_fbc_state_cache *cache,
    325     int *width, int *height)
    326     {
    327     - int w, h;
    328     -
    329     - if (drm_rotation_90_or_270(cache->plane.rotation)) {
    330     - w = cache->plane.src_h;
    331     - h = cache->plane.src_w;
    332     - } else {
    333     - w = cache->plane.src_w;
    334     - h = cache->plane.src_h;
    335     - }
    336     -
    337     if (width)
    338     - *width = w;
    339     + *width = cache->plane.src_w;
    340     if (height)
    341     - *height = h;
    342     + *height = cache->plane.src_h;
    343     }
    344    
    345     static int intel_fbc_calculate_cfb_size(struct drm_i915_private *dev_priv,
    346     @@ -747,6 +737,11 @@ static void intel_fbc_update_state_cache(struct intel_crtc *crtc,
    347     ilk_pipe_pixel_rate(crtc_state);
    348    
    349     cache->plane.rotation = plane_state->base.rotation;
    350     + /*
    351     + * Src coordinates are already rotated by 270 degrees for
    352     + * the 90/270 degree plane rotation cases (to match the
    353     + * GTT mapping), hence no need to account for rotation here.
    354     + */
    355     cache->plane.src_w = drm_rect_width(&plane_state->base.src) >> 16;
    356     cache->plane.src_h = drm_rect_height(&plane_state->base.src) >> 16;
    357     cache->plane.visible = plane_state->base.visible;
    358     diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
    359     index 6a29784d2b41..5132e0cdc684 100644
    360     --- a/drivers/gpu/drm/i915/intel_pm.c
    361     +++ b/drivers/gpu/drm/i915/intel_pm.c
    362     @@ -4140,11 +4140,19 @@ skl_compute_wm(struct drm_atomic_state *state)
    363     struct drm_crtc_state *cstate;
    364     struct intel_atomic_state *intel_state = to_intel_atomic_state(state);
    365     struct skl_wm_values *results = &intel_state->wm_results;
    366     + struct drm_device *dev = state->dev;
    367     struct skl_pipe_wm *pipe_wm;
    368     bool changed = false;
    369     int ret, i;
    370    
    371     /*
    372     + * When we distrust bios wm we always need to recompute to set the
    373     + * expected DDB allocations for each CRTC.
    374     + */
    375     + if (to_i915(dev)->wm.distrust_bios_wm)
    376     + changed = true;
    377     +
    378     + /*
    379     * If this transaction isn't actually touching any CRTC's, don't
    380     * bother with watermark calculation. Note that if we pass this
    381     * test, we're guaranteed to hold at least one CRTC state mutex,
    382     @@ -4154,6 +4162,7 @@ skl_compute_wm(struct drm_atomic_state *state)
    383     */
    384     for_each_crtc_in_state(state, crtc, cstate, i)
    385     changed = true;
    386     +
    387     if (!changed)
    388     return 0;
    389    
    390     diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
    391     index 9481ca9a3ae7..59d792b127b9 100644
    392     --- a/drivers/gpu/drm/i915/intel_sprite.c
    393     +++ b/drivers/gpu/drm/i915/intel_sprite.c
    394     @@ -81,10 +81,13 @@ int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,
    395     */
    396     void intel_pipe_update_start(struct intel_crtc *crtc)
    397     {
    398     + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
    399     const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
    400     long timeout = msecs_to_jiffies_timeout(1);
    401     int scanline, min, max, vblank_start;
    402     wait_queue_head_t *wq = drm_crtc_vblank_waitqueue(&crtc->base);
    403     + bool need_vlv_dsi_wa = (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) &&
    404     + intel_crtc_has_type(crtc->config, INTEL_OUTPUT_DSI);
    405     DEFINE_WAIT(wait);
    406    
    407     vblank_start = adjusted_mode->crtc_vblank_start;
    408     @@ -136,6 +139,24 @@ void intel_pipe_update_start(struct intel_crtc *crtc)
    409    
    410     drm_crtc_vblank_put(&crtc->base);
    411    
    412     + /*
    413     + * On VLV/CHV DSI the scanline counter would appear to
    414     + * increment approx. 1/3 of a scanline before start of vblank.
    415     + * The registers still get latched at start of vblank however.
    416     + * This means we must not write any registers on the first
    417     + * line of vblank (since not the whole line is actually in
    418     + * vblank). And unfortunately we can't use the interrupt to
    419     + * wait here since it will fire too soon. We could use the
    420     + * frame start interrupt instead since it will fire after the
    421     + * critical scanline, but that would require more changes
    422     + * in the interrupt code. So for now we'll just do the nasty
    423     + * thing and poll for the bad scanline to pass us by.
    424     + *
    425     + * FIXME figure out if BXT+ DSI suffers from this as well
    426     + */
    427     + while (need_vlv_dsi_wa && scanline == vblank_start)
    428     + scanline = intel_get_crtc_scanline(crtc);
    429     +
    430     crtc->debug.scanline_start = scanline;
    431     crtc->debug.start_vbl_time = ktime_get();
    432     crtc->debug.start_vbl_count = intel_crtc_get_vblank_counter(crtc);
    433     diff --git a/drivers/irqchip/irq-xtensa-mx.c b/drivers/irqchip/irq-xtensa-mx.c
    434     index bb3ac5fe5846..72a391e01011 100644
    435     --- a/drivers/irqchip/irq-xtensa-mx.c
    436     +++ b/drivers/irqchip/irq-xtensa-mx.c
    437     @@ -142,7 +142,7 @@ static struct irq_chip xtensa_mx_irq_chip = {
    438     int __init xtensa_mx_init_legacy(struct device_node *interrupt_parent)
    439     {
    440     struct irq_domain *root_domain =
    441     - irq_domain_add_legacy(NULL, NR_IRQS, 0, 0,
    442     + irq_domain_add_legacy(NULL, NR_IRQS - 1, 1, 0,
    443     &xtensa_mx_irq_domain_ops,
    444     &xtensa_mx_irq_chip);
    445     irq_set_default_host(root_domain);
    446     diff --git a/drivers/irqchip/irq-xtensa-pic.c b/drivers/irqchip/irq-xtensa-pic.c
    447     index 472ae1770964..f728755fa292 100644
    448     --- a/drivers/irqchip/irq-xtensa-pic.c
    449     +++ b/drivers/irqchip/irq-xtensa-pic.c
    450     @@ -89,7 +89,7 @@ static struct irq_chip xtensa_irq_chip = {
    451     int __init xtensa_pic_init_legacy(struct device_node *interrupt_parent)
    452     {
    453     struct irq_domain *root_domain =
    454     - irq_domain_add_legacy(NULL, NR_IRQS, 0, 0,
    455     + irq_domain_add_legacy(NULL, NR_IRQS - 1, 1, 0,
    456     &xtensa_irq_domain_ops, &xtensa_irq_chip);
    457     irq_set_default_host(root_domain);
    458     return 0;
    459     diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
    460     index d35c0162f9f2..0f6f9a97a81c 100644
    461     --- a/drivers/pci/pci.c
    462     +++ b/drivers/pci/pci.c
    463     @@ -2142,7 +2142,8 @@ bool pci_dev_keep_suspended(struct pci_dev *pci_dev)
    464    
    465     if (!pm_runtime_suspended(dev)
    466     || pci_target_state(pci_dev) != pci_dev->current_state
    467     - || platform_pci_need_resume(pci_dev))
    468     + || platform_pci_need_resume(pci_dev)
    469     + || (pci_dev->dev_flags & PCI_DEV_FLAGS_NEEDS_RESUME))
    470     return false;
    471    
    472     /*
    473     diff --git a/include/linux/pci.h b/include/linux/pci.h
    474     index eb3da1a04e6c..b2d5580cd9e2 100644
    475     --- a/include/linux/pci.h
    476     +++ b/include/linux/pci.h
    477     @@ -178,6 +178,11 @@ enum pci_dev_flags {
    478     PCI_DEV_FLAGS_NO_PM_RESET = (__force pci_dev_flags_t) (1 << 7),
    479     /* Get VPD from function 0 VPD */
    480     PCI_DEV_FLAGS_VPD_REF_F0 = (__force pci_dev_flags_t) (1 << 8),
    481     + /*
    482     + * Resume before calling the driver's system suspend hooks, disabling
    483     + * the direct_complete optimization.
    484     + */
    485     + PCI_DEV_FLAGS_NEEDS_RESUME = (__force pci_dev_flags_t) (1 << 11),
    486     };
    487    
    488     enum pci_irq_reroute_variant {