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    Contents of /trunk/kernel26-alx/patches-2.6.23-r1/0112-2.6.23.13-all-fixes.patch

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    Revision 658 - (show annotations) (download)
    Mon Jun 23 21:39:39 2008 UTC (15 years, 10 months ago) by niro
    File size: 2059 byte(s) 
    2.6.23-alx-r1: new default as we fix the via epia clocksource=tsc quircks
-linux-2.6.23.17
-fbcondecor-0.9.4
-squashfs-3.3
-unionfs-2.3.3
-ipw3945-1.2.2
-mptbase-vmware fix
    1 diff --git a/drivers/hwmon/w83627ehf.c b/drivers/hwmon/w83627ehf.c
    2 index d9a9ec7..bfd8828 100644
    3 --- a/drivers/hwmon/w83627ehf.c
    4 +++ b/drivers/hwmon/w83627ehf.c
    5 @@ -1276,23 +1276,31 @@ static int __devinit w83627ehf_probe(struct platform_device *pdev)
    6
    7 data->vrm = vid_which_vrm();
    8 superio_enter(sio_data->sioreg);
    9 - /* Set VID input sensibility if needed. In theory the BIOS should
    10 - have set it, but in practice it's not always the case. */
    11 - en_vrm10 = superio_inb(sio_data->sioreg, SIO_REG_EN_VRM10);
    12 - if ((en_vrm10 & 0x08) && data->vrm != 100) {
    13 - dev_warn(dev, "Setting VID input voltage to TTL\n");
    14 - superio_outb(sio_data->sioreg, SIO_REG_EN_VRM10,
    15 - en_vrm10 & ~0x08);
    16 - } else if (!(en_vrm10 & 0x08) && data->vrm == 100) {
    17 - dev_warn(dev, "Setting VID input voltage to VRM10\n");
    18 - superio_outb(sio_data->sioreg, SIO_REG_EN_VRM10,
    19 - en_vrm10 | 0x08);
    20 - }
    21 /* Read VID value */
    22 superio_select(sio_data->sioreg, W83627EHF_LD_HWM);
    23 - if (superio_inb(sio_data->sioreg, SIO_REG_VID_CTRL) & 0x80)
    24 + if (superio_inb(sio_data->sioreg, SIO_REG_VID_CTRL) & 0x80) {
    25 + /* Set VID input sensibility if needed. In theory the BIOS
    26 + should have set it, but in practice it's not always the
    27 + case. We only do it for the W83627EHF/EHG because the
    28 + W83627DHG is more complex in this respect. */
    29 + if (sio_data->kind == w83627ehf) {
    30 + en_vrm10 = superio_inb(sio_data->sioreg,
    31 + SIO_REG_EN_VRM10);
    32 + if ((en_vrm10 & 0x08) && data->vrm == 90) {
    33 + dev_warn(dev, "Setting VID input voltage to "
    34 + "TTL\n");
    35 + superio_outb(sio_data->sioreg, SIO_REG_EN_VRM10,
    36 + en_vrm10 & ~0x08);
    37 + } else if (!(en_vrm10 & 0x08) && data->vrm == 100) {
    38 + dev_warn(dev, "Setting VID input voltage to "
    39 + "VRM10\n");
    40 + superio_outb(sio_data->sioreg, SIO_REG_EN_VRM10,
    41 + en_vrm10 | 0x08);
    42 + }
    43 + }
    44 +
    45 data->vid = superio_inb(sio_data->sioreg, SIO_REG_VID_DATA) & 0x3f;
    46 - else {
    47 + } else {
    48 dev_info(dev, "VID pins in output mode, CPU VID not "
    49 "available\n");
    50 data->vid = 0x3f;