Annotation of /trunk/kernel26-magellan/patches-2.6.16-r12/0122-2.6.16.12-mips-gcc34.patch
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Mon Jun 5 09:25:38 2006 UTC (18 years, 3 months ago) by niro
File size: 2757 byte(s)
Mon Jun 5 09:25:38 2006 UTC (18 years, 3 months ago) by niro
File size: 2757 byte(s)
ver bump to 2.6.16-r12: - updated to linux-2.6.16.19 - updated to ck11
1 | niro | 72 | From: Ralf Baechle <ralf@linux-mips.org> |
2 | Date: Wed, 26 Apr 2006 23:00:02 +0000 (+0100) | ||
3 | Subject: [PATCH] MIPS: R2 build fixes for gcc < 3.4. | ||
4 | X-Git-Url: http://www.kernel.org/git/?p=linux/kernel/git/stable/linux-2.6.16.y.git;a=commitdiff;h=ce0bd8e0b232fdf2da9390ad280286f45c5f3a89 | ||
5 | |||
6 | [PATCH] MIPS: R2 build fixes for gcc < 3.4. | ||
7 | |||
8 | Signed-off-by: Ralf Baechle <ralf@linux-mips.org> | ||
9 | Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> | ||
10 | --- | ||
11 | |||
12 | --- a/include/asm-mips/bitops.h | ||
13 | +++ b/include/asm-mips/bitops.h | ||
14 | @@ -654,7 +654,12 @@ static inline unsigned long fls(unsigned | ||
15 | { | ||
16 | #ifdef CONFIG_32BIT | ||
17 | #ifdef CONFIG_CPU_MIPS32 | ||
18 | - __asm__ ("clz %0, %1" : "=r" (word) : "r" (word)); | ||
19 | + __asm__ ( | ||
20 | + " .set mips32 \n" | ||
21 | + " clz %0, %1 \n" | ||
22 | + " .set mips0 \n" | ||
23 | + : "=r" (word) | ||
24 | + : "r" (word)); | ||
25 | |||
26 | return 32 - word; | ||
27 | #else | ||
28 | @@ -678,7 +683,12 @@ static inline unsigned long fls(unsigned | ||
29 | #ifdef CONFIG_64BIT | ||
30 | #ifdef CONFIG_CPU_MIPS64 | ||
31 | |||
32 | - __asm__ ("dclz %0, %1" : "=r" (word) : "r" (word)); | ||
33 | + __asm__ ( | ||
34 | + " .set mips64 \n" | ||
35 | + " dclz %0, %1 \n" | ||
36 | + " .set mips0 \n" | ||
37 | + : "=r" (word) | ||
38 | + : "r" (word)); | ||
39 | |||
40 | return 64 - word; | ||
41 | #else | ||
42 | --- a/include/asm-mips/byteorder.h | ||
43 | +++ b/include/asm-mips/byteorder.h | ||
44 | @@ -19,7 +19,9 @@ | ||
45 | static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x) | ||
46 | { | ||
47 | __asm__( | ||
48 | + " .set mips32r2 \n" | ||
49 | " wsbh %0, %1 \n" | ||
50 | + " .set mips0 \n" | ||
51 | : "=r" (x) | ||
52 | : "r" (x)); | ||
53 | |||
54 | @@ -30,8 +32,10 @@ static __inline__ __attribute_const__ __ | ||
55 | static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x) | ||
56 | { | ||
57 | __asm__( | ||
58 | + " .set mips32r2 \n" | ||
59 | " wsbh %0, %1 \n" | ||
60 | " rotr %0, %0, 16 \n" | ||
61 | + " .set mips0 \n" | ||
62 | : "=r" (x) | ||
63 | : "r" (x)); | ||
64 | |||
65 | --- a/include/asm-mips/interrupt.h | ||
66 | +++ b/include/asm-mips/interrupt.h | ||
67 | @@ -20,7 +20,9 @@ __asm__ ( | ||
68 | " .set reorder \n" | ||
69 | " .set noat \n" | ||
70 | #ifdef CONFIG_CPU_MIPSR2 | ||
71 | + " .set mips32r2 \n" | ||
72 | " ei \n" | ||
73 | + " .set mips0 \n" | ||
74 | #else | ||
75 | " mfc0 $1,$12 \n" | ||
76 | " ori $1,0x1f \n" | ||
77 | @@ -63,7 +65,9 @@ __asm__ ( | ||
78 | " .set push \n" | ||
79 | " .set noat \n" | ||
80 | #ifdef CONFIG_CPU_MIPSR2 | ||
81 | + " .set mips32r2 \n" | ||
82 | " di \n" | ||
83 | + " .set mips0 \n" | ||
84 | #else | ||
85 | " mfc0 $1,$12 \n" | ||
86 | " ori $1,0x1f \n" | ||
87 | @@ -103,8 +107,10 @@ __asm__ ( | ||
88 | " .set reorder \n" | ||
89 | " .set noat \n" | ||
90 | #ifdef CONFIG_CPU_MIPSR2 | ||
91 | + " .set mips32r2 \n" | ||
92 | " di \\result \n" | ||
93 | " andi \\result, 1 \n" | ||
94 | + " .set mips0 \n" | ||
95 | #else | ||
96 | " mfc0 \\result, $12 \n" | ||
97 | " ori $1, \\result, 0x1f \n" | ||
98 | @@ -133,9 +139,11 @@ __asm__ ( | ||
99 | * Slow, but doesn't suffer from a relativly unlikely race | ||
100 | * condition we're having since days 1. | ||
101 | */ | ||
102 | + " .set mips32r2 \n" | ||
103 | " beqz \\flags, 1f \n" | ||
104 | " di \n" | ||
105 | " ei \n" | ||
106 | + " .set mips0 \n" | ||
107 | "1: \n" | ||
108 | #elif defined(CONFIG_CPU_MIPSR2) | ||
109 | /* |