mesa/patches/mesa-6.5.2-i965-wine-fix.patch

--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -599,6 +599,7 @@ struct brw_context 
 
    struct {
       struct brw_wm_prog_data *prog_data;
+      struct brw_wm_compile *compile_data;
 
       /* Input sizes, calculated from active vertex program:
        */
diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c
index 3e2f2d0..0f842d2 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.c
+++ b/src/mesa/drivers/dri/i965/brw_wm.c
@@ -138,64 +138,75 @@ static void do_wm_prog( struct brw_conte
 			struct brw_fragment_program *fp, 
 			struct brw_wm_prog_key *key)
 {
-   struct brw_wm_compile c;
+   struct brw_wm_compile *c;
    const GLuint *program;
    GLuint program_size;
 
-   memset(&c, 0, sizeof(c));
-   memcpy(&c.key, key, sizeof(*key));
+   c = brw->wm.compile_data;
+   if (c == NULL) {
+     brw->wm.compile_data = calloc(1, sizeof(*brw->wm.compile_data));
+     c = brw->wm.compile_data;
+   } else {
+     memset(c, 0, sizeof(*brw->wm.compile_data));
+   }
+   memcpy(&c->key, key, sizeof(*key));
 
-   c.fp = fp;
-   c.env_param = brw->intel.ctx.FragmentProgram.Parameters;
+   c->fp = fp;
+   c->env_param = brw->intel.ctx.FragmentProgram.Parameters;
 
 
    /* Augment fragment program.  Add instructions for pre- and
     * post-fragment-program tasks such as interpolation and fogging.
     */
-   brw_wm_pass_fp(&c);
+   brw_wm_pass_fp(c);
    
    /* Translate to intermediate representation.  Build register usage
     * chains.
     */
-   brw_wm_pass0(&c);
+   brw_wm_pass0(c);
 
    /* Dead code removal.
     */
-   brw_wm_pass1(&c);
+   brw_wm_pass1(c);
 
    /* Hal optimization
     */
-   brw_wm_pass_hal (&c);
+   brw_wm_pass_hal (c);
    
    /* Register allocation.
     */
-   c.grf_limit = BRW_WM_MAX_GRF/2;
+   c->grf_limit = BRW_WM_MAX_GRF/2;
 
    /* This is where we start emitting gen4 code:
     */
-   brw_init_compile(&c.func);    
+   brw_init_compile(&c->func);    
 
-   brw_wm_pass2(&c);
+   brw_wm_pass2(c);
 
-   c.prog_data.total_grf = c.max_wm_grf;
-   c.prog_data.total_scratch = c.last_scratch ? c.last_scratch + 0x40 : 0;
+   c->prog_data.total_grf = c->max_wm_grf;
+   if (c->last_scratch) {
+      c->prog_data.total_scratch =
+	 c->last_scratch + 0x40;
+   } else {
+      c->prog_data.total_scratch = 0;
+   }
 
    /* Emit GEN4 code.
     */
-   brw_wm_emit(&c);
+   brw_wm_emit(c);
 
    /* get the program
     */
-   program = brw_get_program(&c.func, &program_size);
+   program = brw_get_program(&c->func, &program_size);
 
    /*
     */
    brw->wm.prog_gs_offset = brw_upload_cache( &brw->cache[BRW_WM_PROG],
-					      &c.key,
-					      sizeof(c.key),
+					      &c->key,
+					      sizeof(c->key),
 					      program,
 					      program_size,
-					      &c.prog_data,
+					      &c->prog_data,
 					      &brw->wm.prog_data );
 }

1	niro	153	--- a/src/mesa/drivers/dri/i965/brw_context.h
2			+++ b/src/mesa/drivers/dri/i965/brw_context.h
3			@@ -599,6 +599,7 @@ struct brw_context
4
5			struct {
6			struct brw_wm_prog_data *prog_data;
7			+ struct brw_wm_compile *compile_data;
8
9			/* Input sizes, calculated from active vertex program:
10			*/
11			diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c
12			index 3e2f2d0..0f842d2 100644
13			--- a/src/mesa/drivers/dri/i965/brw_wm.c
14			+++ b/src/mesa/drivers/dri/i965/brw_wm.c
15			@@ -138,64 +138,75 @@ static void do_wm_prog( struct brw_conte
16			struct brw_fragment_program *fp,
17			struct brw_wm_prog_key *key)
18			{
19			- struct brw_wm_compile c;
20			+ struct brw_wm_compile *c;
21			const GLuint *program;
22			GLuint program_size;
23
24			- memset(&c, 0, sizeof(c));
25			- memcpy(&c.key, key, sizeof(*key));
26			+ c = brw->wm.compile_data;
27			+ if (c == NULL) {
28			+ brw->wm.compile_data = calloc(1, sizeof(*brw->wm.compile_data));
29			+ c = brw->wm.compile_data;
30			+ } else {
31			+ memset(c, 0, sizeof(*brw->wm.compile_data));
32			+ }
33			+ memcpy(&c->key, key, sizeof(*key));
34
35			- c.fp = fp;
36			- c.env_param = brw->intel.ctx.FragmentProgram.Parameters;
37			+ c->fp = fp;
38			+ c->env_param = brw->intel.ctx.FragmentProgram.Parameters;
39
40
41			/* Augment fragment program. Add instructions for pre- and
42			* post-fragment-program tasks such as interpolation and fogging.
43			*/
44			- brw_wm_pass_fp(&c);
45			+ brw_wm_pass_fp(c);
46
47			/* Translate to intermediate representation. Build register usage
48			* chains.
49			*/
50			- brw_wm_pass0(&c);
51			+ brw_wm_pass0(c);
52
53			/* Dead code removal.
54			*/
55			- brw_wm_pass1(&c);
56			+ brw_wm_pass1(c);
57
58			/* Hal optimization
59			*/
60			- brw_wm_pass_hal (&c);
61			+ brw_wm_pass_hal (c);
62
63			/* Register allocation.
64			*/
65			- c.grf_limit = BRW_WM_MAX_GRF/2;
66			+ c->grf_limit = BRW_WM_MAX_GRF/2;
67
68			/* This is where we start emitting gen4 code:
69			*/
70			- brw_init_compile(&c.func);
71			+ brw_init_compile(&c->func);
72
73			- brw_wm_pass2(&c);
74			+ brw_wm_pass2(c);
75
76			- c.prog_data.total_grf = c.max_wm_grf;
77			- c.prog_data.total_scratch = c.last_scratch ? c.last_scratch + 0x40 : 0;
78			+ c->prog_data.total_grf = c->max_wm_grf;
79			+ if (c->last_scratch) {
80			+ c->prog_data.total_scratch =
81			+ c->last_scratch + 0x40;
82			+ } else {
83			+ c->prog_data.total_scratch = 0;
84			+ }
85
86			/* Emit GEN4 code.
87			*/
88			- brw_wm_emit(&c);
89			+ brw_wm_emit(c);
90
91			/* get the program
92			*/
93			- program = brw_get_program(&c.func, &program_size);
94			+ program = brw_get_program(&c->func, &program_size);
95
96			/*
97			*/
98			brw->wm.prog_gs_offset = brw_upload_cache( &brw->cache[BRW_WM_PROG],
99			- &c.key,
100			- sizeof(c.key),
101			+ &c->key,
102			+ sizeof(c->key),
103			program,
104			program_size,
105			- &c.prog_data,
106			+ &c->prog_data,
107			&brw->wm.prog_data );
108			}
109