Contents of /trunk/xorg-old/patches-6.9.0-r1/5350_all_4.3.99.902-ia64-hp-nv-memory-barrier.patch
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Revision 167 -
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Tue May 8 20:58:51 2007 UTC (17 years, 4 months ago) by niro
File size: 3883 byte(s)
Tue May 8 20:58:51 2007 UTC (17 years, 4 months ago) by niro
File size: 3883 byte(s)
-import
1 | This patch fixes various MCAs (Machine Check Architecture) on Hewlett |
2 | Packard Itanium 2 platforms by adding memory barriers where needed. |
3 | |
4 | Mike A. Harris <mharris@redhat.com> |
5 | |
6 | diff -urN xc.orig/programs/Xserver/hw/xfree86/drivers/nv/nv_setup.c xc/programs/Xserver/hw/xfree86/drivers/nv/nv_setup.c |
7 | --- xc.orig/programs/Xserver/hw/xfree86/drivers/nv/nv_setup.c 2004-01-05 00:33:55.000000000 -0500 |
8 | +++ xc/programs/Xserver/hw/xfree86/drivers/nv/nv_setup.c 2004-01-05 00:39:32.000000000 -0500 |
9 | @@ -49,11 +49,13 @@ |
10 | NVPtr pNv = (NVPtr)pVga->MMIOBase; |
11 | VGA_WR08(pNv->PCIO, pVga->IOBase + VGA_CRTC_INDEX_OFFSET, index); |
12 | VGA_WR08(pNv->PCIO, pVga->IOBase + VGA_CRTC_DATA_OFFSET, value); |
13 | + write_mem_barrier(); |
14 | } |
15 | static CARD8 NVReadCrtc(vgaHWPtr pVga, CARD8 index) |
16 | { |
17 | NVPtr pNv = (NVPtr)pVga->MMIOBase; |
18 | VGA_WR08(pNv->PCIO, pVga->IOBase + VGA_CRTC_INDEX_OFFSET, index); |
19 | + write_mem_barrier(); |
20 | return (VGA_RD08(pNv->PCIO, pVga->IOBase + VGA_CRTC_DATA_OFFSET)); |
21 | } |
22 | static void NVWriteGr(vgaHWPtr pVga, CARD8 index, CARD8 value) |
23 | @@ -61,11 +63,13 @@ |
24 | NVPtr pNv = (NVPtr)pVga->MMIOBase; |
25 | VGA_WR08(pNv->PVIO, VGA_GRAPH_INDEX, index); |
26 | VGA_WR08(pNv->PVIO, VGA_GRAPH_DATA, value); |
27 | + write_mem_barrier(); |
28 | } |
29 | static CARD8 NVReadGr(vgaHWPtr pVga, CARD8 index) |
30 | { |
31 | NVPtr pNv = (NVPtr)pVga->MMIOBase; |
32 | VGA_WR08(pNv->PVIO, VGA_GRAPH_INDEX, index); |
33 | + write_mem_barrier(); |
34 | return (VGA_RD08(pNv->PVIO, VGA_GRAPH_DATA)); |
35 | } |
36 | static void NVWriteSeq(vgaHWPtr pVga, CARD8 index, CARD8 value) |
37 | @@ -73,11 +77,16 @@ |
38 | NVPtr pNv = (NVPtr)pVga->MMIOBase; |
39 | VGA_WR08(pNv->PVIO, VGA_SEQ_INDEX, index); |
40 | VGA_WR08(pNv->PVIO, VGA_SEQ_DATA, value); |
41 | + write_mem_barrier(); |
42 | +#if defined(linux) && defined(__ia64__) |
43 | + usleep(250); |
44 | +#endif |
45 | } |
46 | static CARD8 NVReadSeq(vgaHWPtr pVga, CARD8 index) |
47 | { |
48 | NVPtr pNv = (NVPtr)pVga->MMIOBase; |
49 | VGA_WR08(pNv->PVIO, VGA_SEQ_INDEX, index); |
50 | + write_mem_barrier(); |
51 | return (VGA_RD08(pNv->PVIO, VGA_SEQ_DATA)); |
52 | } |
53 | static void NVWriteAttr(vgaHWPtr pVga, CARD8 index, CARD8 value) |
54 | @@ -92,6 +101,7 @@ |
55 | index |= 0x20; |
56 | VGA_WR08(pNv->PCIO, VGA_ATTR_INDEX, index); |
57 | VGA_WR08(pNv->PCIO, VGA_ATTR_DATA_W, value); |
58 | + write_mem_barrier(); |
59 | } |
60 | static CARD8 NVReadAttr(vgaHWPtr pVga, CARD8 index) |
61 | { |
62 | @@ -104,12 +114,14 @@ |
63 | else |
64 | index |= 0x20; |
65 | VGA_WR08(pNv->PCIO, VGA_ATTR_INDEX, index); |
66 | + write_mem_barrier(); |
67 | return (VGA_RD08(pNv->PCIO, VGA_ATTR_DATA_R)); |
68 | } |
69 | static void NVWriteMiscOut(vgaHWPtr pVga, CARD8 value) |
70 | { |
71 | NVPtr pNv = (NVPtr)pVga->MMIOBase; |
72 | VGA_WR08(pNv->PVIO, VGA_MISC_OUT_W, value); |
73 | + write_mem_barrier(); |
74 | } |
75 | static CARD8 NVReadMiscOut(vgaHWPtr pVga) |
76 | { |
77 | @@ -123,6 +135,7 @@ |
78 | |
79 | tmp = VGA_RD08(pNv->PCIO, pVga->IOBase + VGA_IN_STAT_1_OFFSET); |
80 | VGA_WR08(pNv->PCIO, VGA_ATTR_INDEX, 0x00); |
81 | + write_mem_barrier(); |
82 | pVga->paletteEnabled = TRUE; |
83 | } |
84 | static void NVDisablePalette(vgaHWPtr pVga) |
85 | @@ -132,12 +145,14 @@ |
86 | |
87 | tmp = VGA_RD08(pNv->PCIO, pVga->IOBase + VGA_IN_STAT_1_OFFSET); |
88 | VGA_WR08(pNv->PCIO, VGA_ATTR_INDEX, 0x20); |
89 | + write_mem_barrier(); |
90 | pVga->paletteEnabled = FALSE; |
91 | } |
92 | static void NVWriteDacMask(vgaHWPtr pVga, CARD8 value) |
93 | { |
94 | NVPtr pNv = (NVPtr)pVga->MMIOBase; |
95 | VGA_WR08(pNv->PDIO, VGA_DAC_MASK, value); |
96 | + write_mem_barrier(); |
97 | } |
98 | static CARD8 NVReadDacMask(vgaHWPtr pVga) |
99 | { |
100 | @@ -148,16 +163,19 @@ |
101 | { |
102 | NVPtr pNv = (NVPtr)pVga->MMIOBase; |
103 | VGA_WR08(pNv->PDIO, VGA_DAC_READ_ADDR, value); |
104 | + write_mem_barrier(); |
105 | } |
106 | static void NVWriteDacWriteAddr(vgaHWPtr pVga, CARD8 value) |
107 | { |
108 | NVPtr pNv = (NVPtr)pVga->MMIOBase; |
109 | VGA_WR08(pNv->PDIO, VGA_DAC_WRITE_ADDR, value); |
110 | + write_mem_barrier(); |
111 | } |
112 | static void NVWriteDacData(vgaHWPtr pVga, CARD8 value) |
113 | { |
114 | NVPtr pNv = (NVPtr)pVga->MMIOBase; |
115 | VGA_WR08(pNv->PDIO, VGA_DAC_DATA, value); |
116 | + write_mem_barrier(); |
117 | } |
118 | static CARD8 NVReadDacData(vgaHWPtr pVga) |
119 | { |